Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: OPTICAL SENSING DEVICE WITH ROUNDED CORNER ELECTRODE PATTERN.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1-15 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-2 of U.S. Patent No. 12,433,054 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because the claimed invention is anticipated by the allowed Patent claims, as indicated below.
Currently Examined Application: 19/311,549
Issued US Patent No. 12,433,054 B2
1. An electronic device, comprising:
a first substrate;
a semiconductor element disposed on the first substrate;
a first inorganic layer disposed between the first substrate and the semiconductor element, wherein the first inorganic layer has a first surface adjacent to the semiconductor element, a second surface opposite to the first surface and a through-hole penetrating from the first surface to the second surface;
a conductive element disposed between the first electrode and the second electrode, wherein, in a cross-sectional view of the electronic device,
a first electrode disposed between the first substrate and the first inorganic layer;
a second electrode having a first portion disposed on the second surface of the first inorganic layer and a second portion disposed in the through-hole of the first inorganic layer; and
the first portion of the second electrode has a rounded corner.
1. A sensing device, comprising:
a driving substrate, comprising a first substrate and a plurality of driving circuits disposed on the first substrate, each of the plurality of driving circuits comprising a plurality of thin-film transistors, wherein a material of the first substrate comprises glass or polyimide;
a sensing module bonded to the driving substrate,
the sensing module comprising a second substrate, a plurality of sensing elements and a passivation layer disposed on the second substrate, wherein the second substrate is an epitaxial substrate;
(noting commonly known structure of penetrating through-hole in the art)
a plurality of bonding pads, wherein the sensing module is bonded to the driving substrate through the plurality of bonding pads; and
a plurality of first electrodes disposed on the driving substrate and
a plurality of second electrodes disposed on the sensing module, wherein the plurality of bonding pads are disposed between the plurality of first electrodes and the plurality of second electrodes, wherein each of the plurality of driving circuits is electrically connected to at least one of the plurality of sensing elements, wherein the bonding pad has a first width, the first electrode has a second width, and the second electrode has a third width, and the first width is greater than or equal to the second width, and the first width is greater than or equal to the third width, wherein a pitch between the plurality of sensing elements is greater than or equal to 15 μm and less than or equal to 20 μm, wherein a wavelength of light penetrating the first substrate is greater than or equal to 4 μm and less than or equal to 10 μm, wherein the second electrode has a first portion disposed on a surface of the passivation layer and a second portion disposed in a through-hole of the passivation layer, and both the first portion and the second portion have a rounded corner.
Claim 2
Claim 1
Claim 3
Claim 1
Claim 4
Claim 1
Claim 5 (commonly known material used for semiconductor manufacturing)
Claim 1
Claim 6 (commonly known material used for semiconductor manufacturing)
Claim 1
Claim 7
Claim 1
Claim 8
Claim 1
Claim 9
Claim 1
Claim 10
Claim 1
Claim 11
Claim 1
Claim 12
Claim 1
Claim 13
Claim 1
Claim 14
Claim 2
Claim 15
Claim 2
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-15 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kubota et al., US 2022/0037406 A1 (hereinafter “Kubota”).
Regarding claim 1, Kubota discloses an electronic device (FIGS. 12A-B and [0258], display device 100B), comprising:
a first substrate (FIGS. 12A-B and [0264], substate 151);
a semiconductor element disposed on the first substrate (FIGS. 12A-B and [0259]-[0268] semiconductor elements including light-receiving element 110 and light-emitting element 190);
a first inorganic layer (FIGS. 12A-B and [0260]-[0262] insulating layers 211, 213, 215 describing similar layers as being made of inorganic materials and [0228]) disposed between the first substrate and the semiconductor element (FIGS. 12A-B insulating layer 213 is between first substrate 151 and semiconductor elements 110 and 190), wherein the first inorganic layer has a first surface adjacent to the semiconductor element (FIGS. 12A-B and top surface of 213 is adjacent to the semiconductor elements 110 and 190), a second surface opposite to the first surface (FIGS. 12A-B bottom surface of 213) and a through-hole (see FIG. 12A annotated below with through hole labeled) penetrating from the first surface to the second surface (see FIG. 12A annotated below with through hole labeled);
a first electrode (165 and as annotated below) disposed between the first substrate (151) and the first inorganic layer (213 and see annotation of FIG. 12A below);
a second electrode (111) having a first portion (see FIG. 12A annotated below) disposed on the second surface of the first inorganic layer and a second portion (see FIG. 12A annotated below) disposed in the through-hole of the first inorganic layer (see FIG. 12A annotated below with through hole labeled); and
a conductive element (223 and as annotated below, alternatively 242) disposed between the first electrode and the second electrode (disposition of 223 is between 111 and 165 as annotated below), wherein, in a cross-sectional view of the electronic device, the first portion of the second electrode has a rounded corner (first portion of 165 has a rounded corner as it becomes a part of the through hole as annotated below).
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Regarding claim 2, Kubota discloses the electronic device as claimed in claim 1 (see above), wherein the second portion of the second electrode has a rounded corner (FIG. 12A annotated above, with both sides of second electrode entering the through-hole rounded).
Regarding claim 3, Kubota discloses the electronic device as claimed in claim 1 (see above), wherein the first substrate comprises glass ([0245] with substrate 151 comprising glass).
Regarding claim 4, Kubota discloses the electronic device as claimed in claim 1 (see above), wherein the first inorganic layer comprises multiple sub-layers (Kubota at FIG. 11, and [0228] and multiple sublayers including 211 and 213 and 215).
Regarding claim 5, Kubota discloses the electronic device as claimed in claim 4 (see above), wherein at least one of the multiple sub-layers comprises silicon nitride (FIG. 11 and [0228] wherein inorganic insulating films may comprise silicon nitride).
Regarding claim 6, Kubota discloses the electronic device as claimed in claim 4 (see above), wherein at least one of the multiple sub-layers comprises silicon oxide (FIG. 11 and [0228] wherein inorganic insulating films may comprise silicon oxide).
Regarding claim 7, Kubota discloses the electronic device as claimed in claim 1 (see above) wherein the conductive element is greater than the second electrode in width (FIGS. 11-13B and width between 223 segments would be wider than one segment 111).
Regarding claim 8, Kubota discloses the electronic device as claimed in claim 1 (see above), further comprising an organic layer (FIG. 12A and layer 214 described as organic at least at [0260]) disposed between the first electrode and the second electrode (FIG. 12A above, layer 214 is between 165 and 111).
Regarding claim 9, Kubota discloses the electronic device as claimed in claim 8 (see above), wherein the organic layer contacts the conductive element (FIG. 13A and [0269]-[0275] with 214 in contact with 223).
Regarding claim 10, Kubota discloses the electronic device as claimed in claim 1 (see above), further comprising a second inorganic layer disposed between the first substrate and the first electrode (FIGS. 12A and 13A and [0269]-[0275] with layer 211 and 215 between 165 and 151).
Regarding claim 11, Kubota discloses the electronic device as claimed in claim 10 (see above), wherein the second inorganic layer has a through-hole (FIGS. 11-13A with through holes such as within 204 penetrating 215), and the conductive element is overlapped with the through-hole of the second inorganic layer (connection layer 242 being formed similar to 223 overlaping the through hole of 204).
Regarding claim 12, Kubota discloses the electronic device as claimed in claim 1 (see above), further comprising a second substrate disposed on the semiconductor element (FIG. 12A and substrate 152 including 195 disposed on the semiconductor elements 110 and 190).
Regarding claim 13, Kubota discloses the electronic device as claimed in claim 12 (see above), wherein the second substrate comprises semiconductor material (FIGS. 12A-13B and [0258]-[0263] substrate 152 including 195 may be an inorganic and organic material or combination thereof, which would constitute a semiconductor material).
Regarding claim 14, Kubota discloses the electronic device as claimed in claim 1 (see above), wherein the semiconductor element is a sensing element ([0170] the light-receiving element 110 is a sensing light element).
Regarding claim 15, Kubota discloses the electronic device as claimed in claim 1 (see above), further comprising a transistor (FIGS. 11-13B and 201, 205, 206) disposed between the first substrate and the first electrode, wherein the transistor is electrically connected to the first electrode (FIGS. 12A-13B and structures 201, 205 and 206 being transistors as disclosed at [0225]-[0226] and [0269]-[0275]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Nishioka et al., US 5,489,548: Abstract and FIGS. 2-14 illustrating and describing curved electrode structures therein;
Chiang et al., US 10,832,985 B2: Abstract and FIGS. 12-24C illustrating and describing sensor packaging layers with rounded connecting electrodes therein;
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SARVESH J. NADKARNI whose telephone number is (571)270-7562. The examiner can normally be reached 8AM-5PM M-F.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Benjamin C. Lee can be reached at (571)272-2963. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SARVESH J NADKARNI/Examiner, Art Unit 2629
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