DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the response to this Office action, the Office respectfully requests that support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line numbers in the specification and/or drawing figure(s). This will assist the Office in prosecuting this application.
The Office has cited particular figures, elements, paragraphs and/or columns and line numbers in the references as applied to the claims for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant, in preparing the responses, to fully consider each of the cited references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage disclosed by the Office.
Priority
2. Applicant’s claim for the benefit of a prior-filed application under 35 U.S.C. 119(e) or under 35 U.S.C. 120, 121, or 365(c) is acknowledged.
Information Disclosure Statement
3. The information disclosure statement (IDS) submitted on 11/07/2025 is being considered by the Examiner.
Disposition of the Claims
4. The instant application was effectively filed on February 26, 2025, wherein claims 1-20 are pending.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tajiri et al. US Patent 8,625,039 B2 (hereinafter Tajiri).
Regarding claim 1, Tajiri teaches A display apparatus (Fig. 1; liquid crystal display device 10) comprising: a display panel (Fig 1; a pixel portion 14); and a power voltage generator configured to output a power voltage to the display panel (Fig. 1 in view of Fig. 8; gate potential creating circuit 18), wherein the power voltage generator comprises: a discharge switching element connected to an output terminal of the power voltage generator (Fig. 8; voltage control circuit 19B comprising discharge circuit PTFT connected to output terminal of gate potential creating circuit 18); and a discharge controller connected to a control electrode of the discharge switching element (Fig. 5b in view of Fig. 8 and col. 19 lines 16-35; wherein voltage converting circuit 26b is connected to gate electrode of discharge switch/transistor PTFT), and wherein the power voltage generator is configured to selectively apply one of a first logic power voltage or a second logic power voltage to the discharge controller (Fig. 1, 8 and Col. 14 lines 18-29; either at an L level (VBB or VSS) or at an H level (VVG) by a voltage converting circuit 26B, thereby outputting the power source cut-off signal DISCHARGE).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of pre-AIA 35 U.S.C. 103(a) which forms the basis for all obviousness rejections set forth in this Office action:
(a) A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under pre-AIA 35 U.S.C. 103(a) are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 2 is/are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Tajiri et al. US Patent 8,625,039 B2 (hereinafter Tajiri) in view of Sawabe US PG-PUB 20140354609 A1 (hereinafter Sawabe).
Regarding claim 2, Tajiri teaches The display apparatus of claim 1, Tajiri fails to further disclose wherein the first logic power voltage is an input power voltage of the power voltage generator, and wherein the second logic power voltage is an output power voltage of the output terminal of the power voltage generator.
However, in the same field of power supply management, Sawabe teaches wherein the first logic power voltage is an input power voltage of the power voltage generator, and wherein the second logic power voltage is an output power voltage of the output terminal of the power voltage generator (Fig. 1 in view of Fig. 6 and Para. [0068]; The low-level side power supply circuit 9b (i) converts an input voltage (input electric potential) VIN into an output voltage (output electric potential) VOUT which is lower than the ground (GND) electric potential and then (ii) outputs the output voltage thus converted).
Thus, it would have been obvious to one of ordinary skills in the art before the effective filing date of the claimed invention to combine the teachings of Tajiri with the teachings as taught by Sawabe in order to makes it possible to constitute, at low cost, a power supply having a high capacity Sawabe-[Para. [0053] and [0081].
Claim 20 is/are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Tajiri et al. US Patent 8,625,039 B2 (hereinafter Tajiri) in view of Synn et al. US PG-PUB 20250061852 A1 (hereinafter Synn).
Regarding claim 20, Tajiri teaches An electronic device (Fig. 1; liquid crystal display device 10) comprising: a display panel (Fig 1; a pixel portion 14); a power voltage generator configured to output a power voltage to the display panel (Fig. 1 in view of Fig. 8; gate potential creating circuit 18); a driving controller configured to control the power voltage generator (Fig. 1; terminal portion 20); wherein the power voltage generator comprises: a discharge switching element connected to an output terminal of the power voltage generator Fig. 8; voltage control circuit 19B comprising discharge circuit PTFT connected to output terminal of gate potential creating circuit 18); and a discharge controller connected to a control electrode of the discharge switching element Fig. 5b in view of Fig. 8 and col. 19 lines 16-35; wherein voltage converting circuit 26b is connected to gate electrode of discharge switch/transistor PTFT), and wherein the power voltage generator is configured to selectively apply one of a first logic power voltage or a second logic power voltage to the discharge controller (Fig. 1, 8 and Col. 14 lines 18-29; either at an L level (VBB or VSS) or at an H level (VVG) by a voltage converting circuit 26B, thereby outputting the power source cut-off signal DISCHARGE).
Although Tajiri teaches a processor a processor configured to output an input image data (Fig. 1; horizontal control circuit 12)
Tajiri fails to further disclose and an input control signal to the driving controller,
However, in the same field of display device, a driving controller configured to control the power voltage generator (Fig. 1; controller 170 controls power management circuit 160) and a processor configured to output an input image data and an input control signal to the driving controller (Fig. 1 and [0068] The controller 170 (e.g., a timing controller (TCON)) may receive input image data IDAT and a control signal CTRL from an external host processor)
Thus, it would have been obvious to one of ordinary skills in the art before the effective filing date of the claimed invention to combine the teachings of Tajiri with the teachings as taught by Synn in order to control the overall operation of the display device Synn-Para. [0052].
Allowable Subject Matter
Claims 3-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 17-19 are allowed.
Regarding claim 17, none of the references cited either alone or in any obvious combination teaches and/or suggests “ A method of driving a display apparatus, the method comprising: generating an output power voltage based on an input power voltage and outputting the output power voltage to a display panel, during a normal mode; and during a fast discharge mode, selectively applying one of a first logic power voltage or a second logic power voltage to a discharge controller connected to a control electrode of a discharge switching element to discharge the output power voltage”
Conclusion
5. Any inquiry concerning this communication or earlier communications from the examiner should be directed to AMY ONYEKABA whose telephone number is (571)270-7633. The examiner can normally be reached on 9-5.
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/AMY ONYEKABA/Primary Examiner, Art Unit 2628