Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the response to this Office action, the Office respectfully requests that support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line numbers in the specification and/or drawing figure(s). This will assist the Office in prosecuting this application.
The Office has cited particular figures, elements, paragraphs and/or columns and line numbers in the references as applied to the claims for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant, in preparing the responses, to fully consider each of the cited references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage disclosed by the Office.
Status of Claims
- Claim(s) 1-20 is/are examined on the merits
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.|
Information Disclosure Statement
The information disclosure statement (IDS) submitted on November 12, 2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 18-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kawashima et al, U.S. Patent Publication No. 20200357354.
Consider claim 18, Kawashima teaches a pixel comprising: a first transistor including a first electrode, a second electrode and a gate electrode (see Kawashima figure 4A-4C, element 111 specifically for example figure 4B where an electrode is connected to 128, NM, 113, and 11 4 thru element 112);
an enable transistor including a first electrode connected to a data line which transfers a data signal, a second electrode, and a gate electrode which receives an enable signal (see Kawashima figure 2, element DATA and 11 including 107, 108 connected to 124, 123 respectively);
a second transistor (see Kawashima figure 2, element 103) including a first electrode connected to the second electrode of the enable transistor, a second electrode connected to the first electrode of the first transistor (see Kawashima figure 2 where 103 connects to NM and figure 4B where 111 is connected to NM), and a gate line which receives a scan signal (see Kawashima figure 2, element 103, 12[n], 125[m]); and
a light-emitting element electrically connected to the second electrode of the first transistor (see Kawashima figures 4A-4C, element 111, 114 where for example figure 4B illustrates 111 electrically connected to 114 through 112).
Consider claim 19, Kawashima teaches all the limitations of claim 18 and further teaches wherein, when the data signal is transferred to the data line, the enable signal is at an active level (see Kawashima paragraph 0128 where potential of the wiring 123 is set to “H” and the potential of the wiring 124 is set to “L”, whereby the transistor 108 is turned on so that “D1” is supplied to the wiring 125[m]).
Consider claim 20, Kawashima teaches all the limitations of claim 18 and further teaches wherein, when both the enable transistor and the second transistor are turned on, the data signal is transferred to the first electrode of the first transistor (see Kawashima paragraph 0129 where transistor 103 is turned on, and the potential of the wiring 125[m] is written to the node NM[n,m]. which is electrically connected to gate and an electrode of 111 through element 113).
Allowable Subject Matter
Claims 1-17 are allowed.
The claimed invention recites
Claim 1 “ An electronic device comprising: a display panel including a plurality of pixels; and a data driving circuit which provides a plurality of data signals to the plurality of pixels via a plurality of data lines, and provides a plurality of enable signals to the plurality of pixels via a plurality of enable lines, wherein each of the plurality of pixels emits light in response to a corresponding data signal of the plurality of data signals when a corresponding enable signal of the plurality of enable signals is at an active level. ”
Claim 11 “An electronic device comprising: a processor which provides an input image signal and a control signal; and a display module which displays an image in a multi-frequency mode in response to the input image signal and the control signal, wherein the display module comprises: a display panel including a plurality of pixels; a driving controller which outputs an output image signal and a data control signal in response to the input video signal and the control signal; and a data driving circuit which provides a plurality of data signals to the plurality of pixels via a plurality of data lines, and provides a plurality of enable signals to the plurality of pixels via a plurality of enable lines, in response to the output image signal and the data control signal, and wherein each of the plurality of pixels emits light in response to a corresponding data signal of the plurality of data signals when a corresponding enable signal of the plurality of enable signals is at an active level. ”
The following prior arts are representative of the state of the prior art:
Kawashima et al, U.S. Patent Publication No. 20200357354 (figures 1-4C)
Kim et al, U.S. Patent Publication No. 20220122537 (figure 4-18)
Aoki, U.S. Patent Publication No. 20060221011 (figure 3)
Kim et al, U.S. Patent Publication No. 10504433 (figure 2-4)
The prior arts cited fails to fairly teach or suggest the combined features of the invention including “a data driving circuit which provides a plurality of data signals to the plurality of pixels via a plurality of data lines, and provides a plurality of enable signals to the plurality of pixels via a plurality of enable lines, wherein each of the plurality of pixels emits light in response to a corresponding data signal of the plurality of data signals when a corresponding enable signal of the plurality of enable signals is at an active level” of claim 1 and “a data driving circuit which provides a plurality of data signals to the plurality of pixels via a plurality of data lines, and provides a plurality of enable signals to the plurality of pixels via a plurality of enable lines, in response to the output image signal and the data control signal, and wherein each of the plurality of pixels emits light in response to a corresponding data signal of the plurality of data signals when a corresponding enable signal of the plurality of enable signals is at an active level.” of claim 11.
These features find support at least at figures 6-7 of Applicant’s original specification.
As such, modification of the prior art of record can only be motivated by hindsight reasoning, or by changing the intended use and function of the prior art themselves. Therefore, it is not clear that one of ordinary skill in the art would have made the necessary modifications to the prior art of record to encompass the limitations set forth in the present application. Moreover, none of the prior arts of record, taken either alone or in combination, anticipate nor render obvious the claimed inventions. Hence, claims 1-17 are allowed.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Tanada, U.S. Patent Publication No. 20010048106 (electronic device), Yumoto, U.S. Patent Publication No. 6859193 (display device), Lee et al, U.S. Patent Publication No. 7656368 (display device), Lin et al, U.S. Patent Publication No. 20170140724 (display with series connected switching transistors), Lim et al, U.S. Patent Publication No. 20240331623 (display device).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Dorothy H Harris whose telephone number is (571)270-7539. The examiner can normally be reached Monday - Friday 8am - 4pm.
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/Dorothy Harris/Primary Examiner, Art Unit 2625
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