CTNF 19/392,132 CTNF 87655 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Priority 02-26 AIA Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Specification 06-11 AIA The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. 06-11-01 AIA The following title is suggested: Display Device Supplying First Scan Signal with a Different Turn-on Level than A Second Scan Signal . Double Patenting 08-30 AIA A rejection based on double patenting of the “same invention” type finds its support in the language of 35 U.S.C. 101 which states that “whoever invents or discovers any new and useful process... may obtain a patent therefor...” (Emphasis added). Thus, the term “same invention,” in this context, means an invention drawn to identical subject matter. See Miller v. Eagle Mfg. Co. , 151 U.S. 186 (1894); In re Vogel , 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Ockert , 245 F.2d 467, 114 USPQ 330 (CCPA 1957). A statutory type (35 U.S.C. 101) double patenting rejection can be overcome by canceling or amending the claims that are directed to the same invention so they are no longer coextensive in scope. The filing of a terminal disclaimer cannot overcome a double patenting rejection based upon 35 U.S.C. 101. 08-31 AIA Claim 1 is rejected under 35 U.S.C. 101 as claiming the same invention as that of claim s 1-5 of prior U.S. Patent No. 12475829 B2 . This is a statutory double patenting rejection. 08-33 AIA The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg , 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman , 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi , 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum , 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel , 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington , 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA/25, or PTO/AIA/26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. 08-36 AIA Claim 1 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim s 1-14 of U.S. Patent No. 11881148 B2 in view of Park et al. (US 20150348466) and Yamazaki et al (US 20110006301 A1) . Both the current application and patent 148’ claim a display device comprising a pixel including a light emitting element, a first transistor, a second transistor, and third transistor and a fourth transistor. The current application differs in that it further claims pixels coupled to first scan lines, second scan lines, emission control lines, and data lines; a first scan driver; a second scan driver; wherein the first scan driver is configured to supply a first scan signal to the i-th first scan line to turn on the second transistor, the second scan driver is configured to supply the second scan signal to the i-th second scan line to turn on the third transistor, and a turn-on level of the first scan signal is different from a turn-on level of the second scan signal. These structures are common, typical, and well known to display devices with pixel circuits as evidenced by Park figures 7 and 22 who teaches all these elements. (first and second scan lines, emission control lines, data lines and a first scan driver). It would have been obvious to one skilled in the art, at the time of the invention, to modify the 396 pixel circuit with Park such that it includes the display components as this amounts to combining prior art elements according to known methods to yield predictable results. See MPEP 2143, rational (A). In the current instance, the 396 application discloses a pixel structure that requires Park’s well-known display scan driver, scan lines, and emission lines to drive the pixel structure. The current application further details a second scan driver which the copending US 17367396 does not detail. However, a second scan driver is also common, typical and well known to display devices with pixel circuits as evidenced by Yamazaki. The use of a second scan driver is common in displays that use even/odd line driving. It would have been obvious to one skilled in the art, at the time of the invention, to modify the 396 pixel circuit with Yamazaki such that 396 includes the second scan driver as this amounts to combining prior art elements according to known methods to yield predictable results. See MPEP 2143, rational (A). In the current instance, the 396 application discloses a pixel structure that requires Yamazaki’s well-known second scan driver to drive even/odd lines connected to a/the pixel structure . 08-36 AIA Claim 1 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim s 1-15 of U.S. Patent No. 11455938 B2 in view of Park et al. (US 20150348466) and Yamazaki et al (US 20110006301 A1) . Both the current application and patent 938’ claim a display device comprising a pixel including a light emitting element, a first transistor, a second transistor, and third transistor and a fourth transistor. The current application differs in that it further claims pixels coupled to first scan lines, second scan lines, emission control lines, and data lines; a first scan driver; a second scan driver; wherein the first scan driver is configured to supply a first scan signal to the i-th first scan line to turn on the second transistor, the second scan driver is configured to supply the second scan signal to the i-th second scan line to turn on the third transistor, and a turn-on level of the first scan signal is different from a turn-on level of the second scan signal. These structures are common, typical, and well known to display devices with pixel circuits as evidenced by Park figures 7 and 22 who teaches all these elements. (first and second scan lines, emission control lines, data lines and a first scan driver). It would have been obvious to one skilled in the art, at the time of the invention, to modify the 396 pixel circuit with Park such that it includes the display components as this amounts to combining prior art elements according to known methods to yield predictable results. See MPEP 2143, rational (A). In the current instance, the 396 application discloses a pixel structure that requires Park’s well-known display scan driver, scan lines, and emission lines to drive the pixel structure. The current application further details a second scan driver which the copending US 17367396 does not detail. However, a second scan driver is also common, typical and well known to display devices with pixel circuits as evidenced by Yamazaki. The use of a second scan driver is common in displays that use even/odd line driving. It would have been obvious to one skilled in the art, at the time of the invention, to modify the 396 pixel circuit with Yamazaki such that 396 includes the second scan driver as this amounts to combining prior art elements according to known methods to yield predictable results. See MPEP 2143, rational (A). In the current instance, the 396 application discloses a pixel structure that requires Yamazaki’s well-known second scan driver to drive even/odd lines connected to a/the pixel structure. Claim 1 is rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 9, 16, and 22 of U.S. Patent No. 11056043 B2. Both the current application and patent 043’ claims 1, 9, 16, and 22 claim a display device comprising pixels coupled to first scan lines, second scan lines, emission control lines, and data lines; a pixel including a light emitting element, a first transistor, a second transistor, and third transistor, a fourth transistor; a first scan driver to supply a scan signal to a first scan line and a second scan driver to supply a scan signal to a second scan line. Art Rejection There is no prior art rejection against claim 1. The closest related art is applicant IDS cited Park et al. (US 20150348466) in view of Yamazaki et al. (US 20110006301 A1) and Hou et al. (US 20200035183 A1). Park teaches a display device (Fig. 7) comprising: pixels coupled to first scan lines, second scan lines, emission control lines, and data lines (See fig. 7 which show pixels PX connected to SL1, SL2, EL1, EL2) ; a first scan driver to supply a first scan signal to each of the first scan lines (Fig. 7, Scan driver 720) ; wherein a pixel (Fig. 4, pixel 200. Fig. 7, pixel PX) in an i-th horizontal line from among the pixels, i being a natural number, comprises: a first transistor (Fig. 4, [0094], driving transistor TD’) coupled between a first node (see node connecting T5’ and TD’) and a third node (See node connecting TD’ and T8’) , and comprising a gate electrode coupled to a second node (Fig. 4, node connected to gate of driving transistor TD’) ; a second transistor coupled between a corresponding data line and the first node (Fig. 4, [0094], fifth transistor T5’) , and comprising a gate electrode coupled to an i-th first scan line (Fig. 4, [0053], scan signal GW) ; a third transistor (Fig. 4, eighth transistor T8’) coupled between the second node and the third node (Fig. 4, see node connected to gate of TD’) , and comprising a gate electrode coupled to an i-th second scan line (GW is second scan signal. Claim does not require first scan signal to be different than second scan signal) ; and a fourth transistor (Fig. 4, ninth transistor T9’) coupled between the second node and a first initialization power supply (the initializing voltage VINIT2) , and comprising a gate electrode coupled to an i-1-th second scan line (Fig. 4, [0076], “a gate terminal that receives the gate initializing signal GI.” Examiner notes the initializing signal GI functions the same as an i-1th second scan line) ; a storage capacitor coupled between the first power supply and the second node (Fig. 4, See Cst’) . Park does not disclose a second scan driver to supply a second scan signal to each of the second scan line, wherein the first scan driver is configured to supply a first scan signal to the i-th first scan line to turn on the second transistor, the second scan driver is configured to supply the second scan signal to the i-th second scan line to turn on the third transistor, and a turn-on level of the first scan signal is different from a turn-on level of the second scan signal. Yamazaki teaches a display with both a first scan driver and a second scan driver to supply a second scan signal to each of the second scan lines (Fig. 22, the first scan line driver circuit 5302 and the second scan line driver circuit 5303). Yamazaki does not teach wherein the first scan driver is configured to supply a first scan signal to the i-th first scan line to turn on the second transistor, the second scan driver is configured to supply the second scan signal to the i-th second scan line to turn on the third transistor, and a turn-on level of the first scan signal is different from a turn-on level of the second scan signal. Hou [0040] teaches 2 gate drivers wherein the first gate driver 4 is connected to a pixel 10 through an N-type TFT 11 and a second gate driver 5 is connected to the pixel 10 through a P-type TFT 12. None of the prior art teaches wherein the first scan driver is configured to supply a first scan signal to the i-th first scan line to turn on the second transistor, the second scan driver is configured to supply the second scan signal to the i-th second scan line to turn on the third transistor, and a turn-on level of the first scan signal is different from a turn-on level of the second scan signal. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to NATHAN P BRITTINGHAM whose telephone number is (571)270-7865. The examiner can normally be reached Monday-Thursday, 10 AM - 6 PM, EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Benjamin Lee can be reached at (571) 272-2963. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NATHAN P BRITTINGHAM/Primary Examiner, Art Unit 2629 Application/Control Number: 19/392,132 Page 2 Art Unit: 2629 Application/Control Number: 19/392,132 Page 3 Art Unit: 2629 Application/Control Number: 19/392,132 Page 4 Art Unit: 2629 Application/Control Number: 19/392,132 Page 5 Art Unit: 2629 Application/Control Number: 19/392,132 Page 6 Art Unit: 2629 Application/Control Number: 19/392,132 Page 7 Art Unit: 2629 Application/Control Number: 19/392,132 Page 8 Art Unit: 2629 Application/Control Number: 19/392,132 Page 9 Art Unit: 2629 Application/Control Number: 19/392,132 Page 10 Art Unit: 2629 Application/Control Number: 19/392,132 Page 11 Art Unit: 2629
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