Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Response to Amendment
Applicant’s Amendment filed on July 26, 2026 has been fully considered and entered.
Claim Objections
Regarding claim 22, “the silicon nitride waveguide at located” should be changed to “the silicon nitride waveguide are located” for grammatical purposes.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-4, 8-16, 21 and 22 are rejected under 35 U.S.C. 103(a) as being unpatentable over Li et al. (CN 119575701 A) in view of Pawlak et al. (US 2024/0219636 A1), further in view of Takizawa (US 4,818,063).
Regarding claim 1, Li discloses a photonic integrated circuit (Fig. 5) that consists essentially of: a first die (top portion of chip 400 down to layer 502); and a second die (bottom portion of chip including layers 501, 503 and 505) that is bonded to the first die; wherein the first die comprises a first silicon layer (502 is disclosed as silicon oxide and appears to surround all of the components in the top portion; therefore the top layer of the top portion is a first silicon layer) and an additional layer (bottom layer in top portion), a modulating electrode (504) and a silicon nitride waveguide (505; “transmission optical waveguide 505 is an SiN waveguide”) formed in the additional layer; and wherein the second die comprises a patterned structure made of at least one electro-optical modulation material that is selected of lithium niobate, lithium titanate, barium titanate or graphene (503; “material of the modulated optical waveguide may be… lithium niobate”); wherein the patterned structure comprises: a modulating region in which the radiation is modulated under a control of the modulating electrode to provide modulated radiation, and an output region that is optically coupled to the silicon nitride waveguide for providing the modulated radiation to the silicon nitride waveguide (“modulated optical waveguide 503 couples the modulated optical signal to the transmission optical waveguide 505 by evanescent wave coupling”).
Still regarding claim 1, Li teaches the claimed invention except for specifically stating an input region that is configured to receive radiation. Pawlak discloses an optical die (12 in Figs. 1, 3A) comprising an input region (18) that is configured to receive radiation (36) in paragraph 0023. Since both of the inventions relate to optical devices, one of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to use an input region that is configured to receive radiation as disclosed by Pawlak in the device of Li for the purpose of coupling light from an external source in a unified, compact platform.
Still regarding claim 1, Li further discloses the modulating electrode (504) is located in a different layer than the patterned structure (503) in Fig. 5. The proposed combination of Li and Pawlak teaches the claimed invention except for specifically stating the modulating electrode is spaced apart from the modulating region. Takizawa discloses a photonic device (Fig. 1) comprising a modulating electrode (3A, 3B) and a waveguide (2) with a modulating region in which the radiation is modulated under a control of the modulating electrode (column 1, lines 6-21), and wherein the modulating electrode is spaced apart from the modulating region (column 2, lines 49-56). Takizawa specifically states an electrode may be spaced apart by a predetermined distance from a side edge of the waveguide or disposed on the side of the waveguide. This teaching would lead one of ordinary skill to understand that an electrode spaced apart or in contact with a waveguide are merely alternative methods of achieving modulation of an optical waveguide depending on the application. Thus, since all of the inventions relate to optical devices, one of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to use a modulating electrode spaced apart from the modulating region as disclosed by Takizawa in the device of the proposed combination of Li and Pawlak for the purpose of providing enhanced versatility in the manufacturing process.
Regarding claim 2, Li discloses the modulating region is at least a portion of a waveguide (503 is disclosed as “a modulated optical waveguide 503”).
Regarding claim 3, Applicant is claiming the product including the process of making the first die, and therefore is of "product-by-process" nature. The courts have been holding for quite some time that: the determination of the patentability of product-by-process claim is based on the product itself rather than on the process by which the product is made. In re Thrope, 777 F. 2d 695, 227 USPQ 964 (Fed. Cir. 1985); and patentability of claim to a product does not rest merely on a difference in the method by which that product is made. Rather, it is the product itself which must be new and unobvious. Applicant has chosen to claim the invention in the product form. Thus a prior art product which possesses the claimed product characteristics can anticipate or render obvious the claim subject matter regardless of the manner in which it is fabricated. A rejection based on 35 U.S.C. section 102 or alternatively on 35 U.S.C. section 103 of the status is eminently fair and acceptable. In re Brown and Saffer, 173 USPQ 685 and 688; In re Pilkington, 162 USPQ 147. As such no weight is given to the process steps recited in claim 3 of the first die being a thinned first die that has undergone a thinning operation.
Regarding claim 4, Li discloses the second die lacks a buried oxide layer since Li discloses “the substrate 501 may comprise buried oxide (BOX) 505” implying the substrate may not have the buried oxide layer.
Regarding claim 8, the proposed combination of Li, Pawlak and Takizawa teaches the claimed invention except for specifically stating the output region has a tapered shape. However, Pawlak discloses the input region having a tapered shape in Fig. 1 and paragraphs 0003-0004. As such, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to use a tapered shape at the output region as well in order to support mode transformation at the output end.
Regarding claim 9, Li discloses the silicon nitride waveguide is parallel to the patterned structure in Fig. 5.
Regarding claim 10, Pawlak in view of the rejection of claim 1 above, further discloses the input region is configured to receive radiation from a side of the photonic integrated circuit in Fig. 3A.
Regarding claim 11, Pawlak in view of the rejection of claim 1 above, further discloses the input region has a tapered shape in Fig. 1.
Regarding claim 12, proposed combination of Li, Pawlak and Takizawa teaches the claimed invention except for specifically stating the output region has a tapered shape. However, Pawlak discloses the input region having a tapered shape in Fig. 1 and paragraphs 0003-0004. As such, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to use a tapered shape at the output region as well in order to support mode transformation at the output end.
Regarding claim 13, Li discloses the silicon nitride waveguide is parallel to the patterned structure in Fig. 5.
Regarding claims 14 and 15, Pawlak in view of the rejection of claim 1 above, further discloses an undercut (32, 33) formed below a portion of the patterned structure
whereon the undercut is formed below the entirety of the input region (19).
Regarding claim 16, Pawlak in view of the rejection of claim 1 above, further discloses a fiber holder (16 under 34) that is configured to hold a fiber (34; paragraph 0023 – “the laser chip 34 may be replaced by a different type of light source, such as an optical fiber”) in a position where a center of a fiber is aligned within the input region.
Regarding claim 21, Li discloses the first die lacks a patterned electro-optic element made of the at least one electro-optical modulation material in Fig. 5. Li discloses the waveguide 503 “is connected to the conductive traces in the filling layer 502, and then the modulated optical waveguide 503 is connected to the electrode 504 through the conductive traces.” As such, the material directly above the waveguide 503 are conductive traces and the first die only contains electrode 504 and conductive traces.
Regarding claim 22, Li discloses the modulating electrode and the silicon nitride waveguide are located at a same height in Fig. 5, since the conductive traces directly above the waveguide 503 can be considered part of the modulating electrode and are at the same height as the silicon nitride waveguide 505.
Response to Arguments
Applicant's arguments, filed July 26, 2026, have been carefully considered but are moot in view of the new grounds of rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRIS H CHU whose telephone number is (571)272-8655. The examiner can normally be reached on Mon-Fri 9AM-5PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uyen-Chau Le can be reached on 571-272-239797. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Any inquiry of a general or clerical nature should be directed to the Technology Center 2800 receptionist at telephone number (571) 272-1562.
Chris H. Chu
/CHRIS H CHU/Primary Examiner, Art Unit 2874 August 14, 2026
Prosecution Insights