Prosecution Insights
Last updated: October 02, 2026
Application No. 19/414,506

LIGHT-EMITTING DIODE PACKAGES WITH VARYING CURRENT PULSE WIDTH MODULATION AND RELATED METHODS

Non-Final OA §102§103§DOUBLEPATENT
Filed
Dec 10, 2025
Priority
Aug 29, 2023 — continuation of 12/526,889
Examiner
ELAHI, TOWFIQ
Art Unit
2625
Tech Center
2600 — Communications
Assignee
CreeLED Inc.
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
1y 8m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
592 granted / 743 resolved
+17.7% vs TC avg
Moderate +14% lift
Without
With
+14.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
15 currently pending
Career history
766
Total Applications
across all art units

Statute-Specific Performance

§101
2.3%
-37.7% vs TC avg
§103
66.7%
+26.7% vs TC avg
§102
18.8%
-21.2% vs TC avg
§112
4.4%
-35.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 743 resolved cases

Office Action

§102 §103 §DOUBLEPATENT
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the claims at issue are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the reference application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The USPTO internet Web site contains terminal disclaimer forms which may be used. Please visit http://www.uspto.gov/forms/. The filing date of the application will determine what form should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp. Claim 1, claim 13 and claim 23 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 claim 11 and claim 20 of US 12526889. Although the claims at issue are not identical, they are not patentably distinct from each other because they are obvious variation of each other. As the current claims are broader recitations of the patented ones. Current Application US 12526889 1. A light-emitting diode (LED) package configured for receiving and transmitting digital communication signals, the LED package comprising: an LED chip; and an LED driver configured to drive the LED chip by pulse width modulation (PWM), the LED driver comprising a plurality of current sources configured to provide varying current levels to the LED chip based on a single PWM signal of the LED driver. 2. The LED package of claim 1, wherein at least two current sources of the plurality of current sources are configured to provide different current levels to the LED chip. 3. The LED package of claim 1, wherein at least two current sources of the plurality of current sources are configured to provide a same current level to the LED chip. 4. The LED package of claim 1, wherein the varying current levels comprise at least a first current level, a second current level that is greater than the first current level, and a third current level that is greater than the second current level. 5. The LED package of claim 1, wherein the plurality of current sources is configured to receive an output PWM signal that selects one or more current sources of the plurality of current sources for providing current to the LED chip. 6. The LED package of claim 1, wherein each current source of the plurality of current sources comprises a switch coupled to the LED chip and to a different output of the output PWM signal. 13. A method of light output control within a light-emitting diode (LED) package, the method comprising: controlling brightness levels of an LED chip with pulse width modulation (PWM); and adjusting current levels to the LED chip during less than half of a PWM period based on a single PWM signal of an LED driver. 23. A light-emitting device comprising: a light-emitting diode (LED) chip; and an LED driver configured to drive the LED chip by pulse width modulation (PWM), the LED driver comprising a plurality of current sources configured to provide varying current levels to the LED chip based on a single PWM signal of the LED driver. 1. A light-emitting diode (LED) package configured for receiving and transmitting digital communication signals, the LED package comprising: an LED chip; and an LED driver configured to drive the LED chip by pulse width modulation (PWM), the LED driver comprising a plurality of current sources configured to provide varying current levels to the LED chip, wherein the LED driver is configured to only adjust the current level provided to the LED chip during a single clock cycle of a PWM period. 2. The LED package of claim 1, wherein at least two current sources of the plurality of current sources are configured to provide different current levels to the LED chip. 3. The LED package of claim 1, wherein at least two current sources of the plurality of current sources are configured to provide a same current level to the LED chip. 4. The LED package of claim 1, wherein the varying current levels comprise at least a first current level, a second current level that is greater than the first current level, and a third current level that is greater than the second current level. 5. The LED package of claim 1, wherein the plurality of current sources is configured to receive an output PWM signal that selects one or more current sources of the plurality of current sources for providing current to the LED chip. 6. The LED package of claim 5, wherein each current source of the plurality of current sources comprises a switch coupled to the LED chip and to a different output of the output PWM signal. 11. A method of light output control within a light-emitting diode (LED) package, the method comprising: controlling brightness levels of an LED chip with pulse width modulation (PWM); and adjusting current levels to the LED chip during less than half of a PWM period, wherein the current levels are only adjusted for a single clock cycle of the PWM period. 20. A light-emitting device comprising: a light-emitting diode (LED) chip; and an LED driver configured to drive the LED chip by pulse width modulation (PWM), the LED driver comprising a plurality of current sources configured to provide varying current levels to the LED chip, wherein the LED driver is configured to only adjust the current level provided to the LED chip during a single clock cycle of a PWM period. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-15, 16, 18-20, 22-26 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Gu (US 20220044643). Regarding claim 1 Gu teaches a a light-emitting diode (LED) package (fig.3) configured for receiving ([0058]) and transmitting digital communication signals ([0059]), the LED package comprising: an LED chip (fig.4, CHIP); and and an LED driver (fig. 3, item 306 LED Matrix Driver) configured to drive the LED chip by pulse width modulation (PWM) (fig.4, LED PWM GERERATOR), the LED driver comprising a plurality of current sources configured to provide varying current levels to the LED chip based on a single PWM signal of the LED driver (fig. 8A-8B, [0078]-[0079], fig. 5, [0069]-[0072] also fig. 6). Regarding claim 2 Gu teaches wherein at least two current sources (fig. 6, fig. 14) of the plurality of current sources are configured to provide different current levels to the LED chip ([0072] current source 660 (or current sink) provides a current to transistors of the current mirror circuitry 670, also see fig. 15A-E). Regarding claim 3 Gu teaches wherein at least two current sources of the plurality of current sources are configured to provide a same current level to the LED chip ([0098]). Regarding claim 4 Gu teaches wherein the varying current levels comprise at least a first current level, a second current level that is greater than the first current level, and a third current level that is greater than the second current level ([0072], [0092], fig. 12, see ILED, 1/4ILED, 1/16ILED). Regarding claim 5 Gu teaches wherein the plurality of current sources is configured to receive an output PWM signal that selects one or more current sources of the plurality of current sources for providing current to the LED chip (fig. 5, [0070]). Regarding claim 6 Gu teaches wherein each current source of the plurality of current sources comprises a switch coupled to the LED chip and to a different output of the output PWM signal (Fig. 5). Regarding claim 7 Gu teaches wherein the LED driver is configured to adjust the current level provided to the LED chip during less than half of a PWM period (fig. 9A-9B 902, 904 shows that adjust the current level provided to the LED chip during less than half of a PWM period). Regarding claim 8 Gu teaches wherein the LED driver is configured to only adjust the current level provided to the LED chip during a single clock cycle of the PWM period (fig. 8A-8B, [0078]-[0079]). Regarding claim 9 Gu teaches wherein the single clock cycle is positioned at a start of the PWM period (fig. 8A, 802). Regarding claim 10 Gu teaches herein for at least some current levels, the single clock cycle is positioned immediately following another clock cycle (fig. 8A, after 802 there is another clock cycle) of the PWM period where the LED chip is turned on. Regarding claim 11 Gu teaches wherein for a particular current level, the LED driver is configured to turn on a unique combination of one or more current sources of the plurality of current sources as compared to a next-closest current level ([0080], fig. 8G-fig. 8I). Regarding claim 12 Gu teaches further comprising: an additional LED chip; and an additional LED driver configured to drive the additional LED chip by PWM, the additional LED driver comprising a plurality of additional current sources configured to provide varying current levels to the additional LED chip (fig. 3). Regarding claim 13 Gu teaches a method of light output control within a light-emitting diode (LED) package, the method comprising: controlling brightness levels of an LED chip with pulse width modulation (PWM) ([0069]-[0072); and adjusting current levels to the LED chip during less than half of a PWM period based on a single PWM signal of an LED driver (fig. 9A-9B 902, 904 shows that adjust the current level provided to the LED chip during less than half of a PWM period). Regarding claim 14 the limitations are similar to the limitations of claim 8 so rejected same way. Regarding claim 15 the limitations are similar to the limitations of claim 9 so rejected same way. Regarding claim 16 the limitations are similar to the limitations of claim 10 so rejected same way. Regarding claim 18 Gu teaches wherein adjusting current levels to the LED chip comprises turning on and off different current sources of a plurality of current sources connected to the LED chip ([0099]). Regarding claim 19 Gu teaches wherein at least two current sources (fig. 14, [0097]) of the plurality of current sources provide different current levels to the LED chip ([0099]). Regarding claim 20 Gu teaches wherein at least two current sources (fig. 17) of the plurality of current sources provide a same current level to the LED chip ([0098]). Regarding claim 22 Gu teaches the LED chip is one of a plurality of LED chips within the LED package (fig. 3); the LED package comprises a separate LED driver (fig. 3, 300) for controlling each LED chip of the plurality of LED chips; and each LED driver comprises a plurality of current sources (fig. 14, 1442, 1460) for providing different current levels (see fig. 15A-E). Regarding claim 23 the limitations are similar to the limitations of claim 1 so rejected same way. Regarding claim 24 the limitations are similar to the limitations of claim 2 so rejected same way. Regarding claim 25 the limitations are similar to the limitations of claim 3 so rejected same way. Regarding claim 26 the limitations are similar to the limitations of claim 8 so rejected same way. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gu (US 20220044643) in view of Navabi (US 20190059136). Regarding claim 17 Gu teaches wherein the current levels are off for the remainder of the PWM period (fig. 8B, after 804 current levels are off). But silent on current levels are constant. However, Navabi teaches current levels are constant ([0061]). Therefore, it would have been obvious to one of the ordinary skilled in the art to combine Gu in light of Navabi teaching to that it may include current levels are constant. The motivation is to provide a method of PWM dimming by varying a PWM duty cycle with each of two or more peak currents, which can reduce power consumption by the device. Allowable Subject Matter Claim 21 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. -Tu US 20230328859 Any inquiry concerning this communication or earlier communications from the examiner should be directed to TOWFIQ ELAHI whose telephone number is (571)270-1687. The examiner can normally be reached M-F: 10AM-3PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Boddie can be reached at (571)272-0666. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TOWFIQ ELAHI/Primary Examiner, Art Unit 2625
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Prosecution Timeline

Dec 10, 2025
Application Filed
Sep 04, 2026
Non-Final Rejection mailed — §102, §103, §DOUBLEPATENT (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
94%
With Interview (+14.4%)
2y 5m (~1y 8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 743 resolved cases by this examiner. Grant probability derived from career allowance rate.

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