Technology area: Semiconductors, Circuits & Optics
2 pending office actions • 2 art units • 2 examiners • 0 of 2 (0%) have an AI response strategy ready • 4 patents granted in the last 365 days
Oip Technology Pte. Ltd. has 2 pending office actions in the Semiconductors, Circuits & Optics technology area. These actions are distributed across 2 distinct examiners and 2 distinct art units, showing a lack of concentration in a single administrative group. This distribution suggests that the company's technological interests within the Semiconductors field are diverse enough to trigger reviews from different specialized units at the patent office. Managing 2 distinct art units requires a strategy that accounts for potentially different examination styles.
LEPISTO, RYAN A is identified as the busiest examiner for the portfolio, with 1 pending office action. This indicates that the 2 pending actions are split evenly among the 2 distinct examiners involved, as no single examiner holds a majority of the workload. For the practitioner, this means that each pending matter is being treated independently by different staff members. The fact that the busiest examiner handles only 1 pending office action reflects a low-density prosecution environment where each examiner can focus on a single case for this applicant.
Based on the USPTO statutory response window for each pending office action. 2 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §103 only | 1 (50%) |
| §112 only | 1 (50%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| LEPISTO, RYAN A | 1 | 87.7% | +7.8% |
| NEWTON, VALERIE N | 1 | 84.2% | +5.9% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18606469 | SILICON PHOTONIC CHIP PACKAGE MODULE BASED ON PLASTIC ENCAPSULATION | LEPISTO, RYAN A | 1d overdue |
| 17892348 | DRIVER CHIP, PACKAGING METHOD FOR OPTICAL FILTER STRUCTURE, OPTICAL SENSOR DEVICE AND PACKAGING METHOD THEREOF | NEWTON, VALERIE N | 13d |
| Art Unit | Apps |
|---|---|
| 2874 | 1 |
| 2897 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 18606469 | SILICON PHOTONIC CHIP PACKAGE MODULE BASED ON PLASTIC ENCAPSULATION | LEPISTO, RYAN A | 2874 | §103 | Final Rejection | 1d overdue | Pending | Mar 15, 2024 |
| 17892348 | DRIVER CHIP, PACKAGING METHOD FOR OPTICAL FILTER STRUCTURE, OPTICAL SENSOR DEVICE AND PACKAGING METHOD THEREOF | NEWTON, VALERIE N | 2897 | §112 | Final Rejection | 13d | Pending | Aug 22, 2022 |
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