Prosecution Insights
Last updated: October 04, 2026

Renosac Corporation

Technology area: Semiconductors, Circuits & Optics

1 pending office actions • 1 art units • 1 examiners • 0 of 1 (0%) have an AI response strategy ready

Analysis

Renosac Corporation currently manages 1 pending office action within the Semiconductors, Circuits & Optics technology area. This specific matter is assigned to 1 distinct examiner, CHEN, JACK S J, who also serves as the busiest examiner for the portfolio. The prosecution activity is concentrated within 1 distinct art unit, reflecting a focused technical scope for the company patent portfolio.

Practitioners should note that with 1 pending office action and 1 distinct examiner, the current prosecution strategy is highly centralized. Because the busiest examiner handles the 1 busiest examiner pending matter, the outcome of this specific interaction will dictate the immediate progress of the company intellectual property. The reliance on 1 distinct art unit suggests that the pending application falls within a specialized regulatory or examination group within the Semiconductors, Circuits & Optics sector.

This singular focus allows the legal team to concentrate their resources on the specific examination style of CHEN, JACK S J. However, the lack of diversity in examiners or art units means that any procedural delays will affect the entire active portfolio. Navigating the active matter requires a precise response tailored to the technical standards of the assigned art unit.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Portfolio Summary

1
Total Pending OAs
1
Non-Final OAs
0
Final Rejections
0
Advisory / Quayle

Response Deadline Pressure

Based on the USPTO statutory response window for each pending office action. 1 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.

0
Overdue
0
Due this week
1
Due this month
0
Due in next 60 days
0
Due later

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

0
Hard (0%)
1
Medium (100%)
0
Easy (0%)
0
Unknown (0%)

Rejection Statute Mix

BucketCases
§103 only1 (100%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

0
Life Sciences
0% of docket
0
Information Tech
0% of docket
0
Communications
0% of docket
1
Semiconductors
100% of docket
0
Mechanical / Eng
0% of docket
0
Business / Other
0% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

10 h
Manual time on pending OAs
2 h
Time saved (low, 20%)
4 h
Time saved (mid, 35%)
0.1 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
CHEN, JACK S J 1 76.7% +5.6%

Top Art Units

Art UnitApps
2893 1

Pending Office Actions

App #TitleExaminerArt UnitStatutesStatusDue inAIFiled
17879118 SiC EPITAXIAL WAFER AND METHOD FOR MANUFACTURING SiC EPITAXIAL WAFER CHEN, JACK S J 2893 §103Other Non-Final OA 27d Pending Aug 02, 2022

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