Listed by the USPTO as HAIDER, WASIUL
Tech Center 2800 • Art Units: 2812 2814 2819
This examiner grants 92% of resolved cases
HAIDER, WASIUL is a USPTO patent examiner in tech center 2800 and art unit 2812. The profile includes 554 resolved cases, a 92.1% allowance rate, and a median of 712 days to allowance. The 6.4% interview lift is limited, indicating that the high allowance outcome was not accompanied by a large measured interview effect.
The leading companies are Samsung Electronics Co., Ltd., Canon Inc., and LG Display Co., Ltd. The leading firms are AP3 Law Firm (Diodes), BIRCH STEWART KOLASCH & BIRCH, LLP, and CONLEY ROSE, P.C. These recurring names provide practical context for counsel handling similar assignments.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18417937 | THREE-DIMENSIONAL MEMORY DEVICE AND METHOD OF FABRICATING THE SAME | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18541254 | SEMICONDUCTOR CHIP AND METHOD OF MANUFACTURING THE SAME | Final Rejection | SAMSUNG ELECTRONICS CO., LTD |
| 18538340 | LIGHT-EMITTING ELEMENT | Final Rejection | CANON KABUSHIKI KAISHA |
| 18465192 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE | Final Rejection | ROHM CO., LTD. |
| 18827353 | ELECTRONIC COMPONENT | Non-Final OA | STMicroelectronics International N.V. |
| 18779804 | EPITAXIAL SOURCE/DRAIN STRUCTURE AND METHOD | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
| 18838300 | SEMICONDUCTOR PACKAGE, SEMICONDUCTOR PACKAGE INTERMEDIATE, REDISTRIBUTION LAYER CHIP, REDISTRIBUTION LAYER CHIP INTERMEDIATE, METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE, AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE INTERMEDIATE | Non-Final OA | DAI NIPPON PRINTING CO., LTD. |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy92.1% of resolved applications examined by Wasiul Haider were allowed (554 resolved cases), compared with 82.1% across Art Unit 2812 over the last five years.
This examiner's interview lift is +6.4 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Wasiul Haider took 712 days on average from filing to allowance.
Wasiul Haider examines applications in Art Unit 2812 in Tech Center 2800 (Semiconductors, Circuits & Optics).
