Listed by the USPTO as NICELY, JOSEPH C
Tech Center 2800 • Art Units: 2813
This examiner grants 78% of resolved cases
NICELY, JOSEPH C works in tech center 2800 and art unit 2813. The profile covers 813 resolved cases, with an allowance rate of 77.7% and a median of 879 days to allowance. The interview lift is 19.9%, indicating that interviews are associated with a meaningful increase in allowance outcomes in this record.
The listed company mix centers on Samsung Electronics Co., Ltd., Taiwan Semiconductor Manufacturing Company, Ltd., and United Microelectronics Corp. The principal firms are NORTH AMERICA INTELLECTUAL PROPERTY CORPORATION, BIRCH STEWART KOLASCH & BIRCH, LLP, and BROOKS, CAMERON & HUEBSCH, PLLC. Practitioners handling work before this examiner can use the company and firm lists to identify recurring prosecution patterns, while the allowance and timing figures provide a practical baseline for planning amendment and interview strategy.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18412778 | MAGNETIC MEMORY DEVICE | Non-Final OA | Samsung Electronics Co., Ltd. |
| 18502702 | SEMICONDUCTOR PACKAGE | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18302905 | DISPLAY DEVICE AND METHOD OF PROVIDING THE SAME | Non-Final OA | Samsung Display Co., LTD. |
| 18115617 | SEMICONDUCTOR DEVICE | Non-Final OA | Toshiba Electronic Devices & Storage Corporation |
| 18179197 | SEMICONDUCTOR DEVICE, INTEGRATED CIRCUIT, AND ELECTRONIC DEVICE | Non-Final OA | HUAWEI DIGITAL POWER TECHNOLOGIES CO., LTD. |
| 18088546 | GALLIUM NITRIDE (GAN) TRANSISTORS WITH LATERAL DRAIN DEPLETION | Final Rejection | Intel Corporation |
| 18671908 | ELECTRONIC APPARATUS AND MANUFACTURING METHOD THEREOF | Non-Final OA | Innolux Corporation |
| 18611180 | POWER MODULE | Non-Final OA | Kia Corporation |
| 18511007 | TWIN CHANNEL ACCESS DEVICE FOR VERTICAL THREE-DIMENSIONAL MEMORY | Non-Final OA | Micron Technology, Inc. |
| 18567162 | III-V, II-VI IN-SITU COMPLIANT SUBSTRATE FORMATION | Final Rejection | The Regents of the University of California |
| 17502692 | FIELD PLATE ARRANGEMENT FOR TRENCH GATE FET | Final Rejection | TEXAS INSTRUMENTS INCORPORATED |
| 18644451 | THERMAL PERFORMANCE OF STACKED DIES | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18603046 | Semiconductor Structure with Gate Isolation Layer and Manufacturing Method Thereof | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
| 18360555 | SEMICONDUCTOR DIE STACKING ARCHITECTURE AND CONNECTION METHOD THEREFORE | Final Rejection | Sandisk Technologies, Inc. |
| 18502103 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | Final Rejection | UNITED MICROELECTRONICS CORP. |
| 18152845 | SEMICONDUCTOR DEVICE AND ESD PROTECTION DEVICE COMPRISING THE SAME | Final Rejection | NEXPERIA B.V. |
| 18228713 | FIELD-EFFECT TRANSISTORS WITH A GATE DIELECTRIC LAYER FORMED ON A SURFACE TREATED BY ATOMIC LAYER ETCHING | Non-Final OA | GlobalFoundries U.S. Inc. |
| 18407695 | FIELD EFFECT TRANSISTOR INCLUDING FIELD PLATES | Final Rejection | MACOM Technology Solutions Holdings, Inc. |
| 18602879 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR | Non-Final OA | ENKRIS SEMICONDUCTOR, INC. |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy77.7% of resolved applications examined by Joseph C Nicely were allowed (813 resolved cases), compared with 80.3% across Art Unit 2813 over the last five years.
This examiner's interview lift is +19.9 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Joseph C Nicely took 879 days on average from filing to allowance.
Joseph C Nicely examines applications in Art Unit 2813 in Tech Center 2800 (Semiconductors, Circuits & Optics).
