Listed by the USPTO as TORRES, JOSEPH D
Tech Center 2100 • Art Units: 2112
This examiner grants 78% of resolved cases
TORRES, JOSEPH D works in tech center 2100 and art unit 2112. The profile covers 991 resolved cases, with an allowance rate of 78.3% and a median of 1069 days to allowance. The interview lift is 11.9%, indicating that examiner interviews may assist prosecution but are not the principal distinguishing feature of the record.
Qualcomm Incorporated is the listed company, and Patterson + Sheridan, L.L.P. is the listed firm. The concentrated company and firm data gives applicants a narrow but concrete reference set for reviewing related prosecution histories. The resolved-case volume provides a substantial basis for assessing the reported allowance and timing measures.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18968863 | METHODS AND APPARATUS FOR COMPACTLY DESCRIBING LIFTED LOW-DENSITY PARITY-CHECK (LDPC) CODES | Non-Final OA | QUALCOMM Incorporated |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy78.3% of resolved applications examined by Joseph D Torres were allowed (991 resolved cases), compared with 80.8% across Art Unit 2112 over the last five years.
This examiner's interview lift is +11.9 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Joseph D Torres took 1,069 days on average from filing to allowance.
Joseph D Torres examines applications in Art Unit 2112 in Tech Center 2100 (Computing & Software).
