Listed by the USPTO as WAJE, CARLO C
Tech Center 2100 • Art Units: 2151 2182 2183
This examiner grants 68% of resolved cases
WAJE, CARLO C is assigned to Tech Center 2100 and Art Unit 2151, with 247 resolved cases. The allowance rate is 67.6%, and the median time to allowance is 1169 days. Interview lift is 35.2%, indicating a strong positive association between interviews and allowance outcomes.
Intel Corporation, Samsung Electronics Co., Ltd., and Robert Bosch GmbH are the leading companies. NSIP LAW, Sheppard Mullin Richter & Hampton LLP, and Alliance IP, LLC - Intel are the leading firms. Interviews may have practical value in advancing applications, while the median timing supports addressing examination issues without delay.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18194894 | STATIC CMOS-BASED COMPACT FULL ADDER CIRCUITS | Non-Final OA | Samsung Electronics Co., Ltd. |
| 18108718 | IN MEMORY COMPUTING PROCESSOR AND METHOD THEREOF WITH DIRECTION-BASED PROCESSING | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 17862500 | METHOD AND APPARATUS WITH DATA COMPRESSION | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 17397082 | NEURAL NETWORK OPERATION METHOD AND DEVICE | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18148259 | MULTIPLY-ACCUMULATE SUCCESSIVE APPROXIMATION DEVICES AND METHODS | Non-Final OA | ROBERT BOSCH GMBH |
| 17867286 | Aggregating a dataset into a function term with the aid of transformer networks | Final Rejection | Robert Bosch GmbH |
| 18125581 | Method for Processing Floating Point Number and Related Device | Non-Final OA | Huawei Technologies Co., Ltd. |
| 17864732 | ARITHMETIC LOGIC UNIT, FLOATING-POINT NUMBER MULTIPLICATION CALCULATION METHOD, AND DEVICE | Final Rejection | HUAWEI TECHNOLOGIES CO., LTD. |
| 18169230 | CALCULATION METHOD AND INFORMATION PROCESSING APPARATUS | Non-Final OA | Fujitsu Limited |
| 18061324 | TECHNIQUES FOR THREAD REDUCTION IN PROCESSING TENSORS UTILIZING SPARSITY DETECTION | Final Rejection | QUALCOMM Incorporated |
| 18148057 | MULTIPLY-ACCUMULATE SHARING CONVOLUTION CHAINING FOR EFFICIENT DEEP LEARNING INFERENCE | Final Rejection | Intel Corporation |
| 17832999 | CONTROL LOGIC FOR CONFIGURABLE AND SCALABLE MULTI-PRECISION OPERATION | Final Rejection | Intel Corporation |
| 18222989 | Memory-Size- and Bandwidth-Efficient Method for Feeding Systolic Array Matrix Multipliers | Final Rejection | Altera Corporation |
| 18145002 | SYSTEMS AND METHODS FOR DECOMPOSED DIGITAL FILTER | Non-Final OA | Altera Corporation |
| 18247942 | ESTIMATION METHOD, ESTIMATION APPARATUS AND PROGRAM | Non-Final OA | NIPPON TELEGRAPH AND TELEPHONE CORPORATION |
| 18913524 | METHODS AND APPARATUS FOR PERFORMING MATRIX TRANSFORMATIONS WITHIN A MEMORY ARRAY | Non-Final OA | Micron Technology, Inc. |
| 17682520 | PROCESSOR INSTRUCTION SET ARCHITECTURE FOR MACHINE LEARNING WITH LOW BIT PRECISION WEIGHTS | Final Rejection | TEXAS INSTRUMENTS INCORPORATED |
| 18047377 | OPTIMIZATION OF EXPECTATION VALUE CALCULATION WITH STATEVECTOR | Final Rejection | International Business Machines Corporation |
| 17717111 | SERVER AND ACCELERATOR FOR NEURAL NETWORK COMPUTATIONS | Final Rejection | Alibaba (China) Co., Ltd. |
| 18089370 | TRNG Conditioning Component with Extended Output Capability | Final Rejection | SK hynix Inc. |
| 18150810 | COMPUTATION METHOD AND COMPUTATION APPARATUS WITH INPUT SWAPPING | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 17558105 | COMPUTE IN MEMORY ACCUMULATOR | Final Rejection | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 17583411 | IMPLEMENTING DILATED CONVOLUTION IN HARDWARE | Final Rejection | Imagination Technologies Limited |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy67.6% of resolved applications examined by Carlo C Waje were allowed (247 resolved cases), compared with 81.0% across Art Unit 2151 over the last five years.
This examiner's interview lift is +35.2 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Carlo C Waje took 1,169 days on average from filing to allowance.
Carlo C Waje examines applications in Art Unit 2151 in Tech Center 2100 (Computing & Software).
