Prosecution Insights
Last updated: July 17, 2026
Application No. 16/340,702

A PROCESSING APPARATUS AND A METHOD FOR CORRECTING A PARAMETER VARIATION ACROSS A SUBSTRATE

Final Rejection §103§112
Filed
Apr 10, 2019
Priority
Oct 17, 2016 — EU 16194224.8 +2 more
Examiner
MOORE, KARLA A
Art Unit
1716
Tech Center
1700 — Chemical & Materials Engineering
Assignee
ASML Holding N.V.
OA Round
7 (Final)
43%
Grant Probability
Moderate
8-9
OA Rounds
0m
Est. Remaining
57%
With Interview

Examiner Intelligence

Grants 43% of resolved cases
43%
Career Allowance Rate
335 granted / 777 resolved
-21.9% vs TC avg
Moderate +14% lift
Without
With
+13.9%
Interview Lift
resolved cases with interview
Typical timeline
4y 1m
Avg Prosecution
53 currently pending
Career history
848
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
74.3%
+34.3% vs TC avg
§102
4.3%
-35.7% vs TC avg
§112
15.6%
-24.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 777 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application is being examined under the pre-AIA first to invent provisions. Drawings Replacement drawings were received on 10 February 2026. These drawings are acceptable. Specification Specification amendments were received on 10 February 2026. The amendments are acceptable. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: corrective elements (i.e. elements/means for correcting…) in claims 1 and 7 which have been interpreted as thermal zones and equivalents thereto as set forth in the specification, e.g., at para. 28. Note: “heating elements” is not deemed to define a specific structure and therefore has not been included in the interpretation. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-5, 7, 12 and 14 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Applicant’s original claims and specification recite “corrective elements are arranged along at least one axis having a direction other than parallel to the x-axis OR the y-axis” whereas presently the claims recite “corrective elements are arranged along at least one axis having a direction other than parallel to the x-axis AND the y-axis” (claim 1) or “correction to be made by the corrective elements along a direction other than parallel to the x-axis AND the y-axis” (claim 7). Examiner is unable to find explicit or implicit support for the claim limitations and requests Applicant’s assistance in pointing out the same. Nevertheless, the claims have been examined as written. Additional Claim Interpretations A first correction axis parallel to a first axis of the grid has been interpreted to be at least inclusive of the first correction axis and the first axis as overlapping and/or being in alignment in the respective x and y directions prior to loading by the effector according to the routine. A similar and corresponding interpretation has been made with respect to the second correction axis and the second axis. Applicant is invited to clarify and/or comment, if necessary. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1-5, 7, 12 and 14-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent No. 6,912,436 to Jones et al. in view of U.S. Patent Pub. No. 2005/0217799 to O’Meara et al. and U.S. Patent No. 6,778,876 to Coss, Jr. et al. Regarding claim 1: Jones et al. disclose a semiconductor manufacturing system (Fig. 7, 300) to process a substrate (105) having a rectilinear grid (Fig. 1, 150) of physical field portions (130) having an x-axis (horizontal axis in Fig. 1) and a y-axis (vertical axis in Fig. 1), each physical field portion having features of a die contained entirely in that physical field portion, the semiconductor manufacturing system comprising: a substrate processing apparatus (e.g. 710b) for performing a process on the substrate; a effector/robot (not illustrated, see, e.g., column 9, row 50 through column 10, row 7) configured to load the substrate having the rectilinear grid of physical field portions on the substrate to the substrate processing apparatus; metrology units (e.g. 750; see, esp., e.g., column 10, row 35 through column 11, row 4) for providing information relating to the grid of physical field portions on the substrate; and a non-transitory computer readable medium (e.g., 732; also see, e.g., column 9, row 50 through column 12, row 55; also see Fig. 3 and accompanying text) having instructions therein, the instructions programmed, upon execution by a computer system (e.g., a plurality of structures, at least 730, 760, 310, 320, 330, 350, 360 and 740), to cause the computer system to perform overall control of processing operations of the semiconductor manufacturing system, including a routine that obtains the information relating to the grid of physical field portions on the that substrates, which may be used in a feed-forward or feed-back manner with respect to the substrate processing apparatus. Jones et al. fail to explicitly teach the x-axis and y-axis as orthogonal. However, they appear to be arranged orthogonal to one another in a way that is well-known and usually provided in the art, such that it would have been obvious to one of ordinary skill in the art exercising ordinary creativity, common sense and logic to provide them as such. Jones et al. fail to explicitly disclose the substrate processing apparatus comprising corrective elements configured to enable local correction of a characteristic of the process to be performed on the substrate having the grid of physical field portions, wherein the corrective elements are arranged in a rectilinear grid having a first correction axis parallel to a first axis of the grid along which (some of) the corrective elements are arranged and a second correction axis orthogonal to the first correction axis and parallel to a second axis of the grid along which (some of) the corrective elements are arranged, the second axis of the grid orthogonal to the first axis of the grid and wherein the instructions cause the effector to load the substrate to the corrective elements so as to orient the substrate such that on loading of the substrate by the effector, the first correction axis and/or the second correction axis is arranged to have a direction other than parallel to the x-axis and the y-axis of the grid of physical field portions. O’Meara et al. explicitly and tangibly disclose a substrate processing apparatus capable of etching (Fig. 1, 100) including, inter alia, a substrate holder (140) with a heating unit (142), wherein the heating unit comprises corrective elements (i.e. heating segments) configured to enable local correction of a characteristic of a process to be performed on a substrate, wherein the corrective elements may be arranged according to a polar (see, e.g., Fig. 3B-C), curvilinear (see, e.g., Fig. 3A), or rectilinear grid (see, e.g., Fig. 4) for, inter alia, allowing independent control of selected regions of the substate (see, e.g., paras. 74-80 and 182-184, 185-195, 201-214). O’Meara et al. further disclose providing the apparatus with an effector configured to load the substrate to the heating unit with the corrective elements (including, e.g., Fig. 13, substrate positioner 1340) for the purpose of averaging out small differences in heat delivery and heat loss such that process/wafer uniformity may be improved and yield increased, by e.g., rotating the substrate and/or a portion of the heater with the plurality of corrective elements (see, e.g., paras. 74-80 and 182-184, 185-195, 201-214). O’Meara does not limit to any particular relative orientation of the corrective elements with respect to a substrate (rather it discloses examples) and generically teaches optimization of the orientation and the substrate placed thereon based on different process recipes, different chamber pressures, different process chemistries, different process gas flows, different wafer types and different process times. O’Meara also teaches that a thermal response of a substrate will change during a series of processing steps. Coss, Jr. et al. disclose providing a substrate (see, e.g., Fig. 1, 11) having a grid of physical field portions having an x-axis and an orthogonal y-axis wherein the substrate may be placed in a process tool (see, e.g., Fig. 3, 34) at any rotation angle from 0-360° for the purpose of minimizing defective die on the substrate produced by the process tool which is performing a subsequent process therein (see, e.g., abstract and column 6, rows 42-60). Various rotations as described by O’Meara et al. and Coss, Jr. et al. would allow for the claimed relative orientation (i.e. the first correction axis and/or the second correction axis is arranged to have a direction other than parallel to the X-axis and the Y-axis of the grid of physical field portions) of a substrate (having the grid of physical field portions) and corrective elements. Additionally, Examiner notes that the courts have ruled that where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Thus, it would have been obvious to one of ordinary skill in the art before Applicant’s invention was effectively filed to have provided corrective elements oriented as claimed and a non-transitory-computer readable medium having instructions therein, the instructions programmed, upon execution by a computer system, to cause the computer system to perform a routine that processes information relating to the grid of physical field portions on the substrate and that causes, based on the information, the effector to load the substrate to corrective elements so as to orient the substrate such that, on loading the of the substrate to the corrective elements by the effector, the first correction axis and/or the second correction axis is arranged to have a direction other than parallel to the x axis and the y-axis of the grid of physical field portions in order enable local correction of a characteristic of a process to be performed on the substrate in the substrate processing apparatus and to average out small differences in heat delivery and heat loss such that process/wafer uniformity may be improved and yield increased, as well as well as to minimize defective die on the substrate produced by the substrate processing apparatus which is performing a subsequent process as taught by O’Meara et al. and Coss, Jr. et al. With respect to claim 2, in modified Jones et al., the first and/or second correction axis is oriented within a plane parallel to the substrate or within a plane parallel to a substrate to the substrate holder (140 of O’Meara et al.) of the substrate processing apparatus. With respect to claim 3, in modified Jones et al., O’Meara et al. disclose the corrective elements may be arranged according to the rectilinear grid layout, and with rotation thereof as taught by O’Meara et al. and Coss, Jr. et al., the first and/or second correction axis is arranged at an angle of 45+/- 40 degrees relative to the x-axis or the y-axis of the grid of physical filed portions. With respect to claim 4, in modified Jones et al., O’Meara et al. disclose the effector is configured to provide a rotation to the substrate relative to the first and/or second correction axis. With respect to claim 5, in modified Jones et al., as taught by O’Meara et al. and Coss, Jr. et al., the effector is configured to allow selection of the angle of rotation between he first and/or second correction axis is arranged at an angle of 45+/- 40 degrees relative to the x-axis or the y-axis of the grid of physical filed portions. With respect to claim 12, in modified Jones et al., each of Jones et al., Coss, Jr. et al. and O’Meara et al. disclose the substrate processing apparatus may be configured to perform an etching operation. Examiner also notes that this is considered an intended use of the apparatus, wherein the courts have ruled that a claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). Regarding claim 7: Jones et al. disclose a semiconductor manufacturing system (Fig. 7, 300) to process a substrate (105) having a grid (Fig. 1, 150) of physical field portions (130) having an x-axis (horizontal axis in Fig. 1) and a y-axis (vertical axis in Fig. 1), semiconductor manufacturing system comprising: a substrate processing apparatus (e.g. 710b) for performing a process on the substrate; a effector/robot (not illustrated, see, e.g., column 9, row 50 through column 10, row 7) configured to load the substrate to the substrate processing apparatus; an apparatus (other than the substrate processing apparatus)(e.g. 710a) for making corrections to physical features formed or being formed on the substrate; metrology units (e.g. 750; see, esp., e.g., column 10, row 35 through column 11, row 4) for providing information regarding the corrections made in the x-axis and/or y-axis direction; and a non-transitory computer readable medium (e.g., 732; also see, e.g., column 9, row 50 through column 12, row 55; also see Fig. 3 and accompanying text) having instructions therein, the instructions programmed, upon execution by a computer system (e.g., a plurality of structure, at least 730, 760, 310, 320, 330, 350, 360 and 740), to cause the computer system to perform overall control of processing operations of the semiconductor manufacturing system, including a routine that obtains the information regarding corrections made in the x-axis and/or y-axis direction which may be used in a feed-forward or feed-back manner with respect to the substrate processing apparatus of the apparatus other than the substrate apparatus. Jones et al. fail to explicitly teach the x-axis and y-axis as orthogonal. However, they appear to be arranged orthogonal to one another in a way that is well-known and usually provided in the art, such that it would have been obvious to one of ordinary skill in the art exercising ordinary creativity, common sense and logic to provide them as such. Jones et al. fail to explicitly disclose the substrate processing apparatus comprising corrective elements configured to enable local correction of a characteristic of the process to be performed on the substrate having the grid of physical field portions having the x-axis and the orthogonal y-axis, wherein the corrective elements are arranged according to a polar, curvilinear or rectilinear grid layout and wherein the instructions optimize those corrections made with the correction capability of the corrective elements to provide an additional correction to be made by the corrective elements along a direction other than parallel to the X-axis and the Y-axis. O’Meara et al. explicitly and tangibly disclose a substrate processing apparatus capable of etching (Fig. 1, 100) including, inter alia, a substrate holder (140) with a heating unit (142), wherein the heating unit comprises corrective elements (i.e. heating segments) configured to enable local correction of a characteristic of a process to be performed on a substrate, wherein the corrective elements may be arranged according to a polar (see, e.g., Fig. 3B-C), curvilinear (see, e.g., Fig. 3A), or rectilinear grid (see, e.g., Fig. 4) for, inter alia, allowing independent control of selected regions of the substate (see, e.g., paras. 74-80 and 182-184, 185-195, 201-214). O’Meara et al. further disclose providing the apparatus with an effector configured to load the substrate to the heating unit with the corrective elements (including, e.g., Fig. 13, substrate positioner 1340) for the purpose of averaging out small differences in heat delivery and heat loss such that process/wafer uniformity may be improved and yield increased, by e.g., rotating the substrate and/or a portion of the heater with the plurality of corrective elements (see, e.g., paras. 74-80 and 182-184, 185-195, 201-214). O’Meara does not limit to any particular relative orientation of the corrective elements with respect to a substrate (e.g., one having the grid of physical field portions). Rather, generically teaches optimization of the orientation and the substrate placed thereon based on different process recipes, different chamber pressures, different process chemistries, different process gas flows, different wafer types and different process times. O’Meara also teaches that a thermal response of a substrate will change during a series of processing steps. Coss, Jr. et al. disclose providing a substrate (see, e.g., Fig. 1, 11) having a grid of physical field portions having an x-axis and an orthogonal y-axis wherein the substrate may be placed in a process tool (see, e.g., Fig. 3, 34) at any rotation angle from 0-360° for the purpose of minimizing defective die on the substrate produced by the process tool which is performing a subsequent process therein (see, e.g., abstract and column 6, rows 42-60). Various rotations as described by O’Meara et al. and Coss, Jr. et al. would allow for the claimed relative orientation (i.e. the first correction axis and/or the second correction axis is arranged to have a direction other than parallel to the X-axis and the Y-axis of the grid of physical field portions) of a substrate (having the grid of physical field portions) and corrective elements. Additionally, Examiner notes that the courts have ruled that where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Thus, it would have been obvious to one of ordinary skill in the art before Applicant’s invention was effectively filed to have provided corrective elements oriented as claimed and a non-transitory-computer readable medium having instructions therein, the instructions programmed, upon execution by a computer system, to cause the computer system to perform a routine that processes information relating to the grid of physical field portions on the substrate and that causes, based on the information, the effector to load the substrate to the corrective elements so as to orient the substrate such that, on loading the of the substrate to the corrective elements by the effector, an additional correction is performed wherein the first correction axis and/or the second correction axis is arranged to have a direction other than parallel to the x axis and the y-axis of the grid of physical field portions in order enable local correction of a characteristic of a process to be performed in the substrate processing apparatus on the substrate and to average out small differences in heat delivery and heat loss such that process/wafer uniformity may be improved and yield increased, as well as well as to minimize defective die on the substrate produced by the substrate processing apparatus which is performing a subsequent process as taught by O’Meara et al. and Coss, Jr. et al. With respect to claim 14, in modified Jones et al., O’Meara et al. disclose the corrective elements may be arranged according to the rectilinear grid layout, and with rotation thereof as taught by O’Meara et al. and Coss, Jr. et al., the grid of physical field portions on the substrate may be angled at an oblique angle relative to the grid layout of the corrective elements. With respect to claim 15, n modified Jones et al., O’Meara et al. disclose the corrective elements may be arranged according to the rectilinear grid layout, and with rotation thereof as taught by O’Meara et al. and Coss, Jr. et al., the grid of physical field portions on the substrate may be arranged at an angle of 45+/- 40 degress relative to the grid layout of the corrective elements. With respect to claim 16, in modified Jones et al., O’Meara et al. disclose the effector is configured to provide a rotation between the grid of physical field portions on the substrate and the grid layout of the corrective. With respect to claim 17, in modified Jones et al., each of Jones et al., Coss, Jr. et al. and O’Meara et al. disclose the substrate processing apparatus may be configured to perform an etching operation. Examiner also notes that this is considered an intended use of the apparatus, wherein the courts have ruled that a claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). Response to Arguments According to normal US practice, all claims will be reconsidered for rejoinder upon allowance. Previous rejections under 35 USC 112, b have been withdrawn based on Applicant’s amendments. Applicant's remaining arguments filed 10 February 2026 have been fully considered but they are not persuasive, for reasons set forth below. In response to Applicant’s arguments/traversal with respect to rejections under 35 USC 112a, Examiner does not agree that in standard usage “or” is inclusive of “and”, nor does Applicant’s original disclosure indicate the same. Applicant is invited to provided further evidence on the record if they so desire. Examiner would also suggest comparing and contrasting “standard usage” to patent examination protocol, as they are not necessarily or always one and the same. Additionally, Applicant points to Fig. 2B, but Fig. 2B does not appear show the arrangement of the grid of physical field portions. Thus, the rejections remain. In response to Applicant’s arguments/traversal regarding claim interpretation, Examiner notes that the interpretation does not end with or only include the language “the first correction axis parallel to a first axis of the grid has been interpreted to be at least inclusive of the first correction axis”. Examiner submits that the remainder of the interpretation is also important. Further, the whole of the interpretation is meant to clarify how the claimed parallelism is being interpreted, where details in the original disclosure are scarce and/or obtuse. Finally, in response to Applicant’s traversal of the prior art rejection of claims 1 and 7, which rely upon a combination of the teachings of prior art references Jones, O’Meara and Coss Jr., Applicant has pointed out individual features that are not particularly addressed with respect newly applied reference Coss Jr., but has not addressed how these features are addressed with the other relied upon prior art references that are part of the combination. It particular it is noted that the teachings of Coss Jr, et al. are considered to complement and supplement the teachings of the other relied upon prior art references in a way the that renders the claimed invention obvious. As has been previously stated in examination, the courts have ruled that the test for obviousness is not whether the features of a secondary reference may be bodily incorporated into the structure of the primary reference; nor is it that the claimed invention must be expressly suggested in any one or all of the references. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); and also the courts have ruled in response to Applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). Examiner maintains that it is the combination of teachings as set forth in the rejections presented above that render the claimed invention obvious. Thus, Applicant’s arguments provided against Coss Jr. alone are not persuasive and the pending claims remain rejected over the combination of relied upon prior art references. Regarding previous rejections under 35 USC 112, b rejections have been withdrawn. After careful review of the claims and the original disclosure, Examiner has additional understanding of the claims as presently set forth, wherein previous issues with respect to the claim language have been overcome by amendments to the same. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. U.S. Patent Pub. No. 6,440,821 discloses a method and apparatus for aligning wafers in a semiconductor processing system. At the time of office action mailed 29 May 2026, no additional more relevant prior art was located. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to whose telephone number is (571)272-1440. The examiner can normally be reached on Monday-Friday, 9am-6pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, PARVIZ HASSANZADEH can be reached on (571) 272-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see https://ppair-my.uspto.gov/pair/PrivatePair. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KARLA A MOORE/Primary Examiner, Art Unit 1716
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Prosecution Timeline

Show 8 earlier events
Jul 20, 2023
Final Rejection mailed — §103, §112
Dec 20, 2023
Request for Continued Examination
Dec 26, 2023
Response after Non-Final Action
Nov 08, 2024
Non-Final Rejection mailed — §103, §112
May 01, 2025
Response Filed
Aug 12, 2025
Non-Final Rejection mailed — §103, §112
Feb 10, 2026
Response Filed
Jun 03, 2026
Final Rejection mailed — §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12668877
UNIFORM DEPOSITION
6y 8m to grant Granted Jun 30, 2026
Patent 12603260
APPARATUS FOR TREATING SUBSTRATE AND METHOD FOR TREATING SUBSTRATE
3y 5m to grant Granted Apr 14, 2026
Patent 12588451
BOTTOM PURGE FOR SEMICONDUCTOR PROCESSING SYSTEM
5y 11m to grant Granted Mar 24, 2026
Patent 12580165
APPARATUS FOR TREATING SUBSTRATE AND METHOD FOR MEASURING DEGREE OF WEAR OF CONSUMABLE COMPONENT
4y 5m to grant Granted Mar 17, 2026
Patent 12575357
INTEGRATED WET CLEAN FOR GATE STACK DEVELOPMENT
3y 8m to grant Granted Mar 10, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

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Prosecution Projections

8-9
Expected OA Rounds
43%
Grant Probability
57%
With Interview (+13.9%)
4y 1m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 777 resolved cases by this examiner. Grant probability derived from career allowance rate.

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