Attorney’s Docket Number: 44017349US02
Filing Date: 11/4/2020
Claimed Priority Date: 11/5/2019 (US 62/931,211)
Inventors: Yang et al.
Examiner: Marcos D. Pizarro
DETAILED ACTION
This Office action responds to the amendment/declaration filed on 4/14/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA (or as subject to pre-AIA ) is incorrect, any correction of the statutory basis for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Continued Examination Under 37 CFR 1.114
A request for continued examination (RCE) under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after the final rejection in paper no. 15, mailed 1/14/2026. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 4/14/2026 has been entered.
Amendment Status
The RCE submission filed on 4/14/2026 as an amendment in reply to the Office action in paper no. 15 has been entered. The present Office action is made with all the suggested amendments being fully considered. Accordingly, pending in this Office action are claims 1, 4, 6-8 and 13-24.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 4, 6, 7 and 24 are rejected under 35 U.S.C. 103 as being unpatentable over Park (US 2017/0110316) in view of Jong (US 2020/0013897) and Nakamura (US 2014/0048885).
Regarding claim 1, Park (see, e.g., fig. 7C) shows most aspects of the instant invention including a metal gate stack 420 comprising:
A high-k metal oxide layer 414
A high-k capping layer 426A on the oxide layer, and
A PMOS work function layer 426B on the capping layer
Park also teaches several materials from which the capping and work function layers can be made, including TiSiN for the capping layer and MoN for the work function layer (see, e.g., pars. 0116 and 0118). Thus, Park expressly identifies TiSiN and MoN as materials suitable for the respective layers of the metal gate stack.
Jong (see, e.g., pars. 0114-0115), in a similar metal gate stack, further teaches that TiSiN and MoN are known work function materials. Moreover, Jong explicitly describes that the work function of a transistor may be adjusted by selecting different materials for the work function layer (see, e.g., pars. 0117-0118). Accordingly, Jong provides evidence that selection of a particular material for a work function layer was recognized as a means for adjusting the work function of a transistor.
In view of the combined teachings of Park and Jong, it would have been obvious at the time of filing the invention to a person having ordinary skill in the art (PHOSITA) to select TiSiN as the capping layer material and MoN as the PMOS work function material from among the materials expressly disclosed by Park, in order to provide a desired work function for the transistor. The selection would have been from a finite number of identified materials disclosed for their respective functions, and the claimed TiSiN/MoN combination would have been expected to perform the respective conventional functions of the capping and work function layers.
The fact that Park also discloses other materials for the capping and work function layers does not render the selection of TiSiN and MoN non-obvious. Rather, the disclosed alternatives represent known materials for performing the same respective functions, and selection of an optimum material based upon the desired work function, device performance, manufacturing considerations, and other known design considerations would have been within the level of ordinary skill in the art. In re Boesch, 617 F.2d 272, 276, 205 USPQ 215, 219 (CCPA 1980); KSR International Co. v. Teleflex Inc., 550 U.S. 398 (2007).
Park also fails to show the capping 426A and work function 426B layers comprising the recited thicknesses of these layers. However, differences in thickness will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such thicknesses are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Jong (see, e.g., pars. 0068-0069), for example, teaches that the effective work function of a gate stack depends on the thicknesses of the capping and work function layers. Accordingly, the specific claimed thicknesses, i.e., about 5-25 Å for the TiSiN capping layer and about 5-50 Å for the MoN work function layer, would have been considered suitable or optimum thicknesses that a PHOSITA would have been able to determine using routine experimentation based, among other things, on the desired effective work function, transistor performance, manufacturing considerations, etc. See In re Boesch, supra.
Since the Applicant has not established that the claimed thickness ranges are critical to obtaining a result that would have been unexpected from the teachings of Park and Jong, it would have been obvious at the time of filing the invention to a PHOSITA to use the claimed thicknesses in the device of Park.
CRITICALITY
The specification does not establish that the particular claimed thicknesses are critical to obtaining the claimed Vfb and EOT characteristics. Where patentability is said to be based upon a particular variable or dimension recited in a claim, the Applicant must show that the chosen variable or dimension is critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Regarding claims 1, 4, 6 and 7, Park teaches a metal gate stack comprising a high-k gate dielectric, a capping layer, and a work function layer. Park expressly discloses that the capping layer may be formed of TiSiN (see, e.g., par. 0116/l.4) and that the PMOS work function layer may be formed of MoN (see, e.g., par. 0118/l.5). Accordingly, Park teaches a gate stack with an improved flat-band voltage (Vfb) and a reduced EOT relative to conventional gate-stack configurations.
Park does not expressly quantify the magnitude of the Vfb improvement recited by the claims. However, Nakamura teaches that Vfb is an adjustable characteristic of a PMOS gate structure and that Vfb may be substantially adjusted by modifying the thickness of a gate-stack layer. See, e.g., Nakamura, fig. 3B and par. 0040. Nakamura reports Vfb differences of several hundred millivolts resulting from variations in the gate-stack configuration, demonstrating that substantial Vfb adjustments are achievable through adjustment of known gate-stack parameters.
Nakamura is evidence that Vfb is a result-effective characteristic of a metal gate stack and that substantial changes in Vfb may be obtained by adjusting a known gate-stack parameter, including layer thickness. Nakamura’s particular experimental data illustrated in fig. 3 is for a TiN capping layer. Nevertheless, Nakamura (¶0031/l.11) also identifies TiSiN as an alternative material for a metal-containing gate layer. More importantly, the use of Nakamura does not require the assumption that the precise numerical Vfb shift reported for TiN would necessarily be reproduced by TiSiN. Rather, Nakamura establishes that Vfb is susceptible to adjustment through modification of the gate-stack configuration, thereby providing a reason for a person having ordinary skill in the art to optimize the relevant gate-stack parameters when implementing the TiSiN/MoN combination suggested by Park and Jong.
Accordingly, it would have been obvious at the time of filing the invention to a PHOSITA to implement the TiSiN/MoN gate stack taught by Park and Jong and to optimize the relevant layer thicknesses to obtain a desired Vfb, including a Vfb improvement of greater than +125 mV relative to a stack comprising a TiN PMOS work function layer. Such optimization represents no more than the routine optimization of known result-effective variables.
Furthermore, the Applicant’s own experimental results do not establish that the claimed +125 mV Vfb improvement is critical. See p. 6 of Declaration filed on 4/14/2026. The submitted data reports Vfb improvements of approximately +178 mV, +140 mV, +290 mV, and +325 mV for the tested MoN-containing structures. Thus, each of the tested MoN structures exceeds the claimed +125 mV threshold. The data therefore does not identify +125 mV as a critical boundary at which an unexpected effect suddenly occurs.
The experimental results further demonstrate that the magnitude of Vfb varies with the selected and processed gate-stack materials. For example, the reported TiSiN-capped structures exhibit Vfb improvements of approximately +178 mV and +290 mV depending upon the MoN precursor, despite the same general TiSiN/MoN layer configuration. Likewise, the TiN-capped structures exhibit Vfb improvements of approximately +140 mV and +325 mV depending upon the MoN precursor. Such variation is consistent with Vfb being a result-effective characteristic affected by material and process selection.
Accordingly, the evidence of record does not establish that the claimed +125 mV value represents a critical or unexpected result. Rather, the evidence is consistent with the conclusion that Vfb is affected by the selection and processing of the gate-stack materials and may be optimized by routine experimentation.
With respect to the claimed reduced EOT, Park teaches the use of TiSiN (¶0116) as the capping layer and MoN (¶0118) as the PMOS work function layer. The selection of TiSiN and MoN would therefore have been expected to provide the respective electrical and material characteristics associated with those known materials. To the extent the precise magnitude of the EOT reduction is not expressly disclosed by Park, the particular EOT value represents an optimization of a known device characteristic rather than a different kind of result.
Regarding claim 24, Park (see, e.g., par. 0114, ll. 6-7) shows that the oxide layer comprises HfO2.
Claims 21-23, 8 and 13-15 are rejected under 35 U.S.C. 103 as being unpatentable over Park/Jong/Nakamura in view of Clark (US 2013/0052814).
Regarding claim 8, see the comments above in paragraphs 7-23 with respect to claim 1, which are considered to be repeated here.
Regarding claims 8, 13, 14 and 21-23, Park/Jong/Nakamura teach most aspects of the instant invention including a gate stack having TiSiN (Park: ¶0116) as a capping layer and MoN (Park: ¶0118) as a work function layer, with the associated Vfb and EOT characteristics discussed above in paragraphs 16-23. Park/Jong/Nakamura, however, fail to specify the particular claimed EOT reduction values. Clark (see, e.g., par. 0031, ll. 10-15), on the other hand, teaches that EOT reductions enhance the scalability of a gate stack and the performance of a transistor.
The specific claimed EOT values, absent evidence of criticality, are considered to be optimum EOT values that a person having ordinary skill in the art would have been able to determine using routine experimentation based, among other things, on transistor performance, scalability, manufacturing considerations, etc. See In re Boesch, supra.
Furthermore, the Applicant’s submitted experimental data demonstrates that changing the capping-layer material from TiN to TiSiN reduces the EOT penalty associated with the MoN work function layer. For example, the data reports an EOT increase of approximately +0.6 Å for the TiN/MoN precursor #1 structure, compared with approximately +0.3 Å for the corresponding TiSiN/MoN precursor #1 structure. Likewise, the precursor #2 structures show an EOT increase of approximately +0.4 Å for TiN/MoN and approximately +0.05 Å for TiSiN/MoN. Thus, Applicant’s own data confirms that the capping-layer material affects the EOT characteristic of the gate stack.
Accordingly, the particular EOT values recited by the claims represent optimization of a known gate-stack characteristic, and it would have been obvious to one of ordinary skill in the art to select appropriate materials and layer thicknesses to obtain a desired EOT reduction in view of the teachings of Park, Jong, Nakamura, and Clark.
Regarding claim 15, Park (see, e.g., fig. 7C) shows the gate stack further comprising:
a substrate material 402 with an oxidized surface 412; and
a gate electrode 428 on the work function material 426B,
wherein the metal oxide layer 414 is on the oxidized surface 412
Park further teaches a gate stack having improved Vfb relative to a gate stack comprising a PMOS work function material comprising TiN (see, e.g., pars. 0116 and 0118), with the Vfb optimization discussed above in paragraphs 16-22.
Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Park//Jong/Nakamura/Clark in view of Ragnarsson (US 2015/0357244).
Regarding claim 16, Park (see, e.g., fig. 7C) shows most aspects of the instant invention including the gate electrode 428 comprising a layer of TiN. Park also teaches using the TiN layer as a gap-fill layer for the gate electrode (see, e.g., par. 0122).
Park, however, fails to teach the gate electrode additionally comprising a first layer of TiAl. Ragnarsson, in a similar gate-stack structure, teaches using a first TiAl layer and a second TiN layer as gap-filling layers for a gate electrode in a transistor. Ragnarsson further teaches that the TiAl layer may function as an additional work-function tuning layer whose presence influences the work function of the gate stack (see, e.g., par. 0070, ll. 29-35).
Accordingly, it would have been obvious at the time of filing the invention to one of ordinary skill in the art to modify the gate electrode of Park to additionally comprise the TiAl layer of Ragnarsson in order to further tune the work function of the gate stack.
Response to Arguments and Declaration
The applicants argue:
Park only discloses a list of possible materials for the capping and work function layers. Neither Park nor Jong identifies a reason, suggestion, or motivation to select TiSiN and MoN from among the disclosed alternatives.
The examiner responds:
Applicant’s arguments have been considered but are not persuasive. Park expressly discloses a metal gate stack in which the capping layer may be selected from TiN, TaN, TiAlN, TaAlN, TiSiN, or combinations thereof (see, e.g., par. 0116), and further discloses that the work function layer may be selected from Mo, Pd, Ru, Pt, TiN, WN, TaN, Ir, TaC, RuN, and MoN (see, e.g., par. 0118). Thus, Park expressly identifies both TiSiN and MoN as materials for the respective layers of the metal gate stack.
Contrary to Applicant’s assertion, the rejection does not require the skilled artisan to discover either TiSiN or MoN. Both materials are expressly identified by Park for the very layers at issue in the claim. The fact that Park also identifies additional alternatives does not negate the express disclosure of TiSiN and MoN. The relevant alternatives are finite, identified materials disclosed for the same respective functions in the same type of gate stack.
Jong (¶¶0117-0118) further provides a reason for selecting work-function materials by teaching that the work function of a transistor may be adjusted by selecting different work-function materials. Accordingly, the skilled artisan had a reason to consider the disclosed alternatives when seeking a desired transistor work function.
Applicant relies upon In re Stepan for the proposition that the artisan must have a reason to select the particular combination. The present rejection satisfies that requirement. Park supplies the specific material alternatives and gate-stack structure, while Jong supplies the reason to select among work-function materials to achieve a desired work function.
Accordingly, the rejection does not rely upon hindsight merely because Park discloses alternatives in addition to the particular alternatives selected in the claims.
The applicants argue:
Park is principally concerned with semiconductor cleaning methods and does not identify Vfb or EOT optimization as a problem to be solved. A person of ordinary skill in the art would not have considered Park when attempting to obtain the claimed combination of improved Vfb and reduced EOT.
The examiner responds:
Applicant’s argument has been considered but is not persuasive. The rejection does not rely upon Park’s cleaning teachings as the motivation for modifying a gate stack. Rather, Park (fig. 7C) is relied upon for its express disclosure of a metal gate stack comprising a high-k dielectric 414, capping layer 426A, and work-function layer 426B, and for its express identification of TiSiN (¶0116) and MoN (¶0118) as materials that may be used for the respective layers.
A reference need not have the same principal purpose as the claimed invention to be pertinent to an obviousness determination. Here, Park provides the relevant gate-stack structure and material selections. Jong (¶¶0117-0118) provides the recognized purpose of selecting different work-function materials to adjust transistor work function. Nakamura (fig.3, ¶¶0040,0031) provides evidence that Vfb is an adjustable gate-stack characteristic, and Clark (¶0031) provides evidence of the recognized desirability of reduced EOT for gate-stack scalability and transistor performance.
Thus, the rejection does not require Park alone to identify the precise problem described by Applicant. The references collectively address the relevant structure, material selection, work-function adjustment, and EOT considerations.
Applicant’s contention that Park is “useless” because Park also discloses TiN is likewise not persuasive. Disclosure of TiN as one suitable alternative does not constitute a teaching of TiSiN useless. A teaching away requires more than the mere disclosure of an alternative; the prior art must discourage the claimed approach or lead the skilled artisan in a direction divergent from the claimed invention. Park does not discourage use of TiSiN. To the contrary, Park expressly identifies TiSiN as a capping-layer material.
Accordingly, Park remains properly relied upon for its teachings concerning the claimed gate-stack structure and material alternatives.
The applicants argue:
Applicant argues that the Office Action provides no justification for combining Jong with Park and that Jong’s TiSiN and MoN disclosures occur in separate gate stacks corresponding to separate transistors. Applicant therefore contends that Jong does not disclose a single gate stack having TiSiN as the capping layer and MoN as the work-function layer.
The examiner responds:
Applicant’s argument has been considered but is not persuasive. The rejection does not rely upon Jong as independently disclosing the complete claimed TiSiN/MoN gate stack. Park supplies the gate-stack structure and expressly identifies TiSiN (¶0116) as a capping-layer material and MoN (¶0118) as a work-function-layer material. Jong is relied upon for its additional teaching that different work-function materials may be selected to adjust the work function of a transistor.
Thus, it is not necessary that Jong itself disclose TiSiN and MoN in the same gate stack. Jong provides the reason for selecting from among the work-function materials disclosed by Park. Applicant’s argument therefore attacks Jong for a disclosure that Jong is not being relied upon to provide.
Moreover, Jong’s (¶¶0117-0118) teaching that selection of work-function materials may be used to adjust transistor work function provides an express technical reason for considering different work-function materials. The selection of MoN from Park’s list is therefore not arbitrary.
Applicant further argues that Jong does not discuss Vfb or EOT. That argument is likewise not persuasive because Jong is not relied upon to supply the claimed numerical Vfb or EOT values. Nakamura (fig.3, ¶¶0040,0031) is relied upon to establish that Vfb is an adjustable gate-stack characteristic, while Clark (¶0031) is relied upon, where applicable, for the recognized desirability of EOT reduction.
Accordingly, Jong properly supplies an additional reason to select the claimed work-function material from among Park’s expressly disclosed alternatives.
The applicants argue:
Applicant argues that Nakamura’s experimental Vfb data is directed to a TiN capping layer rather than TiSiN. Applicant further argues that Nakamura merely lists TiSiN among possible materials and therefore does not provide a teaching or suggestion to combine a TiSiN high-k capping layer with a MoN work-function material to obtain the claimed Vfb improvement.
The examiner responds:
Applicant’s argument has been considered but is not persuasive. The Examiner agrees that Nakamura’s particular experimental data relied upon in Figure 3B is illustrated using a TiN capping layer. However, Nakamura is not relied upon as expressly disclosing the claimed TiSiN/MoN gate stack or as establishing that a TiSiN capping layer necessarily produces the same numerical Vfb shift as the TiN structure tested by Nakamura.
Rather, Nakamura is relied upon as evidence that Vfb is a result-effective characteristic of a gate stack and may be substantially adjusted by modification of gate-stack parameters, including capping-layer thickness. Nakamura’s reported Vfb variation of several hundred millivolts demonstrates that Vfb is susceptible to substantial adjustment through optimization of the gate-stack configuration.
Applicant’s argument therefore does not address the actual role of Nakamura in the rejection. The rejection does not depend upon equating TiN with TiSiN or upon importing Nakamura’s precise experimental result into the TiSiN/MoN structure.
Furthermore, Applicant’s own Declaration provides independent evidence that Vfb varies with the selected and processed gate-stack materials. The Declaration (p.6) reports Vfb improvements of approximately +178 mV and +290 mV for TiSiN/MoN structures, and +140 mV and +325 mV for TiN/MoN structures. Thus, Applicant’s own experimental evidence confirms that Vfb is affected by the selected gate-stack materials and processing conditions.
The Declaration (p.6) further demonstrates that changing the MoN precursor changes the resulting Vfb even when the general layer materials and thicknesses remain the same. Such results are consistent with Vfb being a result-effective characteristic rather than a fixed property that can only be obtained through the particular combination claimed.
Accordingly, Nakamura need not independently disclose the claimed TiSiN/MoN combination or the precise +125 mV value in order to provide evidence supporting the conclusion that Vfb could be optimized through routine adjustment of known gate-stack parameters.
The applicants argue:
The Declaration establishes criticality of the claimed material selections and thicknesses and demonstrates that the claimed combination unexpectedly provides both improved Vfb and reduced EOT. Applicant particularly relies upon the experimental results to establish that TiSiN combined with MoN provides a higher Vfb while minimizing the EOT penalty associated with MoN.
The examiner responds:
Applicant’s arguments and the Rule 132 Declaration have been carefully considered but are not persuasive.
The experimental results do not demonstrate that the claimed combination produces an unexpected result relative to the teachings of the applied prior art. Rather, the results are consistent with the known and predictable effects of changing the work-function and capping-layer materials.
First, the Declaration (p.6) confirms that replacing TiN with MoN as the PMOS work-function material produces a Vfb improvement. The reported Vfb improvements for the MoN-containing structures are approximately +178 mV, +140 mV, +290 mV, and +325 mV relative to the TiN/TiN structure. Thus, the data confirms that MoN produces the Vfb benefit identified in the application and relied upon in the rejection.
Second, the data does not establish that TiSiN unexpectedly produces a greater Vfb than TiN. Indeed, for the MoN precursor #1 samples, the TiN-capped structure exhibits a Vfb improvement of approximately +325 mV, whereas the corresponding TiSiN-capped structure exhibits an improvement of approximately +290 mV. Thus, at least for this set of samples, TiN actually provides the greater Vfb improvement.
The data therefore does not establish an unexpected Vfb advantage attributable specifically to replacing the TiN capping layer with TiSiN. Instead, the data demonstrates that the principal advantage of TiSiN is reduction of the EOT penalty associated with the MoN work-function material. For the MoN precursor #1 samples, for example, the TiN/MoN structure exhibits an EOT increase of approximately +0.6 Å, whereas the corresponding TiSiN/MoN structure exhibits an EOT increase of approximately +0.3 Å. Likewise, the precursor #2 structures exhibit EOT increases of approximately +0.4 Å for TiN/MoN and approximately +0.05 Å for TiSiN/MoN.
These results are consistent with, rather than contrary to, the teachings relied upon in the rejection. The results show that selection of the work-function material affects Vfb, while selection of the capping-layer material affects the EOT penalty, and that processing/material variables such as the MoN precursor further affect the resulting characteristics. The data therefore supports the conclusion that Vfb and EOT are characteristics that respond to identifiable material and process variables. Such variables would have been subject to routine optimization by a person having ordinary skill in the art seeking a desired combination of transistor work function and EOT.
Furthermore, the data does not establish criticality of the claimed +125 mV threshold. All four tested MoN-containing structures exhibit Vfb improvements greater than +125 mV, ranging from approximately +140 mV to +325 mV. The results therefore do not identify +125 mV as a critical boundary separating successful and unsuccessful structures. Rather, the results indicate that the claimed threshold is within the range of results obtained by varying known gate-stack materials and processing conditions.
Likewise, the Declaration does not demonstrate that the particular claimed layer thicknesses are critical to obtaining the reported results. The fact that particular values were tested and produced desirable characteristics does not, without more, establish that those values are critical or that adjacent values would fail to produce the desired characteristics.
Accordingly, the Declaration confirms that the selected materials and processing conditions affect Vfb and EOT, but does not establish that the claimed combination produces a result that is unexpected in kind or that the claimed numerical values represent critical boundaries. The evidence therefore does not overcome the prima facie case of obviousness.
Conclusion
Papers related to this application may be submitted directly to Art Unit 2814 by facsimile transmission. Papers should be faxed to Art Unit 2814 via the Art Unit 2814 Fax Center. The faxing of such papers must conform to the notice published in the Official Gazette, 1096 OG 30 (15 November 1989). The Art Unit 2814 Fax Center number is (571) 273-8300. The Art Unit 2814 Fax Center is to be used only for papers related to Art Unit 2814 applications.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Marcos D. Pizarro at (571) 272-1716 and between the hours of 9:00 AM to 7:00 PM (Eastern Standard Time) Monday through Thursday or by e-mail via Marcos.Pizarro@uspto.gov. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Wael Fahmy, can be reached on (571) 272-1705.
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/Marcos D. Pizarro/Primary Examiner, Art Unit 2814
MDP/mdp
September 4, 2026
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