DETAILED ACTION
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1 and 7-11 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding claim 1, the limitation “a plurality of silicon (Si) layers consisting of silicon (Si) and a plurality of silicon germanium layers consisting of silicon germanium (SiGe)” does not appear to have support in the originally filed disclosure and is not described in the specification in such a way as to reasonably convey possession. Specifically, the disclosure recites “the first material layers 132 comprise silicon (Si),” and “the second material layers 134 comprises silicon germanium (SiGe),” (see [0045] of Applicant’s originally filed disclosure). There does not appear to be a disclosure of the layers “consisting of” the materials recited, which would be understood to preclude additional elements/materials to an extent which is not supported by the original disclosure, nor is the preclusion of additional elements/materials described with sufficient particularity in the original disclosure to convey the inventor had possession of the claimed invention at the time of filing.
Note the dependent claims do not cure the deficiencies of the claims on which they depend.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1 and 7-11 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, the limitation “a plurality of silicon (Si) layers consisting of silicon (Si) and a plurality of silicon germanium layers consisting of silicon germanium (SiGe)” is unclear as to the proper scope of “consisting of.” Specifically, it is noted that the specification does not provide a disclosure of the layers “consisting of” the claimed materials, but rather merely discloses “comprising.” As “consisting of” would be understood to preclude additional elements/materials to an extent which is not supported by or described in the original disclosure, the scope of the term cannot be ascertained.
Note the dependent claims necessarily inherit the indefiniteness of the claims on which they depend.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1 and 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimabukuro et al. (US 9,419,012; herein “Shimabukuro”) in view of Cho et al. (US 20150303060; herein “Cho”), Cheng et al. (US 20180294157; herein “Cheng”), and Hollister et al. (US 20130316518; herein “Hollister”) and Gardner et al. (US 20210111183; herein “Gardner”).
Regarding claim 1, Shimabukuro discloses in Figs. 1-9 and related text a method of forming a 3D memory device, the method comprising:
a substrate (10), the surface of the substrate comprising a semiconductor layer, a sacrificial layer, or combinations thereof (see col. 3 lines 60-67);
depositing a plurality of silicon (Si) layers (e.g. 32, see col. 5 lines 1-8, lines 55-58 and col. 11 line 50-55) and a corresponding plurality of silicon germanium (SiGe) layers (e.g. 42, see col. 5 lines 1-8, lines 55-58 and col. 11 line 50-55) alternatingly arranged in a plurality of stacked pairs (e.g. stack of pairs of 32 and 42), each stacked pair of the plurality of stacked pairs one silicon (Si) layer of the plurality of silicon layers on one silicon germanium (SiGe) layer of the plurality of silicon germanium layers;
forming a memory channel (60, see col. 10 para. 4) through the plurality of stacked pairs;
removing each of the plurality of silicon germanium layers (removing 42) from the plurality of stacked pairs to form a plurality of first openings (see Fig. 6);
forming a word line replacement material (46, see col. 12 para. 4 and 6) in each of the plurality of first openings to form a plurality of word lines replacement material layers
removing each of the plurality of silicon (Si) layers (removing 32) from the plurality of stacked pairs to form a plurality of second openings (see Fig. 8); and
forming a dielectric material (74L, see col. 13 line 31-32) in each of the plurality of second openings to form a plurality of dielectric material layers.
Shimabukuro does not explicitly disclose
treating a surface of the substrate with a plasma, the plasma comprising one or more of ammonia (NH3), nitrogen (N2) or hydrogen (H2);
forming a wetting layer on the surface of the substrate; and
the depositing by a plasma enhanced chemical vapor deposition (PECVD) process on the wetting layer;
each stacked pair of the plurality of stacked pairs one silicon (Si) layer consisting of silicon (Si) on one silicon germanium (SiGe) layer consisting of silicon germanium (SiGe).
In the same field of endeavor, Cheng teaches a method of forming a device comprising
treating a surface of the substrate with a plasma, the plasma comprising one or more of ammonia (NH3), nitrogen (N2) or hydrogen (H2) (240, see [0019] and [0037]-[0038]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Shimabukuro by treating a surface of a substrate with a plasma, the plasma comprising one or more of ammonia (NH3), nitrogen (N2) or hydrogen (H2), as taught by Cheng, in order to improve adhesion of subsequent layers (see [0037]).
In the same field of endeavor Cho teaches in Fig. 1A-B, 2A-C and related text a method of forming a device comprising
forming a wetting layer (3, see [0061], [0063], [0064] at least) on the surface of the substrate (1/5, see [0056]-[0057]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Shimabukuro by forming a wetting layer on the surface of the substrate, as shown by Cho, in order to improve morphology of deposited layers (see Cho [0064] at least). The limitation “depositing…on the wetting layer,” is taught by the combination of the forming the wetting layer on the substrate prior to deposition of subsequent layers, as shown by Cho, and the stack of pairs being formed on the substrate, as shown by Shimabukuro.
In the same field of endeavor, Gardner teaches a method of forming a device comprising
each stacked pair of the plurality of stacked pairs (104/106) one silicon (Si) layer consisting of silicon (Si) on one silicon germanium (SiGe) layer consisting of silicon germanium (SiGe) (see [0033]-[0034]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Shimabukuro by each stacked pair of the plurality of stacked pairs one silicon (Si) layer consisting of silicon (Si) on one silicon germanium (SiGe) layer consisting of silicon germanium (SiGe), as taught by Gardner, in order to employ alternating materials which allow for highly selective etching of the SiGe layers relative to the Si layers (see Garner [0042]).
In the same field of endeavor, Hollister teaches a method of forming a device comprising
depositing silicon and silicon germanium by plasma enhanced chemical vapor deposition (PECVD) process (see [0003] and [0006] at least).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Shimabukuro by having the depositing by plasma enhanced chemical vapor deposition (PECVD) process, as taught by Hollister, in order to achieve smooth layers desirable for applications employing stacks such as 3D memory fabrication (see [0003], [0006]).
Regarding claim 7, Shimabukuro further discloses
wherein removing each of the plurality of silicon (Si) layers (removing 32) further comprises:
forming a slit pattern opening (e.g. 79) through the memory stack, a first side of each of the plurality of silicon (Si) layers (32) exposed by the slit pattern opening (see Fig. 5); and
exposing the first side of each of the plurality of silicon (Si) layers (32) to an etchant through the slit pattern opening (see col. 11 para. 2).
Regarding claims 8-10, Shimabukuro further discloses
wherein the word line replacement material (46, see col. 12, lines 4-32) is selected from the group consisting of tungsten (W), molybdenum (Mo), tantalum (Ta), ruthenium (Ru), niobium (Nb), osmium (Os), zirconium (Zr), iridium (Ir), rhenium (Re), titanium (Ti), and combinations thereof (see col. 12, lines 4-32);
wherein the word line replacement material comprises tungsten (see col. 12, lines 29-30);
wherein the word line replacement material further comprises a nitride liner (see col. 12 lines 29-30).
Regarding claims 11, Shimabukuro further discloses
wherein forming the plurality of dielectric material layers in the plurality of second openings comprises depositing the dielectric material into each of the plurality of second openings, wherein an air gap (37) is formed in each of the plurality of second openings.
Response to Arguments
Applicant's arguments filed 5/4/2026 have been fully considered but are not persuasive.
Applicant argues (page 6-7) that applicant’s disclosure of “in some embodiments, the memory stack 130 comprises alternating layers of silicon (Si) and silicon germanium (SiGe)," supports “consisting of” as recited in the claim.
In response, the examiner disagrees. Specifically, the examiner has provided myriad references of how the term “silicon layer” and similar is used in the art (see Office action mailed 7/2/2025, page 9), which shows that such a recitation is not and would not be understood by one of ordinary skill in the art to be consistent with a disclosure of “consisting of” silicon. Additionally, it is important to note that applicant has argued that the presence of additional elements in a layer of the art (e.g. a layer comprising silicon and oxygen) does not read on the layer of the claim. However, such an argument necessarily raises the question of how much of an additional element would or would not be permitted in a given layer such that it would or would not read on the claimed limitation. “Consisting of” is a high bar which excludes any element not specified in the claim. Applicant’s specification, however, as understood by one of ordinary skill in the art and as evidenced by the references provided by the examiner, does not preclude additional elements in the layers and does not address any purity of the layer which would apprise one of ordinary skill of the proper scope of the claim as it relates to any degree of purity. Accordingly, the examiner maintains that the limitation is unsupported and indefinite.
Applicant’s remaining arguments have been considered but are moot in view of the new grounds of rejection presented above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Lauren R Bell whose telephone number is (571)272-7199. The examiner can normally be reached M-F 8am-5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Kraig can be reached at (571) 272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/LAUREN R BELL/Primary Examiner, Art Unit 2896
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