Prosecution Insights
Last updated: July 17, 2026
Application No. 17/306,414

THIN-FILM TRANSISTORS HAVING HYBRID CRYSTALLINE SEMICONDUCTOR CHANNEL LAYER AND METHODS OF FORMING THE SAME

Final Rejection §112
Filed
May 03, 2021
Priority
Jul 10, 2020 — provisional 63/050,347
Examiner
CHEN, JACK S J
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
6 (Final)
77%
Grant Probability
Favorable
7-8
OA Rounds
0m
Est. Remaining
82%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allowance Rate
438 granted / 572 resolved
+8.6% vs TC avg
Moderate +5% lift
Without
With
+5.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
49 currently pending
Career history
610
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
53.6%
+13.6% vs TC avg
§102
23.8%
-16.2% vs TC avg
§112
9.9%
-30.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 572 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-7, 21-22, 26-27 and 34-36 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Re claim 1, the phrase “annealing the amorphous silicon layer to form a single-crystal silicon (c-Si) layer directly on the seed layer, the c-Si layer comprising a continuous, unbroken edge-to-edge crystal lattice that is free of any grain boundaries” was not described in the original specification. Note: it should be noted that in most real-world situation (not in their ideal and/or undamaged form), that’s not always the case (e.g., any surface treatments and/or processes such as annealing temperature etc. can introduce defects or discontinuities etc.). therefore, the instant specification at least fails to show annealing to form a single-crystal silicon layer having the recited propreties in an ideal form etc. Re claim 26, the phrase “annealing the amorphous silicon layer to form a single-crystal silicon (c-Si) layer directly on the seed layer, the c-Si layer comprising a continuous, unbroken edge-to-edge crystal lattice that is free of any grain boundaries” was not described in the original specification. Note: it should be noted that in most real-world situation (not in their ideal and/or undamaged form), that’s not always the case (e.g., any surface treatments and/or processes such as annealing temperature etc. can introduce defects or discontinuities etc.). therefore, the instant specification at least fails to show using annealing to form a single-crystal silicon layer in an ideal form etc. Response to Arguments Applicant's arguments filed 11/23/2025 have been fully considered but they are not persuasive for reasons herein above. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JACK CHEN whose telephone number is (571)272-1689. The examiner can normally be reached Monday to Friday, 8am to 4pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara J. Green can be reached at (571)270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JACK S CHEN/ Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Show 21 earlier events
Jun 09, 2025
Response after Non-Final Action
Jul 03, 2025
Request for Continued Examination
Jul 07, 2025
Response after Non-Final Action
Aug 21, 2025
Non-Final Rejection mailed — §112
Nov 23, 2025
Response Filed
May 20, 2026
Final Rejection mailed — §112
Jun 17, 2026
Applicant Interview (Telephonic)
Jun 17, 2026
Examiner Interview Summary

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

7-8
Expected OA Rounds
77%
Grant Probability
82%
With Interview (+5.2%)
2y 11m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 572 resolved cases by this examiner. Grant probability derived from career allowance rate.

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