Prosecution Insights
Last updated: August 17, 2026
Application No. 17/327,168

LIGHT-EMITTING ELEMENT, METHOD OF MANUFACTURING LIGHT-EMITTING ELEMENT, AND DISPLAY DEVICE INCLUDING LIGHT-EMITTING ELEMENT

Final Rejection §103
Filed
May 21, 2021
Priority
Aug 31, 2020 — RE 10-2020-0110405
Examiner
BELL, LAUREN R
Art Unit
2896
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
7 (Final)
40%
Grant Probability
Moderate
8-9
OA Rounds
0m
Est. Remaining
72%
With Interview

Examiner Intelligence

Grants 40% of resolved cases
40%
Career Allowance Rate
154 granted / 384 resolved
-27.9% vs TC avg
Strong +31% interview lift
Without
With
+31.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
52 currently pending
Career history
453
Total Applications
across all art units

Statute-Specific Performance

§103
43.8%
+3.8% vs TC avg
§102
16.1%
-23.9% vs TC avg
§112
35.1%
-4.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 384 resolved cases

Office Action

§103
DETAILED ACTION Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 2/10/2026 has been entered. Claim Interpretation Note that the term “concentration” is interpreted as having the same meaning as the disclosed term “composition.” Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1-4, 8-10, and 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2018/0175106; herein “Kim”) in view of Chang et al. (US 2020/0152831; herein “Chang”). Regarding claim 1, Kim discloses in Fig. 1, 14, 17 and related text a light-emitting element (LD/LD1, see [0047] and [0170]) comprising: a first end portion and a second end portion disposed in a length direction of the light-emitting element; a first semiconductor layer (e.g. 11, see [0048]) disposed at the first end portion; an active layer (12, see [0048]) disposed on the first semiconductor layer; a second semiconductor layer (e.g. 13, see [0048]) disposed on the active layer; an insulating film (14, see [0055]) that surrounds an outer circumferential surface of each of the first semiconductor layer, the active layer, and the second semiconductor layer; wherein the first semiconductor layer (11) includes an n-type semiconductor layer doped with an n- type dopant (see [0052]), the second semiconductor layer (13) includes a p-type semiconductor layer doped with a p-type dopant (see [0054]); the active layer (12) is a layer that is not doped with the n-type dopant or the p-type dopant (Kim: see [0053]). Kim does not disclose a first barrier layer disposed between the active layer and the first semiconductor layer, the first barrier layer including a first region and a second region; a second barrier layer disposed between the second semiconductor layer and the active layer, the second barrier layer including a third region and a fourth region an insulating film that surrounds an outer circumferential surface of the first barrier layer, wherein the first semiconductor layer and the second semiconductor layer both contain aluminum; the first region of the first barrier layer includes a semiconductor layer having an aluminum concentration higher than an aluminum concentration of the first semiconductor layer, the active layer, and the second semiconductor layer, and the second region of the first barrier layer includes an oxide layer; the first barrier layer and the second barrier layer are cylindrical, the first region is disposed in a central region of the first barrier layer, and the second region is disposed in a remaining region of the first barrier layer excluding the central region of the first barrier layer, and the third region is disposed in a central region of the second barrier layer, and the fourth region is disposed in a remaining region of the second barrier layer excluding the central region of the second barrier layer; the first barrier layer and the second barrier layer are layers that are not doped with the n-type dopant or the p-type dopant. In the same field of endeavor, Chang teaches in Fig. 14 and related text (first embodiment, shown explicitly in Fig. 14) a light emitting element comprising a first barrier layer (14, see [0073]) disposed between the active layer (13, see [0074]) and the first semiconductor layer (11, see [0074]), the first barrier layer including a first region and a second region (e.g. 141 and 142, respectively); and the first semiconductor layer (11) and the second semiconductor layer (12) both contain aluminum (see [0025]-[0026]); the first region of the first barrier layer includes a semiconductor layer having an aluminum concentration higher than an aluminum concentration of the first semiconductor layer, the active layer, and the second semiconductor layer (see [0025]-[0026] and [0075]; note that the concentrations of the materials disclosed establish at least some embodiments where the first and second semiconductor layers comprise aluminum and also 141 with a higher aluminum concentration than the first and second semiconductor layers and the active layer), and the second region of the first barrier layer includes an oxide layer (see [0075]); the first region is disposed in a central region of the first barrier layer, and the second region is disposed in a remaining region of the first barrier layer excluding the central region of the first barrier layer (see Fig. 4 which shows the current spreading structure 3 being located in the central region and the remaining part of the structure being peripherally surrounding 3; note that in the embodiment of Fig. 14 region 141 is used instead of region 3 for current spreading, see [0073]); the first region and the second region have a same thickness in the length direction of the light-emitting element (see Fig. 14); wherein the first semiconductor layer (12) includes an n-type semiconductor layer doped with an n-type dopant (see [0025]), the second semiconductor layer (11) includes a p-type semiconductor layer doped with a p-type dopant (see [0025]); the first barrier layer (14) is a layer that is not doped with the n-type dopant or the p-type dopant (see [0025], [0075]). Chang further teaches in Fig. 14 and related text (second embodiment, described in accordance with Fig. 14 and [0074]) a light emitting element comprising a second barrier layer (e.g. 14 when it is formed between 13 and 12, see [0074]) disposed between the second semiconductor layer (12) and the active layer (13), the second barrier layer including a third region and a fourth region (141 and 142, respectively); the first semiconductor layer (11) and the second semiconductor layer (12) both contain aluminum (see [0025]-[0026]); the third region is disposed in a central region of the second barrier layer, and the fourth region is disposed in a remaining region of the second barrier layer excluding the central region of the second barrier layer (see Fig. 4 which shows the current spreading structure 3 being located in the central region and the remaining part of the structure being peripherally surrounding 3; note that in the embodiment of Fig. 14 region 141 is used instead of region 3 for current spreading, see [0073]); the third region and the fourth region have a same thickness in the length direction of the light-emitting element (see Fig. 14); wherein the first semiconductor layer (12) includes an n-type semiconductor layer doped with an n-type dopant (see [0025]), the second semiconductor layer (11) includes a p-type semiconductor layer doped with a p-type dopant (see [0025]); the second barrier layer (14) is a layer that is not doped with the n-type dopant or the p-type dopant (see [0025], [0075]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the first semiconductor layer and the second semiconductor layer both contain aluminum, and the first barrier layer with the first and second regions between the first semiconductor layer and the active layer with the structure and concentration and doping as claimed, as taught by Chang, in order to achieve a confined region of current and a decrease in the non-radiative recombination effect (see Chang [0073]). Furthermore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have both the first barrier layer and the second barrier layer would be understood to further improve the confinement of current and further decrease the non-radiative recombination effect. Note that the limitations “an insulating film that surrounds an outer circumferential surface of…the first barrier layer,” and “the first barrier layer and the second barrier layer are cylindrical,” are taught by the combination of the first barrier layer and second barrier layer being a part of the LED stack, as shown by Chang, and the LED stack being cylindrical with an insulating film surrounding an outer circumferential surface of the entire LED stack, as shown by Kim. Additionally, note that it would have been obvious to have the first and second semiconductor materials comprising aluminum in combination with the aluminum content of the first barrier being higher, as required by claim 1, for the purpose of choosing from a finite number of identified, predictable solutions (i.e. the concentration being higher, lower, or equal), with a reasonable expectation of success (KSR International Co. v. Teleflex Inc. 82 USPQ2d 1385 (2007)). Regarding claim 4, the combine device shows the third region (Chang second embodiment: 141) of the second barrier layer includes an aluminum concentration higher than the aluminum concentration of the first semiconductor layer, the active layer, and the second semiconductor layer (for substantially the same reasons as described above), the fourth region (Chang second embodiment: 142) of the second barrier layer includes an oxide layer (see [0075]). Regarding claim 8, the combined device shows wherein the first region (141) of the first barrier layer and the third region (141) of the second barrier layer include an AlInP layer including aluminum, indium, and phosphorus or an AlGaAs layer including aluminum, gallium, and arsenic (see [0075]). Regarding claim 9, the combined device shows wherein the first region of the first barrier layer (141) and the second region (Chang: 142) of the first barrier layer have a same thickness in the length direction of the light-emitting element (see Fig. 14). Regarding claim 10, Kim further discloses an electrode (see [0055]) disposed on the second semiconductor layer at the second end portion of the light-emitting element. Regarding claim 18, Kim discloses in Fig. 1, 14, 17 and related text a display device comprising: a first electrode (e.g. REL1, see [0090]) and a second electrode (e.g. REL2, see [0090]) disposed on a substrate in a first direction (e.g. DR1) and extending in a second direction (e.g. DR2) different from the first direction, the first electrode and the second electrode being spaced apart from each other; and a plurality of light-emitting elements (LD/LD1, see [0047] and [0170]) disposed between the first electrode and the second electrode, wherein each of the plurality of light-emitting elements includes: a first end portion and a second end portion disposed in a length direction of the light-emitting element; a first semiconductor layer (e.g. 11, see [0048]) disposed at the first end portion; an active layer (12, see [0048]); a second semiconductor layer (e.g. 13, see [0048]); a third electrode (see [0055]) disposed on the second semiconductor layer; and an insulating film (14, see [0055]) surrounding an outer circumferential surface of each of the first semiconductor layer, the active layer, the second semiconductor layer, and the third electrode; wherein the first semiconductor layer (11) includes an n-type semiconductor layer doped with an n- type dopant (see [0052]), the second semiconductor layer (13) includes a p-type semiconductor layer doped with a p-type dopant (see [0054]); the active layer (12) is a layer that is not doped with the n-type dopant or the p-type dopant (Kim: see [0053]). Chang teaches the remaining limitations in substantially the same manner and for the same reasons as applied to claim 1 above. Regarding claim 20, Kim further discloses a first contact electrode (e.g. CNE1, see [0090]) disposed on the first electrode and one of the first end portion and the second end portion of each of the plurality of light-emitting elements; and a second contact electrode (e.g. CNE2, see [0090]) disposed on the second electrode and the other of the first end portion and the second end portion of each of the plurality of light-emitting elements, wherein the first contact electrode is electrically connected to the first electrode, and the second contact electrode is electrically connected to the second electrode. Response to Arguments Applicant's arguments filed 2/10/2026 have been fully considered but they are not persuasive. Applicant argues (page 10-11) that Kim and Chang fail to teach or suggest the claimed invention because Chang does not show that current carrying confining structure 14 can be arranged on both sides of the active structure 13. In response, the examiner disagrees. Specifically, two embodiments of Chang are explicitly taught: a first, shown in Fig. 14 where a barrier layer is placed between layer 13 and 11, and a second, explicitly described in [0074], where a barrier layer is placed between 12 and 13. Chang further provides "the elements shown in different embodiments mentioned above could be combined or replaced with one another in proper situation" (see [0077]) and there is no evidence that these embodiments could not be used together. The rejection has presented a teaching of the first barrier layer (i.e. a barrier layer between the active layer and the first semiconductor layer, as taught by the first embodiment) with a motivation to combine it of achieving a confined region of current and a decrease in the non-radiative recombination effect (see Chang [0073]). The rejection further presents a teaching of a second barrier layer (i.e. a barrier layer between the active layer and the second semiconductor layer, as taught by the second embodiment} with the motivation of further improvement of the confinement of current and further decreasing of the non-radiative recombination effect. Accordingly, the rejection relies upon explicit teachings of Chang in order to establish a motivation to modify Kim by having a barrier layer between the active layer and the first semiconductor layer, and has established a motivation to further modify Kim by having a barrier layer between the active layer and the second semiconductor layer. Accordingly, the claimed invention is taught by the modification of Kim by each of the embodiments of Chang, as presented above. Applicant argues (page 11) that Kim and Chang fail to teach or suggest the claimed invention because Chang does not show “any prevention of hole/electron backflow.” In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). Additionally, the feature applicant relies upon is an intended use and/or function. A structural difference between the claimed invention and the prior art is required in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use or performing in the intended way, then it meets the claim. Applicant argues (page 11) that Kim and Chang fail to teach or suggest the claimed invention because Chang does not show the first semiconductor layer includes an n-type semiconductor layer doped with an n- type dopant, the second semiconductor layer includes a p-type semiconductor layer doped with a p-type dopant, and the active layer, the first barrier layer and the second barrier layer are layers that are not doped with the n-type dopant or the p-type dopant. In response, the examiner notes that applicant's arguments amount to a general allegation that the claims define a patentable invention without specifically pointing out how the language of the claims patentably distinguishes them from the references. Applicant's arguments do not comply with 37 CFR 1.111(c) because they do not clearly point out the patentable novelty which he or she thinks the claims present in view of the state of the art disclosed by the references cited or the objections made. Further, they do not show how the amendments avoid such references or objections. The rejections provided in the last Office action, mailed 12/10/2025, and repeated herein provide citations in the references which teach the limitations. Applicant has not provided any reason why applicant believes the provided citations do not teach the limitations, or how the language of the claims is distinguished from the teachings of the references. Nonetheless, it is noted that Chang is not relied upon to teach the first semiconductor layer includes an n-type semiconductor layer doped with an n- type dopant, the second semiconductor layer includes a p-type semiconductor layer doped with a p-type dopant, and the active layer is a layer that is not doped with the n-type dopant or the p-type dopant. Rather, Kim provides this teaching. One cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). Chang further provides that the first barrier layer (first embodiment: 14), and the second barrier layer (second embodiment: 14) are layers that are not doped with the n-type dopant or the p-type dopant (see [0025], [0075]). It is noted that the recitation of the materials of 13 and 14, as recited in [0025] and [0075], without further description of being a first or second conductivity type (as is indicated for 12 and 11, see [0025]) would be readily recognized by one of ordinary skill in the art to teach an undoped layer, i.e. a layer which does not include n-type or p-type dopants. It is noted that the examiner has previously asserted the position of the Office that the reference teaches an undoped layer (see Office action mailed 11/19/2024, page 14), and applicant chose not to refute it, but rather amended the claims in response (see claims filed 4/25/2025). Even assuming, for the sake of argument, that Chang does not teach the layer is lacking of n-type and p-type dopants, it is note that the claim as currently recited does not even require this and additional interpretations of the art apply. Specifically, the broadest reasonable interpretation of the limitation “the first barrier layer and the second barrier layer are layers that are not doped with the n-type dopant or the p-type dopant,” includes an interpretation which excludes only a device having the same dopant element as the n-type and/or p-type dopant as the first/second semiconductor layers, i.e. it allows for the barrier layers to be doped with a different dopant element. It further includes an interpretation where only one of the n-type and p-type dopants is excluded from each layer, i.e. the first barrier layer and the second barrier layer are layers that are not doped with the n-type dopant or the p-type dopant. It also includes an interpretation where the dopant, i.e. the impurities, in the semiconductor layer are “the n-type (p-type) dopant,” and any additional dopant/impurities in the other layers are not the dopant/impurities defined as the “the n-type (p-type) dopant,” and therefore the other layers do not include “the n-type (p-type) dopant.” Accordingly, it remains the position of the Office that the limitations are taught by the prior art. Conclusion All claims are identical to or patentably indistinct from, or have unity of invention with claims in the application prior to the entry of the submission under 37 CFR 1.114 (that is, restriction (including a lack of unity of invention) would not be proper) and all claims could have been finally rejected on the grounds and art of record in the next Office action if they had been entered in the application prior to entry under 37 CFR 1.114. Accordingly, THIS ACTION IS MADE FINAL even though it is a first action after the filing of a request for continued examination and the submission under 37 CFR 1.114. See MPEP § 706.07(b). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Lauren R Bell whose telephone number is (571)272-7199. The examiner can normally be reached M-F 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Kraig can be reached at (571) 272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LAUREN R BELL/Primary Examiner, Art Unit 2896
Read full office action

Prosecution Timeline

Show 14 earlier events
Apr 28, 2025
Response after Non-Final Action
Jun 17, 2025
Final Rejection mailed — §103
Aug 14, 2025
Request for Continued Examination
Aug 18, 2025
Response after Non-Final Action
Dec 10, 2025
Final Rejection mailed — §103
Feb 10, 2026
Request for Continued Examination
Feb 23, 2026
Response after Non-Final Action
Jul 23, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

8-9
Expected OA Rounds
40%
Grant Probability
72%
With Interview (+31.4%)
3y 5m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 384 resolved cases by this examiner. Grant probability derived from career allowance rate.

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