Prosecution Insights
Last updated: April 19, 2026
Application No. 17/383,299

INTERCONNECTION STRUCTURE WITH SIDEWALL PROTECTION LAYER

Non-Final OA §102§103
Filed
Jul 22, 2021
Examiner
WILCZEWSKI, MARY A
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Co., Ltd.
OA Round
5 (Non-Final)
85%
Grant Probability
Favorable
5-6
OA Rounds
2y 10m
To Grant
95%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allow Rate
703 granted / 828 resolved
+16.9% vs TC avg
Moderate +10% lift
Without
With
+10.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
34 currently pending
Career history
862
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
40.5%
+0.5% vs TC avg
§102
25.6%
-14.4% vs TC avg
§112
24.4%
-15.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 828 resolved cases

Office Action

§102 §103
DETAILED ACTION This Office action is in response to the Request for Continued Examination (RCE) filed on 11 November 2025. Claims 1-3, 5-8, 11-13, 15-20, and 22-25 are pending in the application. Claims 4, 9, 10, 14, and 21 have been cancelled. Claims 23-25 are newly submitted. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This application is a continuation of application Serial No. 15/851661, filed on 21 December 2017, now US Patent 11,075,112; which is a divisional of application Serial No. 14/985157, filed on 30 December 2015, now US Patent 9,859,156. Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 15 October 2025 has been entered. Terminal Disclaimer The terminal disclaimer filed on 15 April 2024 disclaiming the terminal portion of any patent granted on this application which would extend beyond the expiration date of US Patent 9,859,156 has been reviewed and is accepted. The terminal disclaimer has been recorded. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 2, 5-7, and 11 are rejected under 35 U.S.C. 102(a)(1)as being clearly anticipated by Agarwala et al., US 2003/0157794, newly cited. With respect to claim 1, Agarwala et al. disclose an interconnection structure, shown in Fig. 3F, comprising: a first metal structure 22, see paragraph [0052]; a first dielectric layer 12 over the first metal structure 22, see paragraphs [0052]-[0053]; a second dielectric layer 14 over the first dielectric layer12, see paragraphs [0052]-[0053]; a second metal structure 42/40 having an upper portion 42 extending through the second dielectric layer 14, and a lower portion 40 extending through the first dielectric layer 12, as shown in Fig. 3F, see paragraphs [0058]-[0060], the upper portion 42 having a width greater than a width of the lower portion 40, as shown in Fig. 3F; a first protective layer 32 (lower 32) spacing the first dielectric layer 12 apart from the lower portion 40 of the second metal structure 42/40, as shown in Fig. 3F, the first protective layer 32 having a bottommost surface higher than and spaced apart from an entirety of the first metal structure 22, wherein the first metal structure 22 has a topmost surface at a first elevation, and the bottommost surface of the first protective layer 32 is at a second elevation different from the first elevation of the topmost surface of the first metal structure 22; and a second protective layer 32 (upper 32) spacing the second dielectric layer 14 apart from the upper portion 42 of the second metal structure 42/40, as shown in Fig. 3F, the second protective layer 32 having a top width greater than a top width of the first protective layer 32, as shown in Fig. 3F. With respect to claim 2, in the interconnection structure of Agarwala et al., the first dielectric layer 12 comprises an anti-reflective coating, that is, silicon nitride, see paragraph [0053]. With respect to claim 5, in the interconnection structure of Agarwala et al, , the first protective layer 32 comprises silicon nitride or silicon oxynitride, see Figs. 3C and 3D and paragraphs [0056]-[0057]. With respect to claim 6, in the interconnection structure of Agarwala et al, , the second protective layer 32 comprises silicon nitride or silicon oxynitride, see Figs. 3C and 3D and paragraphs [0056]-[0057]. With respect to claim 7, in the interconnection structure of Agarwala et al., the first protective layer and the second protective layer are formed of a same material, see Figs. 3C and 3D and paragraphs [0056]-[0057]. With respect to claim 11, in the interconnection structure of Agarwala et al., an interface between the first protective layer 32 (lower 32) and the second metal structure 42/40 has a different cross-sectional profile than an interface between the second protective layer 32 (upper 32) and the second metal structure 42/40, as shown in Fig. 3F.The interface between the first protective layer 32 (lower 32) and the second metal structure 42/40 is vertically longer than the interface between the second protective layer 32 (upper 32) and the second metal structure 42/40, as shown in Fig. 3F. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 3, 8, 22, and 23 are rejected under 35 U.S.C. 103 as being unpatentable over Agarwala et al., US 2003/0157794, newly cited, as applied to claim 2 above, further in view of Yang et al, US 7,132,363, of record. With respect to claim 3, Agarwala et al. lack anticipation of the anti-reflective coating 12 being nitrogen-free. In the same field of endeavor, in the interconnection structure of Yang et al., shown in Figs. 9 and 10, the anti-reflective coating 71/72 is nitrogen-free, see column 4, lines 6-10: “In implementing various embodiments of the present invention, dielectric barrier layers can comprise suitable dielectric barrier materials, such as a silicon nitride, silicon carbide or silicon oxynitride.” Yang et al. clearly teach the functional equivalence of silicon nitride and silicon carbide as anti-reflective coatings. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that silicon carbide could have been substituted for the silicon nitride as the anti-reflective coating 12 in the known interconnection structure of Agarwala et al. With respect to claim 8, Agarwala et al. lack anticipation of a silicon carbide layer between the first metal structure 22 and the first dielectric layer 12, the lower portion 40 of the second metal structure 42/40 extending through the silicon carbide layer. In the same field of endeavor, the interconnection structure of Yang et al., shown in Figs 9 and 10, further comprises: a silicon carbide layer 31 is disposed between a first metal structure 60 and a first dielectric layer 70, the barrier layer 31 functions as an etch stop layer during subsequent etching steps, see Fig. 10 and column 5, lines 25-40. Therefore, in light of the teaching of Yang et al., it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include a silicon carbide layer between the first metal structure 22 and the first dielectric layer 12 as an etch stop layer in the known interconnection structure of Agarwala et al. Including a silicon carbide layer between the first metal structure 22 and the first dielectric layer 12 would result in the lower portion 40 of the second metal structure 42/40 extending through the silicon carbide layer in order to make electrical contact with the first metal structure 22. With respect to claim 22, Agarwala et al. lack anticipation of an etch stop layer disposed between the first dielectric layer 12 and the second dielectric layer 14, wherein an entirety of a sidewall of the etch stop layer is covered by the second protective layer 32. In the same field of endeavor, in the interconnection structure of Yang et al., shown in Figs. 9 and 10, Yang et al. teach an etch stop layer 70 disposed between a first dielectric layer 31 and a second dielectric layer 71, wherein an entirety of a sidewall of the etch stop layer 70 is covered by a second protective layer 71A, see Fig. 10. In light of the teaching of Yang et al., it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that an etch stop layer could have been disposed between the first dielectric layer 12 and the second dielectric layer 14 in the known interconnection structure of Agarwala et al., wherein an entirety of a sidewall of the etch stop layer is covered by the second protective layer 32. With respect to claim 23, Agarwala et al. lack anticipation of an etch stop layer between the first dielectric layer and the second dielectric layer, wherein the second protective layer 32 forms a first vertical interface with the etch stop layer and a second vertical interface with the second dielectric layer 14, wherein the first vertical interface is aligned with the second vertical interface. In the same field of endeavor, in the interconnection structure of Yang et al., shown in Figs. 9 and 10, Yang et al. teach an etch stop layer 70 disposed between a first dielectric layer 31 and a second dielectric layer 71, wherein a second protective layer 71A forms a first vertical interface with the etch stop layer 70 and a second vertical interface with the second dielectric layer 71, wherein the first vertical interface is aligned with the second vertical interface, as shown in Fig. 10. Therefore, in light of the teaching of Yang et al., it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that an etch stop layer could have been disposed between the first dielectric layer 12 and the second dielectric layer 14 in the known interconnection structure of Agarwala et al., wherein the second protective layer 32 would form a first vertical interface with the etch stop layer and a second vertical interface with the second dielectric layer 14, wherein the first vertical interface is aligned with the second vertical interface. Allowable Subject Matter Claims 12, 13, 15-20, 24, and 25 are allowable over the prior art of record. The following is a statement of reasons for the indication of allowable subject matter: Amended independent claims 12 and 17 distinguish over the prior art applied in the final Office action dated 07 August 2025. An updated search has determined that amended claims 12 and 17 are allowable. Claims 13, 15, 16, 18-20, 24, and 25 are allowable due to their dependency. Response to Arguments Applicant’s arguments with respect to claims 1-3, 5-8, 11, 22, and 23 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The additionally cited references disclose various interconnection structures. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARY A WILCZEWSKI whose telephone number is (571)272-1849. The examiner can normally be reached M-TH 7:30 AM-5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Manno can be reached on 571-272-2339. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. MARY A. WILCZEWSKI Primary Examiner Art Unit 2898 /MARY A WILCZEWSKI/Primary Examiner, Art Unit 2898
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Prosecution Timeline

Jul 22, 2021
Application Filed
Aug 08, 2023
Non-Final Rejection — §102, §103
Nov 09, 2023
Response Filed
Feb 15, 2024
Final Rejection — §102, §103
Apr 01, 2024
Interview Requested
Apr 02, 2024
Interview Requested
Apr 09, 2024
Examiner Interview Summary
Apr 09, 2024
Applicant Interview (Telephonic)
Apr 15, 2024
Response after Non-Final Action
Apr 26, 2024
Request for Continued Examination
May 01, 2024
Response after Non-Final Action
Apr 15, 2025
Non-Final Rejection — §102, §103
Jul 25, 2025
Response Filed
Aug 05, 2025
Final Rejection — §102, §103
Sep 10, 2025
Interview Requested
Sep 16, 2025
Examiner Interview Summary
Sep 16, 2025
Applicant Interview (Telephonic)
Oct 15, 2025
Response after Non-Final Action
Nov 11, 2025
Request for Continued Examination
Nov 17, 2025
Response after Non-Final Action
Jan 23, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
85%
Grant Probability
95%
With Interview (+10.0%)
2y 10m
Median Time to Grant
High
PTA Risk
Based on 828 resolved cases by this examiner. Grant probability derived from career allow rate.

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