Prosecution Insights
Last updated: October 01, 2026
Application No. 17/411,322

ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF

Non-Final OA §103
Filed
Aug 25, 2021
Priority
Jul 21, 2021 — TW 110126820
Examiner
TRICE III, WILLIAM CLARENCE
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Siliconware Precision Industries Co., Ltd.
OA Round
7 (Non-Final)
82%
Grant Probability
Favorable
7-8
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
45 granted / 55 resolved
+13.8% vs TC avg
Strong +27% interview lift
Without
With
+27.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
28 currently pending
Career history
89
Total Applications
across all art units

Statute-Specific Performance

§103
59.7%
+19.7% vs TC avg
§102
21.9%
-18.1% vs TC avg
§112
18.1%
-21.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 55 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments filed 03/02/2026 have been fully considered but they are not persuasive; On 01/22/2024, in Response to Election, the applicant elected the species of fig. 2F-1 with traverse; Arguments regarding non-elected species are not persuasive as they are non-elected and not currently being considered as restriction was proper and made final in non-final rejection filed 02/12/2024. Rejoinder will be considered upon the finding of allowable subject matter. The applicant argues that prior art of record does not teach and/or render obvious the newly amended features. The examiner respectfully disagrees, the amended upper antenna portion and lower antenna portions and sidewall spacer as claimed are sufficiently illustrated in figs. 1-2 under broadest reasonable interpretation of the claim language without importing limitation from the specification, see annotations below, in view of Laio and MPEP 2144.04 duplication the antenna structures such that there is a plurality of them is obvious. Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). The applicant also in part argues that Han does not teach “the partial shield 102 of Han does not include a shielding structure at the edge/surrounding of the structure metallization layer 112 and at the substrate core 114”. The examiner respectfully disagrees, fig. 1A-1C shows 102 surrounding at least 3 sides and/or edges of layers 112 and 114. In addition, the combination of Patten teaches sufficient motivation to modify Han such that the shielding layer is “on the encapsulation layer and completely shielding the carrier structure” as claimed “to integrate grounding techniques, which may improve the overall electric performances at higher frequencies and be integrated during package manufacture using, for example, a standard assembly processes resulting in a smaller global PCB footprint compared to the existing solutions (e.g., lids, shielding frames, cages, etc.).” [Patten Paragraph 0022]. The test for obviousness is not whether the features of a secondary reference may be bodily incorporated into the structure of the primary reference; nor is it that the claimed invention must be expressly suggested in any one or all of the references. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981). The applicant also in part argues against the combination of Han in view of Patten and Liao because Liao and Patten do not teach the claimed shielding body and that there are structural differences between regarding the mounting structures of Patten, Liao, and Han, remarks pages 7-8. This argument is not persuasive as Han, Patten and Liao are adjacent and or related art in addition Patten and Liao both teach “a shielding body” even if they individually teach different structures, together they teach sufficient motivation to modify Han such that all the claims are met as shown below. The test for obviousness is not whether the features of a secondary reference may be bodily incorporated into the structure of the primary reference; nor is it that the claimed invention must be expressly suggested in any one or all of the references. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981). PNG media_image1.png 495 840 media_image1.png Greyscale Annotated fig. 2A highlighting: an upper antenna portion, a lower antenna portion and a sidewall spacer PNG media_image2.png 246 292 media_image2.png Greyscale Annotated fig. 1C highlighting: an upper antenna portion, a lower antenna portion and a sidewall spacer Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-4, and 8-11 are rejected under 35 U.S.C. 103 as being anticipated by US 20210366838 A1 Han et al, hereinafter “Han”, in further view of US 20200098698 A1 Patten et al herein after “Patten” and US 10784208 B2 Liao et al hereafter “Liao”. Regarding Claim 1 Han teaches in figure 2A an electronic package (100), comprising: a carrier structure (112); an electronic component (108) disposed on the carrier structure (112); an encapsulation layer (106 Fig. 2A; comprising encapsulation at least partially) encapsulating the electronic component and the carrier structure; an antenna structure (comprising 114 and 120) mounted on the carrier structure (112) and comprising upper antenna portion [see annotation below] and lower antenna portion [see annotation below], wherein the upper antenna portion (comprising 114 and 120) has an edge formed (comprising 130(1) and/or P2 fig. 2A) with stepped portions (132 as illustrated in fig. 2A, also sufficiently illustrated in figures 1B and 1C but not explicitly labeled [see annotations below], note at least 3 stepped portions are illustrated that are identical in structure but with different orientations); a shielding body (104; includes 102, note a shielding body and a shielding layer are integrally formed) arranged along a surface of each of the stepped portions (132) [sufficiently illustrated fig. 1B and 1C, and 2A] wherein a portion of the shielding body defines a sidewall spacer [102 within and/or contacting shoulder area 132 fig. 2A, note the sidewall spacer is integral with the shielding body, see annotation below] that is positioned adjacent to the edge of the upper antenna portion , and the portion of the shielding body is laterally positioned between the edges of the plurality of upper antenna portions and the plurality of lower antenna portions [sufficiently illustrated fig. 2A 102 within 132 and/or contacting 136 is laterally between 130(1)/P2 and 130(2)/P1]; and a shielding layer (102) formed on the encapsulation layer; Han does not teach the shielding layer completely shielding the carrier structure, nor a plurality of antenna structures and comprising a plurality of upper antenna portions and a plurality of lower antenna portions, wherein each has the edges formed with the stepped portions. Patten teaches a shielding layer (150 fig. 1 and 250 fig. 2) formed on the encapsulation layer (230 fig. 2, sufficiently disclosed 0047 “encapsulation layer”) and completely shielding the carrier structure (110-111 fig. 1 and 210-211 fig. 2, sufficiently disclosed “the first and second doped regions 110-111 may include, but are not limited to, a semiconductor die, a package (e.g., a carrier wafer package)”, paragraph 0046 “the first and second doped regions 210-211”) [illustrated in fig. 2] It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to change the shape and/or size of the shielding layer as taught by Han such that “a shielding layer formed on the encapsulation layer and completely shielding the carrier structure” as taught by Patten “to integrate grounding techniques, which may improve the overall electric performances at higher frequencies and be integrated during package manufacture using, for example, a standard assembly processes resulting in a smaller global PCB footprint compared to the existing solutions (e.g., lids, shielding frames, cages, etc.).” [Patten Paragraph 0022] Liao teaches a plurality of antenna structures (112 fig. 14A) mounted on a carrier structure (100 fig. 14A). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to duplicate the antenna structure of Han in view of Patten such that “a plurality of antenna structures mounted on the carrier structure” as Liao teaches because duplication of parts is prima facie type obviousness [see MPEP 2144.04 VI. B]. In view of the duplication of antennas the limitation “a plurality of antenna structures mounted on the carrier structure and comprising a plurality of upper antenna portions and a plurality of lower antenna portions, wherein each of the plurality of upper antenna portions has edges formed with stepped portions” is necessarily met as Han teaches the stepped portion as shown above for the antenna that would be duplicated. PNG media_image1.png 495 840 media_image1.png Greyscale Annotated fig. 2A highlighting: an upper antenna portion, a lower antenna portion and a sidewall spacer PNG media_image2.png 246 292 media_image2.png Greyscale Annotated fig. 1C highlighting: an upper antenna portion, a lower antenna portion and a sidewall spacer PNG media_image3.png 430 364 media_image3.png Greyscale Annotated fig. 1C; highlighting stepped portions (two, one oriented in the -Y direction, and on oriented in the +Y direction) PNG media_image4.png 385 768 media_image4.png Greyscale Annotated fig. 1B; highlighting a stepped portion of the stepped portions (oriented in the +X direction) Regarding Claim 2 Han in view of Patten and Liao teaches as shown above the electronic package (100 fig. 2A) of claim 1, wherein the carrier structure (112 fig. 2A) is coupled to the plurality of antenna structures (comprising 114 and 120 fig. 2A Han, the plurality in view of Liao) via a plurality of conductive components (115 fig. 1B; Paragraph 0028 “The substrate core 114 includes conductive pillars 118 in this example, such as through-silica-vias (TSVs), that are electrically connected to the interconnect layers 115 in the substrate metallization layers 112”.) Regarding Claim 3 Han in view of Patten and Liao teaches in figure 2A as shown above the electronic package (100) of claim 1, wherein each of the plurality of antenna structures (comprising 114 and 120 Han, the plurality in view of Liao) has a first surface (204; top surface of 114), a second surface (bottom surface of 120) opposite to the first surface (204; top surface of 114), and a side surface (comprising 130(1), 130(2), and 136) abutting the first (204; top surface of 114) and second surfaces (bottom edge of 120), and wherein the first surface (204; top surface of 114) of each of the plurality of antenna structures (comprising 114 and 120 Han, in the plurality in view of Liao) is connected to the carrier structure (112). Regarding Claim 4 Han in view of Patten and Liao teaches in figure 2A as shown above the electronic package (100) of claim 3, wherein each of the stepped portions (132) is formed at an interface between the first surface (204; top surface 114) and the side surface (comprising 130(1), 130(2), and 136; represents right side surface). [see annotation figure below] PNG media_image5.png 668 813 media_image5.png Greyscale Annotated figure 2A; highlighting the first surface, the side surface, a stepped portion (facing in the +X direction) and the interface Annotated fig. 2A; Regarding Claim 8 Han teaches in figure 2A a method for manufacturing an electronic package (100), comprising: providing at least one package module (100), wherein the package module comprises a carrier structure (112), an electronic component (108) disposed on the carrier structure (112) and an encapsulation layer (106 Fig. 2A; comprising encapsulation at least partially) encapsulating the electronic component and the carrier structure; connecting an antenna structure (comprising 114 and 120) to the carrier structure (112), wherein the antenna structure (comprising 114 and 120) comprise an upper antenna portion [see annotation below] and a lower antenna portion [see annotation below], and the upper antenna portion has an edges (comprising 130(1) and/or P2 fig. 2A) formed with stepped portions (132); a shielding body (104; including 102) is arranged on a surface (136) of each of the stepped portions (132 as illustrated in fig. 2A, also sufficiently illustrated in figures 1B and 1C but not explicitly labeled [see annotations below], note at least 3 stepped portions are illustrated that are identical in structure but with different orientations) [sufficiently illustrated fig. 1B and 1C, and 2A] wherein a portion of the shielding body [102 within and/or near shoulder area 132 fig. 2A] defines a sidewall spacer [see annotation below] that is positioned adjacent to the edges of the plurality of upper antenna portions, and the portion of the shielding body is laterally positioned between the edges of the plurality of upper antenna portions and the plurality of lower antenna portions [sufficiently illustrated fig. 2A the spacer is laterally between 130(1)/P2 and 130(2)/P1, this matches what is illustrated in fig. 2F-1 of the instant application]; and a shielding layer (102) formed on the encapsulation layer; Han does not teach the shielding layer completely shielding the carrier structure, nor a plurality of antenna structures mounted on the carrier structure and comprising a plurality of upper antenna portions and a plurality of lower antenna portions, wherein each of the plurality of upper antenna portions has edges formed with stepped portions. Patten teaches a shielding layer (150 fig. 1 and 250 fig. 2) formed on the encapsulation layer (230 fig. 2, sufficiently disclosed 0047 “encapsulation layer”) and completely shielding the carrier structure (110-111 fig. 1 and 210-211 fig. 2, sufficiently disclosed “the first and second doped regions 110-111 may include, but are not limited to, a semiconductor die, a package (e.g., a carrier wafer package)”, paragraph 0046 “the first and second doped regions 210-211”) [illustrated in fig. 2] It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to change the shape and/or size of the shielding layer as taught by Han such that “a shielding layer formed on the encapsulation layer and completely shielding the carrier structure” as taught by Patten “to integrate grounding techniques, which may improve the overall electric performances at higher frequencies and be integrated during package manufacture using, for example, a standard assembly processes resulting in a smaller global PCB footprint compared to the existing solutions (e.g., lids, shielding frames, cages, etc.).” [Patten Paragraph 0022] Liao teaches a plurality of antenna structures (112 fig. 14A) mounted on a carrier structure (100 fig. 14A). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to duplicate the antenna structure of Han in view of Patten such that “a plurality of antenna structures mounted on the carrier structure” as Liao teaches because duplication of parts is prima facie type obviousness [see MPEP 2144.04 VI. B]. In view of the duplication of antennas the limitation “a plurality of antenna structures mounted on the carrier structure and comprising a plurality of upper antenna portions and a plurality of lower antenna portions, wherein each of the plurality of upper antenna portions has edges formed with stepped portions” is necessarily met as Han teaches the stepped portion as shown above for the antenna would be duplicated. PNG media_image1.png 495 840 media_image1.png Greyscale Annotated fig. 2A highlighting: an upper antenna portion and a lower antenna portion PNG media_image2.png 246 292 media_image2.png Greyscale Annotated fig. 1C highlighting: an upper antenna portion, a lower antenna portion and a sidewall spacer PNG media_image3.png 430 364 media_image3.png Greyscale Annotated fig. 1C; highlighting stepped portions (two, one oriented in the -Y direction, and on oriented in the +Y direction) PNG media_image4.png 385 768 media_image4.png Greyscale Annotated fig. 1B; highlighting a stepped portion of the stepped portions (oriented in the +X direction) Regarding Claim 9 Han in view of Patten and Liao teaches as shown above the method of claim 8, wherein the carrier structure (112 fig. 2A) is coupled to the plurality of antenna structures (comprising 114 and 120 fig. 2A Han, the plurality in view of Liao) via a plurality of conductive components (115 fig. 1B; Paragraph 0028 “The substrate core 114 includes conductive pillars 118 in this example, such as through-silica-vias (TSVs), that are electrically connected to the interconnect layers 115 in the substrate metallization layers 112”). Regarding Claim 10 Han in view of Patten and Liao teaches in figure 2A as shown above the method of claim 8, wherein the plurality of antenna structures (comprising 114 and 120 Han, the plurality in view of Liao) has a first surface (204; top surface of 114), a second surface (bottom of 120) opposite to the first surface (204; top surface of 114), and a side surface ( comprising 130(1), 130(2), and 136) abutting the first (204; top surface of 114) and second surfaces (bottom of 120), and wherein the first surface (204; top surface of 114) of the plurality of antenna structures (comprising 114 and 120 Han, the plurality in view of Liao) is connected to the carrier structure (112). Regarding Claim 11 Han in view of Patten and Liao teaches in figure 2A as shown above the method of claim 10, wherein each of the stepped portions (132) is formed at an interface between the first surface (204; top surface of 114) and the side surface (comprising 130(1), 130(2), and 136). [see annotation below] PNG media_image5.png 668 813 media_image5.png Greyscale Annotated figure 2A; highlighting the first surface, the side surface, the stepped portion and the interface Conclusion A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to William C Trice whose telephone number is (703)756-1875. The examiner can normally be reached M-F 8:30am-5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached on (571) 270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WCT/Examiner, Art Unit 2893 /Britt Hanley/Supervisory Patent Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Show 9 earlier events
May 13, 2025
Request for Continued Examination
May 14, 2025
Response after Non-Final Action
Jun 16, 2025
Non-Final Rejection mailed — §103
Sep 16, 2025
Response Filed
Dec 03, 2025
Final Rejection mailed — §103
Mar 02, 2026
Request for Continued Examination
Mar 11, 2026
Response after Non-Final Action
Sep 02, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12733219
SEMICONDUCTOR DEVICE INCLUDING BACKSIDE ISOLATION STRUCTURE AND PLACEHOLDER ISOLATION STRUCTURE
3y 2m to grant Granted Sep 08, 2026
Patent 12727138
SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREOF
3y 11m to grant Granted Sep 01, 2026
Patent 12721167
COOLING SYSTEM
4y 6m to grant Granted Aug 25, 2026
Patent 12721155
SEMICONDUCTOR DEVICE
3y 10m to grant Granted Aug 25, 2026
Patent 12707818
DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME
4y 2m to grant Granted Aug 11, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

7-8
Expected OA Rounds
82%
Grant Probability
99%
With Interview (+27.2%)
3y 5m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 55 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month