Prosecution Insights
Last updated: May 29, 2026
Application No. 17/457,709

Laser-Assisted Epitaxy and Etching for Manufacturing Integrated Circuits

Non-Final OA §103
Filed
Dec 06, 2021
Priority
Jan 22, 2021 — provisional 63/140,297
Examiner
SONG, MATTHEW J
Art Unit
1714
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Taiwan Semiconductor Manufacturing Co., Ltd.
OA Round
5 (Non-Final)
60%
Grant Probability
Moderate
5-6
OA Rounds
0m
Est. Remaining
74%
With Interview

Examiner Intelligence

Grants 60% of resolved cases
60%
Career Allowance Rate
539 granted / 892 resolved
-4.6% vs TC avg
Moderate +14% lift
Without
With
+14.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
31 currently pending
Career history
954
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
83.7%
+43.7% vs TC avg
§102
3.8%
-36.2% vs TC avg
§112
1.9%
-38.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 892 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after allowance or after an Office action under Ex Parte Quayle, 25 USPQ 74, 453 O.G. 213 (Comm'r Pat. 1935). Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, prosecution in this application has been reopened pursuant to 37 CFR 1.114. Applicant's submission filed on 02/06/2026 has been entered. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1, 4-15, 21, 22, 24-26 and 29 is/are rejected under 35 U.S.C. 103 as being unpatentable over Moffatt (US 2014/0273416) in view of Andrews et al (US 2005/0130390) and Iyer et al (US 2015/0087082). In a method of photo-excitation for depositing a layer, Moffatt teaches a processing chamber 100 is provided with a light scanning unit 188, a radiation source 186 projects a substantially coherent or incoherent beam of light or electromagnetic radiation onto the light scanning unit 188 in a desired shape of image; the light scanning unit 188 scans a beam across the substrate 108 at or near the surface, wherein a new scan is started along the longitudinal or transversal direction of the substrate until the entire substrate or a desired region of the substrate is illuminated for effective photodecomposition or photolysis of the component of the gaseous precursor, thereby depositing a material layer on the surface of the substrate (Fig 1; [0018]-[0035]), which clearly suggests projecting a first beam on selected regions of the wafer using a first laser projector to grow a semiconductor on the wafer, wherein the first laser beam moves along a path that comprises a first region and a second region. Moffatt also teaches a wafer (substrate) 108 and a substrate support 106, wherein the substrate support is rotated during processing to minimize the effect of thermal and process gas flow spatial anomalies within the process chamber 100 and an array of lamps 102 (heat source) to heat the substrate(Fig 1; [0021]-[0023]), which clearly suggest placing a wafer into a process chamber and rotating the wafer. Moffatt teaches the method may be applicable to deposition of other materials or semiconductor compounds such as silicon, dielectrics, Group III-V compound semiconductors or Group II-VI compound semiconductors, including binary, ternary, and quaternary alloys thereof, or other semiconductors, including organic semiconductors and magnetic semiconductors ([0054]). Moffatt teaches epitaxial growth and using a laser to photo-dissociate the precursor ([0029]-[0031], [0053]). Moffatt does not teach projecting a second laser beam on the wafer to perform an etching process, wherein during the etching process, the second laser beam is projected on a third region of the wafer. In a method of making semiconductor devices, Andrews et al teaches a device layer including active device portions 122 is formed on a device surface 114 of a semiconductor substrate or wafer 110; epitaxial layers comprise an active region having a p-n junction that emits light when energized; and a laser beam 152 is scanned (by relatively moving the laser 150, the substrate assembly 100A, or both) across the wafer 110 between the device portions 122 such that the laser beam 152 projects through the isolation trenches 132 and along each street 160, 162 to etch the substrate to separate device portions, and etching the device layer to form trenches 132, which clearly suggests a second laser beam on the wafer to perform an etching process, wherein during the etching process, the second laser beam is projected on a third region of the wafer. (Fig 2-11; [0029]-[0053]). It would have been obvious to one of ordinary skill in the art at the time of filing to modify Moffatt by projecting a second laser beam on the wafer to perform an etching process, wherein during the etching process, the second laser beam is projected on a third region of the wafer and the second laser beam is kept outside of a fourth region of a wafer, to etch trenches between device portions, as taught by Andrews et al. It is noted that the devices portions are first regions where epitaxy occurs with the first laser beam, and the second region would be streets where devices portions are not formed; the third region is the street between device portions where the laser etching occurs, and the second laser beam is kept out of a fourth region which would be device region. The combination of Moffatt and Andrews et al teaches rotating the wafer. However, the combination of Moffatt and Andrews et al does not teach rotating the wafer and projecting the laser beams in specific regions. In an laser delivery mechanism, Iyer teaches laser delivery mechanism 102 may include a laser source 110 and laser beam positioning device 112; the laser beam positioning device 112 may include one or more mirrors, prisms, electro-optic or acousto-optic deflectors, or the like, that may deflect or otherwise redirect a laser beam from the laser source 110 so as to cause the laser beam to scan along a portion of a substrate positioned within the processing tool 106; a controller 104 may direct the laser delivery mechanism 102 to selectively heat portions of the substrate; in areas in which less heat is desired, the laser beam may be turned off; and the substrate 204 also may be moved relative to the laser beam (e.g., linearly, by rotation, etc.) (Fig 1-4; [0013]-[0031]). Iyer also teaches raising substrate temperature of an area of the substrate 204 relative to other areas of the substrate 204 may increase etch or deposition rates in the heated area, and through use of laser heating, precise control over local temperature profile may be achieved at reaction sites during processing, and this allows highly accurate adjustments to etch or deposition rates at a local, selective level ([0030]-[0031]). It would have been obvious to one of ordinary skill in the art at the time of filing to modify the combination of Moffatt and Andrews et al by rotating the wafer, as taught by Iyer et al, to move the substrate relative to the substrate to position the laser in a desired location for etching and deposition processes. Referring to claim 4, the combination of Moffatt, Andrews and Iyer et al teaches a plurality of laser delivery mechanisms and a controller 104 is coupled to each laser delivery mechanism 102a-c and controls operation of the laser delivery mechanisms 102a-c (Iyer [0024]), which clearly suggests a second laser beam on the wafer using a second laser projector that are operated separately. Furthermore, duplication of parts is prima facie obvious (MPEP 2144.04) Referring to claim 5, the combination of Moffatt, Andrews and Iyer et al teaches the chip design for a substrate may provide layer type and/or thickness information across a substrate, and controller 104 may access the chip design from a database or other location and use chip design information to apply different laser dwell times, powers or the like selectively across the substrate ([0032]), which clearly suggest the different power (i.e. power on/off) in different regions may be designed based on thickness, which clearly suggests adjusting a power of the first laser beam. Referring to claim 6-7, the combination of Moffatt, Andrews and Iyer et al teaches laser beam ON and OFF states may be modulated by controller 104 (Iyer [0029]) and laser epitaxy in device regions, and laser etching in streets between device regions (Andrews (Fig 2-11; [0029]-[0053]). Referring to claim 8, the combination of Moffatt, Andrews and Iyer et al teaches the process comprises the epitaxy process to grow the semiconductor layer on the wafer (Moffatt [0041], [0053]; Andrews [0006]). Referring to claim 9, the combination of Moffatt, Andrews and Iyer et al teaches the etching process to etch the semiconductor layer (Andrews [0030] teaches etching the device layer), which clearly suggests second layer is etched from a second portion of the wafer projected by the first laser beam. Referring to claim 10, see the remarks above. Also, the combination of Moffatt, Andrews and Iyer et al laser epitaxy of device layers, and laser etching to form trenches (third area, etch back semiconductor layer) and scanning the laser to for break lines between device layers, wherein the laser for device (first area) formation would be kept out of the streets (second area, fourth area) 160, 162 (Andrews [0029]-[0045]; Fig 2-11). Referring to claims 11-12 and 15, the combination of Moffatt, Andrews and Iyer et al teaches the chip design for a substrate may provide layer type and/or thickness information across a substrate, a metrology tool 108 may measure film thickness uniformity, CD uniformity and/or any other uniformity parameter relevant to the substrate which is to be processed and provide the substrate uniformity information to the controller 104; and based on the substrate uniformity information, the controller 104 may create a map or temperature profile that indicates at what locations across a surface of the substrate temperature should be raised to increase etch rate or deposition rate, so as to compensate for substrate uniformity variations in thickness, CD, etc. and controller 104 may access the chip design from a database or other location and use chip design information to apply different laser dwell times, powers or the like selectively across the substrate (Iyer [0016]-[0032]; Fig 4), which clearly suggest growing an epitaxial layer, measuring temperatures of different parts of the wafer, measuring the thickness and determining heating parameters based on measured temperatures and thicknesses. Referring to claim 13, the combination of Moffatt, Andrews and Iyer et al teaches scanning the laser across the substrate (Iyer Fig 2). Referring to claim 14, the combination of Moffatt, Andrews and Iyer et al teaches a second laser beam 110a, 110b, 110c (Iyer Fig 2) Referring to claim 21, see the remarks above. The combination of Moffatt, Andrews and Iyer et al teaches laser epitaxy and laser etching to form device regions and etching between the device regions, and rotating the substrate to position the laser in desired locations, wherein the laser is turned on and off to provide a desired heating to enhance etching and epitaxy. Also, combination of Moffatt, Andrews and Iyer et al teaches the laser used for epitaxy is different from the laser used in etching because the epitaxial device formation occurs prior to etching, and the prior art teaches a plurality of laser for scanning different regions of the substrate, and the etching rate is higher when the laser is on compared to when the laser is off. Referring to claim 22, the combination of Moffatt, Andrews and Iyer et al teaches heating lamps for heating the substrate support (Moffatt [0019]-0023]), which clearly suggests wafer is heated globally. Referring to claim 24, the combination of Moffatt, Andrews and Iyer et al teaches positioning the laser during etching, and laser beam positioning device 112 may include one or more mirrors, prisms, electro-optic or acousto-optic deflectors, or the like, that may deflect or otherwise redirect a laser beam from the laser source 110 so as to cause the laser beam to scan along a portion of a substrate positioned within the processing tool 106 (Iyer [0015]), which clearly suggests the projecting angle of the laser beam on the wafer is adjusted to different angles. Referring to claim 25, the combination of Moffatt, Andrews and Iyer et al teaches a plurality of laser delivery mechanisms and a controller 104 is coupled to each laser delivery mechanism 102a-c and controls operation of the laser delivery mechanisms 102a-c (Iyer [0024]). Furthermore, duplication of parts is prima facie obvious (MPEP 2144.04). Referring to claim 26, the combination of Moffatt, Andrews and Iyer et al teaches controller 104 may cause the one or more laser beams 202a-c to be turned on and/or have a larger dwell time and/or power in areas of the substrate 204 in which additional substrate heating is desired and in areas in which less heat is desired, the controller 104 may cause the one or more laser beams 202a-c to be turned off, or decrease dwell time and/or power (Iyer [0029], which clearly moving at different speeds to provide different dwell times for different surface regions. Referring to claim 29, the combination of Moffatt, Andrews and Iyer et al teaches the chip design for a substrate may provide layer type and/or thickness information across a substrate, and controller 104 may access the chip design from a database or other location and use chip design information to apply different laser dwell times, powers or the like selectively across the substrate (Iyer [0032]), which clearly suggest the different power (i.e. power on/off) in different regions may be designed based on thickness. Claim(s) 23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Moffatt (US 2014/0273416) in view of Andrews et al (US 2005/0130390) and Iyer et al (US 2015/0087082), as applied to claim 1, 4-15, 21, 22, 24-26 and 29, above, and further in view of Lancaster-Larocque et al (US 9,629,271). The combination of Moffatt, Andrews and Iyer et al teaches all of the limitations of claim 23, as discussed above, except the first laser projector slides on a track, so that the first laser beam moves on the wafer. In a method of laser etching a substrate, Lancaster-Larocque et al teaches a laser projector slides on a track (rails), so that a laser beam moves on a wafer (See Fig 3; col 4, ln 1 to col 5, ln 67 which teaches a laser 301 emits light beam 302 toward a mirror 304 such that the laser beam 302 is redirected along an x-axis path 305 parallel with the length of the rail 306 toward mirror 307 and mirror 307 is mounted on a movable trolley 309 which may be moved along rail 306. Rail 306 is itself mounted on movable trolleys 310 so that every point of the table surface 300 can be swept by the laser beam 302 to allow movement of laser beam 302 in both the y- (303) and x-axis (305) directions and the movement of trolleys 309 and 310 is preferably controlled by a computer 311 which may be connected to motors (not shown) which drive trolleys 309 and 310; and a computer 311 may be programmed to provide precise movement of laser beam 302 along axes 303 and 305 and thus move contact point 308 to any position on cover surface 201). It would have been obvious to one of ordinary skill in the art at the time of filing to modify the combination of Moffatt, Andrews and Iyer et al by providing a laser projector slides on a track, as taught by Lancaster-Larocque et al, to provide precise movement of laser beam to any position on substrate. Response to Arguments Applicant’s arguments with respect to claim(s) 1, 4-15, 21-26 and 29 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Bukhman et al (US 5,795,493) teaches a laser position control unit 72 will differentially heat each portion of the plurality of portions to effect a differential etch rate for each portion, such that thicker portions of substrate 40 (see FIG. 1) are heated to a higher temperature than thinner portions; and laser scan unit 58 comprises laser generation apparatus 70, laser position control unit 72, temperature measurement apparatus 74, thickness measurement apparatus 76 and etch rate computational computer 78; and a substrate heating profile generating computer 85 is a computer capable of converting a thickness profile map 120 of semiconductor substrate 40 into a heating profile map 130 of substrate 40 (col 2-5). Any inquiry concerning this communication or earlier communications from the examiner should be directed to MATTHEW J SONG whose telephone number is (571)272-1468. The examiner can normally be reached Monday-Friday 10AM-6PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kaj Olsen can be reached at 571-272-1344. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. MATTHEW J. SONG Examiner Art Unit 1714 /MATTHEW J SONG/Primary Examiner, Art Unit 1714
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Prosecution Timeline

Show 9 earlier events
Apr 01, 2025
Response Filed
Jun 26, 2025
Final Rejection mailed — §103
Aug 26, 2025
Response after Non-Final Action
Sep 29, 2025
Request for Continued Examination
Oct 01, 2025
Response after Non-Final Action
Feb 06, 2026
Request for Continued Examination
Apr 07, 2026
Response after Non-Final Action
May 06, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

5-6
Expected OA Rounds
60%
Grant Probability
74%
With Interview (+14.0%)
3y 8m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 892 resolved cases by this examiner. Grant probability derived from career allowance rate.

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