DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 01/28/2026 has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 9-15 and 26 are rejected under 35 U.S.C. 103 as being unpatentable over Tsai (U.S. PG Pub No US2011/0076845A1) (of record) in view of Lin (U.S. PG Pub No US2017/052419A1) (of record).
Regarding claim 9, Tsai teaches a method [see title, fig. 12], comprising:
forming first openings (1318) figs. 13-14 [0038-0039] having first dimensions (width of gap between 1310/1318) in a first layer (comprising upper layer of 1312-trilayer) fig. 13 [0038] disposed on a dielectric layer (1308) fig. 13 [0036, 0043];
extending the first openings (1318) through a second layer (1310) fig. 14 [0039] disposed below the first layer (comprising upper 1312) by a (dry) etching process [0039], wherein the second layer (1310) comprises an oxide (1310/510 [0036] may be formed of silicon-oxynitride [0023], an oxide-material) and is a single layer (1310 is shown formed as a single hard mask), and the (bottom of) second layer (1310) interfaces the (top of) dielectric layer (1308); then
forming a layer (upper 1506) fig. 15 [0042] disposed in the first openings (expanded 1318) and over (position of) the first layer (where upper 1312 was), wherein the first layer (comprising upper 1312 comprising photosensitive polymer material [0024, 0037]) and the layer (upper 1506) (spin-on glass [0037, 0042]) comprise different materials (many possible material combinations [0024, 0037, 0042]);
forming second openings (1508 extended by 1602) figs. 15-16 [0042-0043] having second dimensions (width) in the layer (lowermost of 1506) to expose portions of the dielectric layer (1308), wherein the second dimensions (width of 1602) are smaller than the first dimensions (width of gap between 1310(s));
extending the second openings (1802) fig. 18 [0045] into the dielectric layer (1308);
removing [see fig. 17, 0043-0044] the layer (upper 1506);
simultaneously deepening (forming 1802) fig. 18 [0045] the first openings (1318) (1802 deeper than previous openings) in the dielectric layer (1308) and extending the second openings (1508/1602) through the dielectric layer (1308), wherein a portion of each of the second openings (1508 with 1602) is turned (extended) into the first openings (1318) (when creating 1802); and
forming first conductive features (left 1900) fig. 19b [0046] in the first and second openings (1802) in the dielectric layer (1308), wherein each first conductive feature (1900) includes a first (1902) [0046] portion disposed over a second (1904) [0046] portion, and the first portion (1902) has dimensions larger (wider) than dimensions of the second portion (1904).
However, Tsai does not explicitly disclose wherein the first openings (1318) are formed by an inductively coupled plasma etch process,
extending the first openings (1318) by a capacitively coupled plasma etch process (merely “dry etching” is specified [0039]).
Lin teaches a method [0056, 0058] wherein the first openings (132A, 132B) fig. 4C [0058] are formed (at least in part) by an inductive coupled plasma etch process [0058] (“combined” with a capacitively coupled plasma dry etch process) [0058],
extending the first openings (132A, 132B) (extending beyond top of 124 layer) by a capacitively coupled plasma etch process [0058] (“combined” with an inductively coupled plasma dry etch process) [0058].
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the “dry etching” process of Tsai used for the formation of the opening(s) [0058] through dielectric layer(s) to be performed by a combination of capacitively- and inductively-coupled plasma [0058] in order to precisely remove select portions of the insulating material [0056-0058] according to an art-recognized combination of dry etching processes [0058], as taught by Lin.
Regarding claim 10, Tsai in view of Lin teaches the method [see title, fig. 12] as discussed in claim 9 above. Tsai also teaches wherein the first openings (1318) fig. 13 [0038-0039] are trenches [0038], and the second openings (1602) fig. 16 [0042-0043] are via openings [0043].
Regarding claim 11, Tsai in view of Lin teaches the method [see title, fig. 12] as discussed in claim 10 above. Tsai also teaches wherein further comprising removing (some of) the first layer (upper 1312) fig. 13 [0036] after (initially) simultaneously extending (forming 1802) fig. 18 [0045] the first openings (1318) figs. 13-14 [0038-0039] into the dielectric layer (1308) fig. 13 [0036, 0043] and extending the second openings (1508 extended by 1602) figs. 15-16 [0042-0043] through the dielectric layer (1308) (by forming 1802) (1312 layer(s) removed after the initial phase of extending the first openings 1318 [0039]).
Regarding claim 12, Tsai in view of Lin teaches the method [see title, fig. 12] as discussed in claim 11 above. Tsai also teaches the method [see title, fig. 12] further comprising:
forming a first etch stop layer (1304) fig. 13 [0036];
forming a second etch stop layer (1306) fig. 13 [0036] on the first etch stop layer (1304);
forming the dielectric layer (1308) fig. 13 [0036, 0043] on the second etch stop layer (1306);
forming the second layer (1310) fig. 13 [0039] on the dielectric layer (1308);
forming the first layer (upper layer of 1312-trilayer) fig. 13 [0038] on the second layer (1310); and
forming a third layer (middle layer of 1312-trilayer) [0039] on the (top of) second layer (1310).
Regarding claim 13, Tsai in view of Lin teaches the method [see title, fig. 12] as discussed in claim 12 above. Tsai in view also teaches wherein the third layer (middle of 3-layer 1312) fig. 13 [0038-0039] is (partially) removed during the forming the first openings (expanding 1316/1318) fig. 14 [0038-0039] in the first layer (upper 1312) fig. 13 [0038-0039].
Regarding claim 14, Tsai in view of Lin teaches the method [see title, fig. 12] as discussed in claim 12 above. Tsai also teaches further comprising removing portions of the first etch stop layer (1304) fig. 13 [0036] and portions of the second etch stop layer (1306) fig. 13 [0036] to expose portions of a second conductive feature (right 1900) fig. 19b [0046].
Regarding claim 15, Tsai in view of Lin teaches the method [see title, fig. 12] as discussed in claim 14 above. Tsai in view of Chang (with reference to Chang) also teaches further comprising forming barrier layers (130) fig. 2M [0057] in the first (306) fig. 2M [0060] and second (308) fig. 2M [0060] openings in the dielectric layer (112) fig. 2M [0051], wherein at least some of the barrier layers (130) are in contact with the second conductive feature (142) fig. 2O [0063-0065].
Regarding claim 26, Tsai in view of Lin teaches the method [see title, fig. 12] as discussed in claim 9 above. Tsai also teaches wherein the second layer (1310) fig. 14 [0039] is interfacing the dielectric layer (1308) fig. 13 [0036, 0043] and the first layer (comprising all three 1312 layers including lower 1312) fig. 13 [0038].
Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over Tsai (U.S. PG Pub No US2011/0076845A1) (of record) modified by Lin (U.S. PG Pub No US2017052419A1) (of record), as applied in claim 9 above, and further in view of Chang (U.S. PG Pub No US2018/0350658A1) (of record).
Regarding claim 22, Tsai in view of Lin teaches the method [see title, fig. 12] as discussed in claim 9 above. However, Tsai does not explicitly disclose each second opening (1802) has an opening angle ranging from about 115 degrees to about 120 degrees (straight edges instead).
Chang teaches a method [0101] wherein each second opening (308) fig. 2N [0052] has an opening angle ranging from about 115 degrees to about 120 degrees (because of the curved opening edges [0071] that transition through a wide range of angles comprising the range 115-120 degrees).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of Tsai to include the etching process of Chang [0071] in conjunction with the application of the adhesion layers [0058, 0071] in order to expand the space that is filled by the conductive feature [0063] without causing its shrinkage [0065] and delamination [0071], as taught by Chang.
Allowable Subject Matter
Claims 1-3, 7, 17, 19-20, 23-25, and 27 are allowed.
The following is an examiner’s statement of reasons for allowance:
Claim 1 is allowed because the prior art neither anticipates nor renders obvious the claimed limitation(s) “a first layer disposed on and interfacing the dielectric layer, a second layer disposed on and interfacing the first layer, and a third layer disposed on and interfacing the second layer, wherein the first layer and the third layer each includes an oxide, wherein the first layer is a single layer” in the context of claim 1. Claims 2-3, 7, and 25 are also allowed by virtue of their dependency on claim 1.
Claim 17 is allowed because the prior art neither anticipates nor renders obvious the claimed limitation(s) “a first layer disposed on and interfacing the dielectric layer, a second layer disposed on and interfacing the first layer, and a third layer disposed on and interfacing the second layer, wherein the first layer comprises an oxide and is a single layer” in the context of claim 17. Claims 19-20, 23-24, and 27 are also allowed by virtue of their dependency on claim 17.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Response to Arguments
Applicant's arguments filed 01/28/2026 with respect to claim 9 have been fully considered but they are not persuasive. Applicant’s Remarks do not specifical address out the supposed errors in the rejection of record with respect to the specific claim amendments presented in claim 9, hence the rejection presented above for claim 9 is considered as a sufficient response-to-arguments with respect to claim 9. It is emphasized that, with respect to the teachings of primary reference Tsai, “the second laver (1310) comprises an oxide (1310/510 [0036] may be formed of silicon-oxynitride [0023], an oxide-material) and is a single layer (1310 is shown formed as a single hard mask), and the (bottom of) second layer (1310) interfaces the (top of) dielectric layer (1308)”.
Examiner notes that claim 9 does not explicitly require that the “first layer is a single layer”, nor does it recite “a third layer”, nor does it require “interfacing” of the “first layer” or the “third layer” with other of the layers. These are considered essential features of the allowable subject matter indicated in claims 1 and 17 – and if claim 9 were amended in a similar manner to claims 1 and 17, claim 9 would also be rendered into allowable form.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Watatani (U.S. PG Pub No US2004/0082173A1) (of record) teaches another example of etching of the dielectric layer.
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/SEAN AYERS WINTERS/Examiner, Art Unit 2892
03/15/2026
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