Prosecution Insights
Last updated: April 19, 2026
Application No. 17/491,179

SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING

Final Rejection §103§112
Filed
Sep 30, 2021
Examiner
CHEN, YU
Art Unit
2896
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Ltd.
OA Round
4 (Final)
68%
Grant Probability
Favorable
5-6
OA Rounds
2y 10m
To Grant
98%
With Interview

Examiner Intelligence

Grants 68% — above average
68%
Career Allow Rate
711 granted / 1052 resolved
At TC average
Strong +30% interview lift
Without
With
+29.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
110 currently pending
Career history
1162
Total Applications
across all art units

Statute-Specific Performance

§101
2.2%
-37.8% vs TC avg
§103
43.9%
+3.9% vs TC avg
§102
27.0%
-13.0% vs TC avg
§112
20.7%
-19.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1052 resolved cases

Office Action

§103 §112
DETAILED ACTION This office action is in response to amendment filed 2/6/2026. Claims 13, 15-19, 21, 23, and 25-36 are pending. Claims 1-12, 14, 20, 22, and 24 have been canceled. Claim 36 is new. Claim 19 has been withdrawn. Claims 13, 17, 21, and 29 have been amended. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 13, 15-18, 21, 23, and 25-36 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for pre-AIA the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim 13 reciting “a thickness of the glue layer continuously increases along a height direction of the sidewall from the tapered end of the glue layer to a bottom end of the glue layer adjacent to the tab when viewed in cross-section” lacks adequate support. Applicant’s 2/6/2026 remark refers to paragraph [0031] and FIGs. 1, 8 and 9 for support of the claim amendments. Paragraph [0031] of the specification describes “due to glue layer etching behavior, a thickness of the glue layer 123 at or near the top of VD and VG is thinner than that disposed near the bottom, and is completely removed from some portions of the sidewalls in various embodiments”. The specification describes the thickness of the glue layer being thinner at/near the top of the via than near the bottom, i.e. a thickness at/near the top is thinner a thickness near the bottom. However, this does not fully supports the thickness “continuously increases … from the tapered end … to a bottom end”. Applicant’s specification does not describe the etching step continuously tapers the glue layer 123 from a topmost end to a bottommost end. Furthermore, FIG. 1 illustrates the semiconductor device structure, FIG. 8 illustrate the result of etching the liner 119, FIG. 9 illustrates deposition of metal layer 124,126 in the vias, and FIGs. 9A-9B illustrates detailed views of the respective drain via and gate via. As shown in the detailed views in FIG. 9A and FIG. 9B, only the top portion of the glue layer 123 is tapered, such that the thickness of the top tapered portion of the glue layer 123 is thinner and the thickness of the bottom non-tapered portion of the glue layer 123 is thicker. However, the thickness of the glue layer 123 is not depicted to be “continuously increased” from the topmost end to the bottommost end. FIGs. 9A & 9B are describes as illustrating detailed views, not alternative embodiments. Since FIGs. 1, 8 & 9 shows less detailed views, they do not provide sufficient support for “continuously increases … from the tapered end … to a bottom end” as the detailed views in FIGs. 9A & 9B clearly shows differently. Claim 17 reciting “a thickness of the glue layer continuously increases along a height direction of the sidewall of the drain via from the tapered end of the glue layer to a bottom end of the glue layer adjacent to a bottom end of the sidewall of the drain via when viewed in cross-section” lacks adequate support for same reasons as claim 13 as detailed above. Claim 21 reciting “a thickness of the conductive adhesive layer continuously increases along a height direction of the sidewall from the tapered end of the conductive adhesive layer to a bottom end of the conductive adhesive layer adjacent to the tab when viewed in cross-section” lacks adequate support for same reasons as claim 13 as detailed above. Other claims are rejected for depending on a rejected claim. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 13, 15-18, 21, 23, and 25-36 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Claim 13 reciting “a thickness of the glue layer continuously increases along a height direction of the sidewall from the tapered end of the glue layer to a bottom end of the glue layer adjacent to the tab when viewed in cross-section” renders the claim indefinite. Applicant’s original disclosure does not show how the glue layer has a thickness that “continuously increases … from the tapered end … to a bottom end”. The “tapered end”, as best understood, is referring to the tapered portion of the glue layer. Thus, it is unclear from which point of the “tapered end” of the glue layer is the continuously increasing thickness defined from. Furthermore, it is unclear what constitutes the “bottom end of the glue layer adjacent to the tab”. As best understood, the change in thickness terminates beyond the tapered end. Is the “bottom end” referring to the end of the tapered portion of the glue layer? Or is the “bottom end” referring to the bottommost end of the glue layer physically touching tab? However, as disclosed by Applicant, the thickness of the glue layer is not disclosed to be “continuously increased” until reaching such bottommost end of the glue layer. Therefore, it is unclear how is “a bottom end of the glue layer adjacent to the tab” defined. Claim 17 reciting “a thickness of the glue layer continuously increases along a height direction of the sidewall of the drain via from the tapered end of the glue layer to a bottom end of the glue layer adjacent to a bottom end of the sidewall of the drain via when viewed in cross-section” renders the claim indefinite same reasons as claim 13 as detailed above. Claim 21 reciting “a thickness of the conductive adhesive layer continuously increases along a height direction of the sidewall from the tapered end of the conductive adhesive layer to a bottom end of the conductive adhesive layer adjacent to the tab when viewed in cross-section” renders the claim indefinite same reasons as claim 13 as detailed above. Other claims are rejected for depending on a rejected claim. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 13, 15-16, 21, 23, 25-30, and 36 is/are rejected under 35 U.S.C. 103 as being unpatentable over Woo et al. US 6,509,267 B1 (Woo) in view of Li et al. US 2016/0013100 A1 (Li). PNG media_image1.png 296 726 media_image1.png Greyscale In re claim 13, as best understood, Woo discloses (e.g. FIGs. 1a-1i) a method for forming a semiconductor device structure, comprising: etching a via 24 through at least one etch stop layer 12 to expose a horizontal surface of a metal layer 10 (see FIG. 1f), the via having a sidewall; performing a first deposition process to form a liner layer 30 made of an insulating material along the sidewall and over the horizontal surface of the metal layer (FIG. 1d); performing a second deposition process to form a glue layer 31 made of a conductive material over the liner layer 30 (FIG. 1e); performing a first breakthrough of the glue layer 31 (etching of layer 31 until 30 is exposed) to expose an underlying portion of the liner layer 30; immediately after the first breakthrough, performing a second breakthrough of the underlying portion of the liner layer 30 (further etching of layer 30) to expose an underlying portion of the metal layer 10 (FIG. 1f), thereby forming a tab (horizontal portion of 30 under 31 in FIG. 1f) that prevents the glue layer 31 from contacting the metal layer 10; and filling the via 24 with a via metal layer 33,35,35 (FIG. 1g-1i). Woo discloses top portions of the glue layer 31 and liner layer 30 may be removed at 34 during etching (FIG. 1f, Column 8, lines 11-14). Woo does not explicitly disclose the ends of the glue layer and the liner layer are tapered near a top of the via, a portion of the tapered end of the liner layer extends to an uppermost end of the sidewall, and a portion of the tapered end of the glue layer extends below the uppermost end of the sidewall, and a thickness of the glue layer continuously increases along a height direction of the sidewall from the tapered end of the glue layer to a bottom end of the glue layer adjacent to the tab when viewed in cross-section. However, Li discloses (e.g. FIGs. 1-5, 8-10) forming barrier layer 324,536 and seed layer 326,534 along sidewalls of the via 312,520, wherein the ends 324a,326a,534a,536a of the layers 324,326,534,536 near a top of the via are tapered (FIGs. 5 & 10, ¶ 21,34), a portion of the tapered end of the barrier layer 324,536 extends to an uppermost end of the sidewall, and a portion of the tapered end of the seed layer 326,534 extends below the uppermost end of the sidewall, and “a thickness of the seed layer 326,534 continuously increases along a height direction of the sidewall from the tapered end of the seed layer 326,534 (as best understood, from the uppermost end of tapered portion 326a,534a) to a bottom end of the seed layer 326,534 (as best understood, to bottom end of tapered portion 326a,534a) when viewed in cross-section”. Li teaches the etching process that taper the upper ends of the layers to ensure removal of overhangs at the top of the via (¶ 21), and thus prevent defects from forming and improve electrical performance of the device (¶ 5-7). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to further adjust the etching condition to produce tapered profiles on the upper ends of Woo’s glue layer 31 and liner layer 30 to ensure removal of any overhangs, thereby preventing defects and improve electrical performance as taught by Li. As such, Woo’s glue layer 31 modified to form a tapered profile as taught by Li teaches a thickness of the glue layer 31 continuously increases along a height direction of the sidewall from “the tapered end of the glue layer” (as best understood, from the uppermost end of the tapered portion of glue layer 31) to “a bottom end of the glue layer” (as best understood, to the bottom end of tapered portion of glue layer 31) adjacent to the tab (“adjacent” is understood to mean “nearby”, no specific proximity is otherwise claimed, bottom end of tapered portion of glue layer 31 is considered to be “adjacent” to the tab of the horizontal portion of 30 under 31) when viewed in cross-section. In re claim 15, Li discloses (e.g. FIGs. 5 & 10) the tapered end of the glue layer 326,534 and the tapered end of the liner layer 324,536 form a continuous angled surface. In re claim 16, Woo discloses wherein the first breakthrough uses a chlorine gas and the second breakthrough uses a fluorine gas (Cl2 and ChF3, Column 7, lines 56-51). In re claim 21, as best understood, Woo discloses (e.g. FIGs. 1a-1i) a method for forming a semiconductor device structure, comprising: forming a via through at least one etch stop layer 12, the via disposed over a metal layer 10 (FIG. 1i); forming a liner layer 30 made of an insulating material over a horizontal surface of the metal layer 10, the liner layer 30 including a tab (horizontal portion of 30 under 31 in FIG. 1f) extending from a sidewall of the via along a first portion of the horizontal surface of the metal layer 10, and the tab ending at a substantially vertical liner surface (vertical sidewall of 30 at the bottom); applying a conductive adhesive layer 31 over a horizontal surface of the tab, the conductive adhesive layer 31 ending at a substantially vertical adhesive surface (vertical sidewall of 31) aligned with the substantially vertical liner surface (30 and 31 having aligned sidewalls), and filling the via 24 with a via metal layer 33,35,35 (FIG. 1g-1i), wherein the tab (horizontal portion of 30 under 31 in FIG. 1f) separates the conductive adhesive layer 31 from the metal layer 10 to prevent degradation of the conductive adhesive layer during electrical operation, and wherein the conductive adhesive layer 31 is disposed over at least a portion of the liner layer 30 along the sidewall. Woo discloses top portions of the conductive adhesive layer 31 and liner layer 30 may be removed at 34 during etching (FIG. 1f, Column 8, lines 11-14). Woo does not explicitly disclose the ends of the conductive adhesive layer and the liner layer are tapered near a top of the sidewall, the liner layer has a tapered end toward the top of the sidewall and a portion of the tapered end of the liner layer extends to an uppermost end of the sidewall, a portion of the tapered end of the conductive adhesive layer extends below the uppermost end of the sidewall, and a thickness of the conductive adhesive layer continuously increases along a height direction of the sidewall from the tapered end of the conductive adhesive layer to a bottom end of the conductive adhesive layer adjacent to the tab when viewed in cross-section. However, Li discloses (e.g. FIGs. 1-5, 8-10) forming barrier layer 324,536 and seed layer 326,534 along sidewalls of the via 312,520, wherein the ends 324a,326a,534a,536a of the layers 324,326,534,536 near a top of the via are tapered (FIGs. 5 & 10, ¶ 21,34), a portion of the tapered end of the barrier layer 324,536 extends to an uppermost end of the sidewall, and a portion of the tapered end of the seed layer 326,534 extends below the uppermost end of the sidewall, and “a thickness of the seed layer 326,534 continuously increases along a height direction of the sidewall from the tapered end of the seed layer 326,534 (as best understood, from the uppermost end of tapered portion 326a,534a) to a bottom end of the seed layer 326,534 (as best understood, to bottom end of tapered portion 326a,534a) when viewed in cross-section”. Li teaches the etching process that taper the upper ends of the layers to ensure removal of overhangs at the top of the via (¶ 21), and thus prevent defects from forming and improve electrical performance of the device (¶ 5-7). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to further adjust the etching condition to produce tapered profiles on the upper ends of Woo’s conductive adhesive layer 31 and liner layer 30 to ensure removal of any overhangs, thereby preventing defects and improve electrical performance as taught by Li. As such, Woo’s conductive adhesive layer 31 modified to form a tapered profile as taught by Li teaches a thickness of the conductive adhesive layer 31 continuously increases along a height direction of the sidewall from “the tapered end of the conductive adhesive layer” (as best understood, from the uppermost end of the tapered portion of conductive adhesive layer 31) to “a bottom end of the conductive adhesive layer” (as best understood, to the bottom end of tapered portion of conductive adhesive layer 31) adjacent to the tab (“adjacent” is understood to mean “nearby”, no specific proximity is otherwise claimed, bottom end of tapered portion of conductive adhesive layer 31 is considered to be “adjacent” to the tab of the horizontal portion of 30 under 31) when viewed in cross-section. In re claim 23, Woo discloses (e.g. FIG. 1i) wherein the liner layer 30 is disposed along the sidewall of the via. Woo does not explicitly discloses the liner layer 30 has a tapered end at a top of the sidewall. Li teaches layers barrier layer 536 and seed layer 534 having tapered ends 534a,536a at a top of the sidewall (FIG. 10, ¶ 34). In re claim 25, Li discloses (e.g. FIG. 10) wherein the tapered end 534a of the conductive seed layer 534 is below the top of the sidewall by a distance that depends on the angle θ and the thickness of the underlying layer 536. While Li teaches the angle θ is 10° to 45° (¶ 34), Li does not specify the thicknesses of the layers. Therefore, Li does not explicitly disclose the distance is between 0.1 nm and 5 nm. Woo teaches the thickness of the liner layer 30 is 2.5 nm - 10 nm (Column 7, lines 19-20). As such, when the angle θ is, e.g. 45°, and the thickness of the liner layer 30 is 2.5 nm, the adhesive layer 31 would be displaced 2.5 nm from the top of the sidewall. The vertical displacement distance is equal to thickness of the liner layer 30 divided by tan 45°. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to determine the optimal angle θ and layer thicknesses, to obtain a via structure with desired filling characteristics. Determining the angle, layer thicknesses, and the resulting distance the tapered end of the overlying seed/adhesive layer is displaced from the top of the sidewall is routine optimization. “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” See MPEP 2144.05 II. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955); see also Peterson, 315 F.3d at 1330, 65 USPQ2d at 1382; In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969). For more recent cases applying this principle, see Merck & Co. Inc. v. Biocraft Lab. Inc., 874 F.2d 804, 10 USPQ2d 1843 (Fed. Cir.), cert. denied, 493 U.S. 975 (1989); In re Kulling, 897 F.2d 1147, 14 USPQ2d 1056 (Fed. Cir. 1990); and In re Geisler, 116 F.3d 1465, 43 USPQ2d 1362 (Fed. Cir. 1997); Smith v. Nichols, 88 U.S. 112, 118-19 (1874); In re Williams, 36 F.2d 436, 438 (CCPA 1929). See also KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007). In re claim 26, Li discloses (e.g. FIGs. 5, 10) the tapered end 324a,326a,534a,536a of the layers 324,326,534,536 are substantially continuous. In re claim 27, Woo discloses (e.g. FIGs. 1a-1i) wherein a thickness of the liner layer 30 is between 1 nm and 30 nm (Column 7, lines 19-20). In re claim 28, Woo discloses (e.g. FIGs. 1a-1i) wherein the conductive adhesive layer 31 comprises at least one of cobalt, ruthenium, tantalum nitride, or titanium nitride (Column 7, lines 50-56). In re claim 29, Woo discloses (e.g. FIG. 1i) wherein the metal layer via 33-36 comprises at least one of copper, tungsten, ruthenium, cobalt, or titanium nitride (Column 8, lines 20-29, 43-46). In re claim 30, Woo discloses (e.g. FIG. 1i) wherein the via comprises a drain via (Column 1, lines 29-36) that extends through the at least one etch stop layer 12 to reach the horizontal surface of the metal layer 10. In re claim 36, Woo discloses (e.g. FIG. 1f) wherein the via 24 extends through the at least one etch stop layer 12 and an interlayer dielectric layer 14. Claims 33-35 are rejected under 35 U.S.C. 103 as being unpatentable over the combination of Woo and Li as applied to claim 16 above, and further in view of Kasahara US 5,618,754. In re claim 33, Woo discloses the first breakthrough uses a chlorine gas for etching (Cl2, Column 7, lines 56-51). Woo does not explicitly disclose the chlorine gas is used in combination with oxygen. However, Kasahar discloses adding O2 to an etching gas mixture comprising chlorine Cl, wherein the amount of oxygen added is controlled within a predetermined range to obtain good etching selection ratio for a barrier layer (Column 6, lines 16-34). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to add oxygen to Woo’s chlorine containing etching gas for improving etch selection ratio as taught by Kasahar. Furthermore, “where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” See MPEP 2144.05 II. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955); see also Peterson, 315 F.3d at 1330, 65 USPQ2d at 1382; In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969). For more recent cases applying this principle, see Merck & Co. Inc. v. Biocraft Lab. Inc., 874 F.2d 804, 10 USPQ2d 1843 (Fed. Cir.), cert. denied, 493 U.S. 975 (1989); In re Kulling, 897 F.2d 1147, 14 USPQ2d 1056 (Fed. Cir. 1990); and In re Geisler, 116 F.3d 1465, 43 USPQ2d 1362 (Fed. Cir. 1997); Smith v. Nichols, 88 U.S. 112, 118-19 (1874); In re Williams, 36 F.2d 436, 438 (CCPA 1929). See also KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007). In re claim 34, Kasahar discloses (FIG. 3; Column 5, lines 6-10; Table 1) the ratio of chlorine Cl2 to oxygen O2 is 9.6 to 1. In re claim 35, Woo discloses an etching gas containing fluorine (CHF3, Column 7, lines 56-51). Woo does not explicitly disclose the fluorine gas is used at a pressure between 5 mtorr and 70 mtorr. However, Kasahar discloses using a fluorine containing etching gas C3F8, wherein the operation pressure is 5 mTorr as adequate for carrying out the etching (Column 5, lines 6-10). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to perform etching using a fluorine gas at a pressure of 5 mtorr as taught by Kasahar to obtain the desired etching characteristics. Furthermore, “where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” See MPEP 2144.05 II. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955); see also Peterson, 315 F.3d at 1330, 65 USPQ2d at 1382; In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969). For more recent cases applying this principle, see Merck & Co. Inc. v. Biocraft Lab. Inc., 874 F.2d 804, 10 USPQ2d 1843 (Fed. Cir.), cert. denied, 493 U.S. 975 (1989); In re Kulling, 897 F.2d 1147, 14 USPQ2d 1056 (Fed. Cir. 1990); and In re Geisler, 116 F.3d 1465, 43 USPQ2d 1362 (Fed. Cir. 1997); Smith v. Nichols, 88 U.S. 112, 118-19 (1874); In re Williams, 36 F.2d 436, 438 (CCPA 1929). See also KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007). Claims 13, 15, 17-18, 21, 23, 25-32, and 36 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cheng et al. US 2019/0259855 A1 (Cheng) in view of Li et al. US 2016/0013100 A1 (Li). PNG media_image2.png 496 800 media_image2.png Greyscale In re claim 13, as best understood, Cheng discloses (e.g. FIGs. 1-12) a method for forming a semiconductor device structure, comprising: etching a via 127a,127b through at least one etch stop layer 128 to expose a horizontal surface of a metal layer 124a,124b, the via 127a,127b having a sidewall (FIG. 4, ¶ 34); performing a first deposition process to form a liner layer 132 made of an insulating material along the sidewall (of 127a,127b) and over the horizontal surface of the metal layer 124a,124b (FIG. 5, ¶ 35); performing a second deposition process to form a glue layer 134 made of a conductive material over the liner layer 132 (FIG. 6, ¶ 36); performing a first breakthrough of the glue layer 134 to expose an underlying portion of the liner layer 132 (etching of 134 until underlying 132 is exposed, FIG. 7, ¶ 37); immediately after the first breakthrough, performing a second breakthrough of the underlying portion of the liner layer 132 to expose an underlying portion of the metal layer 124a,124b (etching of 132, FIG. 7, ¶ 37), thereby forming a tab (portion of 132 between 134 and 124a,124b) that prevents the glue layer 134 from contacting the metal layer 124a,124b; and filling the via 127a,127b with a via metal layer 138a,138b (FIG. 9). Cheng does not explicitly disclose the ends of the glue layer 134 and the liner layer 132 are tapered near a top of the via, a portion of the tapered end of the liner layer extends to an uppermost end of the sidewall, and a portion of the tapered end of the glue layer extends below the uppermost end of the sidewall, and a thickness of the glue layer continuously increases along a height direction of the sidewall from the tapered end of the glue layer to a bottom end of the glue layer adjacent to the tab when viewed in cross-section. However, Li discloses (e.g. FIGs. 1-5, 8-10) forming barrier layer 324,536 and seed layer 326,534 along sidewalls of the via 312,520, wherein the layers 324,326,534,536 having tapered ends 324a,326a,534a,536a near a top of the via (FIGs. 5 & 10, ¶ 21,34), a portion of the tapered end of the barrier layer 324,536 extends to an uppermost end of the sidewall, and a portion of the tapered end of the seed layer 326,534 extends below the uppermost end of the sidewall, and “a thickness of the seed layer 326,534 continuously increases along a height direction of the sidewall from the tapered end of the seed layer 326,534 (as best understood, from the uppermost end of tapered portion 326a,534a) to a bottom end of the seed layer 326,534 (as best understood, to bottom end of tapered portion 326a,534a) when viewed in cross-section”. Li teaches the etching process that taper the upper ends of the layers to ensure removal of overhangs at the top of the via (¶ 21), and thus prevent defects from forming and improve electrical performance of the device (¶ 5-7). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to further adjust the etching condition to produce tapered profiles on the upper ends of Cheng’s glue layer 134 and liner layer 132 to ensure removal of any overhangs, thereby preventing defects and improve electrical performance as taught by Li. As such, Cheng’s glue layer 134 modified to form a tapered profile as taught by Li teaches a thickness of the glue layer 134 continuously increases along a height direction of the sidewall from “the tapered end of the glue layer” (as best understood, from the uppermost end of the tapered portion of glue layer 134) to “a bottom end of the glue layer” (as best understood, to the bottom end of tapered portion of glue layer 134) adjacent to the tab (“adjacent” is understood to mean “nearby”, no specific proximity is otherwise claimed, bottom end of tapered portion of glue layer 134 is considered to be “adjacent” to the tab of the horizontal portion of 132 under 134) when viewed in cross-section. In re claim 15, Li discloses (e.g. FIGs. 5 & 10) the tapered end of the glue layer 326,534 and the tapered end of the liner layer 324,536 form a continuous angled surface. In re claim 17, as best understood, Cheng discloses (e.g. FIGs. 1-12) a method of manufacturing a semiconductor device, comprising: etching a drain via 127a through at least one etch stop layer 128 to expose a horizontal surface of a drain metal layer 124a, the drain via 127a having a sidewall (FIG. 4, ¶ 34); etching a gate via 127b through at least one etch stop layer 128 and a gate helmet layer 130 (no specific “gate helmet layer” claimed to distinguish over layer 130 formed over the gate) to expose a horizontal surface of a gate metal layer 124b (FIG. 4, ¶ 34), the gate via 127b having a sidewall; depositing a liner layer 132 made of an insulating material along the sidewall of the drain via 127a, over the horizontal surface of the drain metal layer 124a, along a sidewall of the gate via 127b, and over the horizontal surface of the gate metal layer 124b (FIG. 5, ¶ 35); depositing a glue layer 134 made of a conductive material over the liner layer 132 (FIG. 6, ¶ 36); performing a first breakthrough etch of the glue layer 134 to expose an underlying portion of the liner layer 132 within the drain via 127a and the gate via 127b (etching of 134 until underlying 132 is exposed, FIG. 7, ¶ 37); immediately after the first breakthrough etch, performing a second breakthrough etch of the underlying portion of the liner layer 132 to expose underlying portions of the drain metal layer 124a and the gate metal layer 124b (etching of 132, FIG. 7, ¶ 37), wherein the glue layer 134 is not in contact with either the drain metal layer 124a or the gate metal layer 124b; and filling the drain via 127a with a drain via metal 138a (FIG. 9). Cheng does not explicitly disclose the ends of the glue layer 134 and the liner layer 132 are tapered near a top of the via, a portion of the tapered end of the liner layer extends to an uppermost end of the sidewall, and a portion of the tapered end of the glue layer extends below the uppermost end of the sidewall, and a thickness of the glue layer continuously increases along a height direction of the sidewall of the drain via from the tapered end of the glue layer to a bottom end of the glue layer adjacent to a bottom end of the sidewall of the drain via when viewed in cross-section. However, Li discloses (e.g. FIGs. 1-5, 8-10) forming barrier layer 324,536 and seed layer 326,534 along sidewalls of the via 312,520, wherein the layers 324,326,534,536 having tapered ends 324a,326a,534a,536a near a top of the via (FIGs. 5 & 10, ¶ 21,34), a portion of the tapered end of the barrier layer 324,536 extends to an uppermost end of the sidewall, and a portion of the tapered end of the seed layer 326,534 extends below the uppermost end of the sidewall, and “a thickness of the seed layer 326,534 continuously increases along a height direction of the sidewall from the tapered end of the seed layer 326,534 (as best understood, from the uppermost end of tapered portion 326a,534a) to a bottom end of the seed layer 326,534 (as best understood, to bottom end of tapered portion 326a,534a) when viewed in cross-section”. Li teaches the etching process that taper the upper ends of the layers to ensure removal of overhangs at the top of the via (¶ 21), and thus prevent defects from forming and improve electrical performance of the device (¶ 5-7). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to further adjust the etching condition to produce tapered profiles on the upper ends of Cheng’s glue layer 134 and liner layer 132 to ensure removal of any overhangs, thereby preventing defects and improve electrical performance as taught by Li. As such, Cheng’s glue layer 134 modified to form a tapered profile as taught by Li teaches a thickness of the glue layer 134 continuously increases along a height direction of the sidewall of the drain via 127a from “the tapered end of the glue layer” (as best understood, from the uppermost end of the tapered portion of glue layer 134) to “a bottom end of the glue layer” (as best understood, to the bottom end of tapered portion of glue layer 134) adjacent to a bottom end of the sidewall of the drain via 127a (“adjacent” is understood to mean “nearby”, no specific proximity is otherwise claimed, bottom end of tapered portion of glue layer 134 is considered to be “adjacent” to the bottom end of the sidewall of the drain via 127a) when viewed in cross-section. In re claim 18, Cheng discloses (e.g. FIGs. 8-9, ¶ 39-40) further comprising: forming a gate via metal layer 136b+138b over the glue layer 134 and an exposed portion of the gate metal layer 124b, wherein the gate via metal layer 136b+138b substantially fills the gate via 127b. In re claim 21, Cheng discloses (e.g. FIGs. 1-12) a method for forming a semiconductor device structure, comprising: forming a via 127 through at least one etch stop layer 128, the via 127 disposed over a metal layer 124; forming a liner layer 132 made of an insulating material over a horizontal surface of the metal layer 124 (FIG. 4, ¶ 34), the liner layer 132 including a tab (portion between 134 and 124) extending from a sidewall of the via along a first portion of the horizontal surface of the metal layer 124, and the tab ending at a substantially vertical liner surface (ends sidewall of 132); applying a conductive adhesive layer 134 over a horizontal surface of the tab, the conductive adhesive layer 134 ending at a substantially vertical adhesive surface aligned with the substantially vertical liner surface (sidewall of 134 aligned with ends of 132); and filling the via 127a,127b with a via metal layer 138a,138b (FIG. 9), wherein the tab (portion of 132 between 134 and 124) separates the conductive adhesive layer 134 from the metal layer 124 to prevent degradation of the conductive adhesive layer during electrical operation, and wherein the conductive adhesive layer 134 is disposed over at least a portion of the liner layer 132 along the sidewall. Cheng does not explicitly disclose the ends of the conductive adhesive layer and the liner layer are tapered near a top of the sidewall, the liner layer has a tapered end toward the top of the sidewall and a portion of the tapered end of the liner layer extends to an uppermost end of the sidewall, a portion of the tapered end of the conductive adhesive layer extends below the uppermost end of the sidewall, and a thickness of the conductive adhesive layer continuously increases along a height direction of the sidewall from the tapered end of the conductive adhesive layer to a bottom end of the conductive adhesive layer adjacent to the tab when viewed in cross-section. However, Li discloses (e.g. FIGs. 1-5, 8-10) forming barrier layer 324,536 and seed layer (conductive adhesive layer) 326,534 along sidewalls of the via 312,520, wherein the layers 324,326,534,536 having tapered ends 324a,326a,534a,536a near a top of the via (FIGs. 5 & 10, ¶ 21,34), a portion of the tapered end of the barrier layer 324,536 extends to an uppermost end of the sidewall, and a portion of the tapered end of the seed layer 326,534 extends below the uppermost end of the sidewall. Li teaches the etching process that taper the upper ends of the layers to ensure removal of overhangs at the top of the via (¶ 21), and thus prevent defects from forming and improve electrical performance of the device (¶ 5-7). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to further adjust the etching condition to produce tapered profiles on the upper ends of Cheng’s conductive adhesive layer 134 and liner layer 132 to ensure removal of any overhangs, thereby preventing defects and improve electrical performance as taught by Li. As such, Cheng’s conductive adhesive layer 134 modified to form a tapered profile as taught by Li teaches a thickness of the conductive adhesive layer 134 continuously increases along a height direction of the sidewall from “the tapered end of the conductive adhesive layer” (as best understood, from the uppermost end of the tapered portion of conductive adhesive layer 134) to “a bottom end of the conductive adhesive layer” (as best understood, to the bottom end of tapered portion of conductive adhesive layer 134) adjacent to the tab (“adjacent” is understood to mean “nearby”, no specific proximity is otherwise claimed, bottom end of tapered portion of conductive adhesive layer 134 is considered to be “adjacent” to the tab of the horizontal portion of 132 under 134) when viewed in cross-section. In re claim 23, Cheng discloses (e.g. FIG. 7) wherein the liner layer 132 is disposed along the sidewall of the via. Cheng does not explicitly discloses the liner layer has a tapered end at a top of the sidewall. Li teaches layers barrier layer 536 and seed layer 534 having tapered ends 534a,536a at a top of the sidewall (FIG. 10, ¶ 34). In re claim 25, Li discloses (e.g. FIG. 10) wherein the tapered end 534a of the conductive seed layer 534 is below the top of the sidewall by a distance that depends on the angle θ and the thickness of the underlying layer 536. While Li teaches the angle θ is 10° to 45° (¶ 34), Li does not specify the thicknesses of the layers. Therefore, Li does not explicitly disclose the distance is between 0.1 nm and 5 nm. Cheng discloses (FIG. 1) wherein a thickness of the liner layer 132 is about 1-1.5 nm (¶ 35). As such, when the angle θ is, e.g. 45°, and the thickness of the liner layer 132 is 1.5 nm, the adhesive layer 134 would be displaced 1.5 nm from the top of the sidewall. The vertical displacement distance is equal to thickness of the liner layer 132 divided by tan 45°. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to determine the optimal angle θ and layer thicknesses, to obtain a via structure with desired filling characteristics. Determining the angle, layer thicknesses, and the resulting distance the tapered end of the overlying seed/adhesive layer is displaced from the top of the sidewall is routine optimization. “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” See MPEP 2144.05 II. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955); see also Peterson, 315 F.3d at 1330, 65 USPQ2d at 1382; In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969). For more recent cases applying this principle, see Merck & Co. Inc. v. Biocraft Lab. Inc., 874 F.2d 804, 10 USPQ2d 1843 (Fed. Cir.), cert. denied, 493 U.S. 975 (1989); In re Kulling, 897 F.2d 1147, 14 USPQ2d 1056 (Fed. Cir. 1990); and In re Geisler, 116 F.3d 1465, 43 USPQ2d 1362 (Fed. Cir. 1997); Smith v. Nichols, 88 U.S. 112, 118-19 (1874); In re Williams, 36 F.2d 436, 438 (CCPA 1929). See also KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007). In re claim 26, Li discloses (e.g. FIGs. 5, 10) the tapered end 324a,326a,534a,536a of the layers 324,326,534,536 are substantially continuous. In re claim 27, Cheng discloses (FIG. 1) wherein a thickness of the liner layer 132 is between 1 nm and 30 nm (about 1-1.5 nm, ¶ 35). In re claim 28, Cheng discloses (FIG. 1) wherein the conductive adhesive layer 134 comprises at least one of cobalt, ruthenium, tantalum nitride, or titanium nitride (¶ 36). In re claim 29, Cheng discloses (FIG. 1) wherein the via metal layer 136,138 comprises at least one of copper, tungsten, ruthenium, cobalt, or titanium nitride (¶ 39,40). In re claim 30, Cheng discloses (e.g. FIG. 1) wherein the via comprises a drain via 136b+138b that extends through the at least one etch stop layer 128 to reach the horizontal surface of the metal layer 124a (¶ 13). In re claim 31, Cheng discloses (e.g. FIG. 1) wherein the metal layer 124 is disposed over a silicide layer 118 that extends to an upper surface of a substrate (¶ 13). In re claim 32, Cheng discloses (FIG. 1) wherein the metal layer 124a is disposed within a drain adhesive layer (SiN layer of 122) and a drain liner layer (TiN,TaN layer of 122) within a drain metal structure (¶ 21). Cheng does not explicitly disclose a top end of the drain adhesive layer and a top end of the drain liner layer are tapered. However, Li discloses (e.g. FIGs. 1-5, 8-10) forming barrier layer 324,536 and seed layer 326,534 along sidewalls of the via 312,520, wherein the layers 324,326,534,536 having tapered ends 324a,326a,534a,536a near a top of the sidewall (FIGs. 5 & 10, ¶ 21,34). Li teaches the etching process that taper the upper ends of the layers to ensure removal of overhangs at the top of the via (¶ 21), and thus prevent defects from forming and improve electrical performance of the device (¶ 5-7). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to further adjust the etching condition to produce tapered profiles on the upper ends of Cheng’s drain adhesive layer (SiN layer of 122) and drain liner layer (TiN,TaN layer of 122) to ensure removal of any overhangs, thereby preventing defects and improve electrical performance as taught by Li. In re claim 36, Cheng discloses (e.g. FIG. 4) wherein the via 127a,127b extends through the at least one etch stop layer 128 and an interlayer dielectric layer 130. Response to Arguments Applicant's arguments filed 2/6/2026 have been fully considered but they are not persuasive. Applicant agues amended claims 13, 17 and 21 are not taught by the combination of Woo and Li or the combination of Cheng and Li (Remark, pages 8). This is not persuasive. While Woo and Cheng do not specifically teach tapering the upper ends of the glue layer and the liner layer, Li does teaches an etching process that taper the upper ends of the barrier and seed layers to ensure removal of overhangs at the top of the via (¶ 21), and thus prevent defects from forming and improve electrical performance of the device (¶ 5-7). Therefore, it would have been obvious to modify Woo’s glue layer 31 and liner layer 30 to produce tapered profiles on the upper ends ensure removal of any overhangs, thereby preventing defects and improve electrical performance as taught by Li. Similarly, it would have been obvious to modify Cheng’s glue layer 134 and liner layer 132 with tapered profiles on the upper ends to ensure removal of any overhangs, thereby preventing defects and improve electrical performance as taught by Li. Thus, Woo’s glue layer 31 or Cheng’s glue layer 134 modified to form a tapered profile as taught by Li teaches a thickness of the glue layer continuously increases along a height direction of the sidewall from “the tapered end of the glue layer” (as best understood, from the uppermost end of the tapered portion of glue layer) to “a bottom end of the glue layer” (as best understood, to the bottom end of tapered portion of glue layer) adjacent to the tab (“adjacent” is understood to mean “nearby”, no specific proximity is otherwise claimed) when viewed in cross-section. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to YU CHEN whose telephone number is (571)270-7881. The examiner can normally be reached Monday-Friday: 9AM-5PM ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, WILLIAM KRAIG can be reached on 5712728660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /YU CHEN/Primary Examiner, Art Unit 2896 YU CHEN Examiner Art Unit 2896
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Prosecution Timeline

Sep 30, 2021
Application Filed
Aug 26, 2024
Non-Final Rejection — §103, §112
Nov 27, 2024
Interview Requested
Dec 04, 2024
Applicant Interview (Telephonic)
Dec 04, 2024
Examiner Interview Summary
Feb 28, 2025
Response Filed
Apr 17, 2025
Final Rejection — §103, §112
Jun 20, 2025
Response after Non-Final Action
Jul 17, 2025
Request for Continued Examination
Jul 19, 2025
Response after Non-Final Action
Oct 17, 2025
Non-Final Rejection — §103, §112
Dec 17, 2025
Interview Requested
Jan 20, 2026
Interview Requested
Jan 27, 2026
Examiner Interview (Telephonic)
Jan 27, 2026
Examiner Interview Summary
Feb 06, 2026
Response Filed
Apr 02, 2026
Final Rejection — §103, §112 (current)

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2y 10m
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