Prosecution Insights
Last updated: April 19, 2026
Application No. 17/508,660

PATTERNING OXIDATION RESISTANT ELECTRODE IN CROSSBAR ARRAY CIRCUITS

Non-Final OA §103
Filed
Oct 22, 2021
Examiner
LIU, BENJAMIN T
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Tetramem Inc.
OA Round
6 (Non-Final)
74%
Grant Probability
Favorable
6-7
OA Rounds
3y 1m
To Grant
87%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allow Rate
511 granted / 687 resolved
+6.4% vs TC avg
Moderate +13% lift
Without
With
+12.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
48 currently pending
Career history
735
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
56.9%
+16.9% vs TC avg
§102
32.8%
-7.2% vs TC avg
§112
9.2%
-30.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 687 resolved cases

Office Action

§103
DETAILED ACTION Office action sent 5/23/2025 has been withdrawn and new rejection recited below. Response to Arguments Applicant’s arguments, see page 6 of the arguments, filed 9/23/2025, with respect to the rejection of claim 16 under 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Majhi et al. (US 2017/0271583). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 16-20, 22-24, 26, and 30 are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al. (US 2015/0349253) in view of Majhi et al. (US 2017/0271583) (“Majhi”). With regard to claim 16, fig. 9 of Huang discloses an apparatus, comprising: a substrate 101; a patterned bottom electrode 201 formed on the substrate 101, wherein the patterned bottom electrode 201 comprises an oxidation resistance conductive material (“Pt”, par [0060]), wherein the patterned bottom electrode 201 comprises a layer of titanium (“Ti”, par [0060]) and a layer comprising at least one of palladium (Pd) or platinum (Pt) (“Pt”, par [0060]); that the layer of Ti (“Ti”, par [0046]) in the patterned bottom electrode 201 is fabricated between (“Ti is used as an adhesion layer, and Pt are used for the bottom electrodes”, par [0060]) the substrate 101 and the layer 201 comprising at least one of palladium or platinum (“Pt”, par [0060]); a filament forming layer 301 formed on the patterned bottom electrode 201, wherein the filament forming layer 301 comprises at least one of TaOx (where x<2.5) (“TaOx layer”, par [0061]), HfOx (where x<2), TiOx (where x<2), or ZrOx (where x<2); and a top electrode 501 formed on the filament forming layer 301; a thermal oxide layer (“SiO.sub.2 is grown”, par [0059]) formed between the substrate (“silicon substrate”, par [0059]) and the patterned bottom electrode 201. Huang does not disclose a passivation layer formed on a top surface of the thermal oxide layer, a sidewall of the patterned bottom electrode, a sidewall of the filament forming layer, and a sidewall of the top electrode, wherein the layer comprising at least one of palladium or platinum comprises palladium. However, figure 10F of Majhi discloses a passivation layer 310 formed on a top surface (top of 1001 under 310 in fig. 10F) of the thermal oxide (“silicon dioxide”, par [0085]) layer 1001, a sidewall (sidewall of 101) of the patterned bottom electrode 101, a sidewall (sidewall of 302’) of the filament forming layer 302’, and a sidewall (sidewall of 103) of the top electrode 103, wherein the layer 101 comprising at least one of palladium or platinum 101 comprises palladium (“palladium”, par [0035]). Therefore, it would have been obvious to one of ordinary skill in the art to form the bottom electrode of Huang with the palladium as taught in Majhi order to provide a suitable electrode material for the resistive memory cell. See par [0035] of Majhi. With regard to claim 17, fig. 9 of Huang discloses that the oxidation resistance conductive material (“Pt”, par [0060]) comprises at least one of Pt (“Pt”, par [0060]), Pd, or Ir. With regard to claim 18, fig. 9 of Huang discloses that the substrate 101 comprises at least one of Si, SiO2 (“SiO2”, par [0059]), Si3N4, A1203, AIN, or glass. With regard to claim 19, Huangi does not disclose that the layer comprising at least one of palladium or platinum comprises an alloy comprising Pd. However, figure 10F of Majhi discloses that the layer comprising at least one of palladium or platinum 101 comprises an alloy comprising Pd (“palladium”, par [0035]). Therefore, it would have been obvious to one of ordinary skill in the art to form the bottom electrode of Huang with the palladium as taught in Majhii order to provide a suitable electrode material for the resistive memory cell. See par [0035] of Majhi. With regard to claim 20, Huang does not disclose that the alloy comprising Pd comprises at least one of Pt or Ir. However, figure 10F of Majhi discloses that the alloy (“combinations thereof” par [0035]) comprising Pd (“palladium”, par [0035]) comprises at least one of Pt (“platinum”, par [0035]) or Ir. Therefore, it would have been obvious to one of ordinary skill in the art to form the bottom electrode of Huang with the combination of palladium and platinum as taught in Majhi order to provide a suitable electrode material for the resistive memory cell. See par [0035] of Majhi. With regard to claim 22, Huang does not disclose a thickness of the patterned bottom electrode is between 10 nanometers and 30 nanometers. However, fig. 10F of Majhi discloses a thickness of the patterned bottom electrode 101 is between 10 nanometers and 30 nanometers (“2 to about 25 nm”, par [0036]). Therefore, it would have been obvious to one of ordinary skill in the art to form the bottom electrode of Huang with the thickness as taught in Majhi in order to provide a suitable thickness for the resistive memory cell. See par [0036] of Majhi. With regard to claim 23, fig. 9 of Huang discloses that the top electrode 501 comprises at least one of Pd, Pt, Ir, W, Ta, Hf Nb, V, Ti (“Ti”, par [0046]), TiN, TaN, or NbN. With regard to claim 24, fig. 9 of Huang discloses that the thermal oxide layer comprises SiO2 (“SiO.sub.2 is grown”, par [0059]). With regard to claim 26, fig. 9 of Huang discloses a filament (“conductive channel formed by the oxygen vacancies”, par [0030]) is formed in the filament forming layer 301 responsive to a switching voltage applied to the filament forming layer 301. With regard to claim 30, Huang does not the layer comprising at least one of palladium or platinum comprises an alloy comprising Pt and Pd. However, fig. 10F of Majhi discloses the layer comprising at least one of palladium or platinum 101 comprises an alloy comprising Pt and Pd (“palladium, silver, osmium, iridium, platinum, and gold, metal nitrides such as titanium nitride, tantalum nitride, combinations thereof”, par [0035]). Therefore, it would have been obvious to one of ordinary skill in the art to form the bottom electrode of Huang with the palladium as taught in Majhii order to provide a suitable electrode material for the resistive memory cell. See par [0035] of Majhi. Claim 27 is rejected under 35 U.S.C. 103 as being unpatentable over Huang et al. (US 2015/0349253), Majhi et al. (US 2017/0271583) (“Majhi”), and Majhi et al. (US 2019/0036020) (“Majhi II”). With regard to claim 27, Huang and Majhhi do not disclose a first row wire connected to the patterned bottom electrode, and a first column wire connected to the top electrode. However, fig. 2 of Majhi II discloses a first row wire (“source line of the memory cell”, par [0023]) connected to the patterned bottom electrode 231, and a first column wire (“bit-line”, par [0023]) connected (“coupling one portion or node of the stack (e.g., top electrode of FIG. 2) to a bit-line”, par [0023]) to the top electrode 201. Therefore, it would have been obvious to one of ordinary skill in the art to form the resistive random access memory of Huang with the bit-line and source line as taught in Majhi II in order to provide a plurality of the RRAM memory cells operably connected to one another to form a memory array. See par [0023] of Majhi II. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to BENJAMIN T LIU whose telephone number is (571)272-6009. The examiner can normally be reached Monday-Friday 11:00am-7:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara J Green can be reached at 571 270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BENJAMIN TZU-HUNG LIU/Primary Examiner, Art Unit 2893
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Prosecution Timeline

Oct 22, 2021
Application Filed
Feb 09, 2022
Response after Non-Final Action
Dec 17, 2022
Non-Final Rejection — §103
Apr 24, 2023
Response Filed
Aug 16, 2023
Non-Final Rejection — §103
Nov 22, 2023
Response Filed
Feb 24, 2024
Final Rejection — §103
Jul 01, 2024
Request for Continued Examination
Jul 03, 2024
Response after Non-Final Action
Sep 20, 2024
Non-Final Rejection — §103
Feb 24, 2025
Response Filed
May 21, 2025
Final Rejection — §103
Sep 23, 2025
Response after Non-Final Action
Oct 23, 2025
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

6-7
Expected OA Rounds
74%
Grant Probability
87%
With Interview (+12.6%)
3y 1m
Median Time to Grant
High
PTA Risk
Based on 687 resolved cases by this examiner. Grant probability derived from career allow rate.

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