DETAILED ACTION
Response to Arguments
Applicant’s arguments with respect to claim 16 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 16-18, 23-24, and 26-27 are rejected under 35 U.S.C. 103 as being unpatentable over Wei (US 2014/0050013) in view of Fowler (US 2015/0053908).
With regard to claim 16, fig. 1 of Wei discloses an apparatus, comprising: a substrate 101; a patterned bottom electrode 103 formed on the substrate 101, wherein the patterned bottom electrode 103 comprises an oxidation resistance conductive material (“palladium”, par [0099]), wherein the patterned bottom electrode 103 comprises a layer of titanium (“Ti adhesion layer”, par [0111]) and a layer comprising palladium (Pd) (“palladium”, par [0099]), wherein the layer of Ti (“Ti adhesion layer”, par [0111]) in the patterned bottom electrode 103 is fabricated between the substrate 101 and the layer comprising palladium (“palladium”, par [0099]); a filament forming layer 104 formed on the patterned bottom electrode 103, wherein the filament forming layer 104 comprises at least one of TaOx (where x≤ 2.5) (“TaO.sub.2.5”, par [0080]), HfOx (where x≤ 2), TiOx (where x≤ 2), or ZrOx (where x≤ 2); a top electrode 106 formed on the filament forming layer 104; a thermal oxide layer 102 formed between the substrate 101 and the patterned bottom electrode 103.
Wei does not disclose a passivation layer formed on a top surface of the thermal oxide layer, a sidewall of the patterned bottom electrode, a sidewall of the filament forming layer, and a sidewall of the top electrode.
However, fig. 1(j) of Fowler discloses a passivation layer (Passivation Layer, fig. 1(j)) formed on a top surface of the thermal oxide layer (Insulator, fig. 1(j)), a sidewall of the patterned bottom electrode (Lower Electrode, fig. 1(j)), a sidewall of the filament forming layer (Oxide Layer, fig. 1(j)), and a sidewall of the top electrode (Upper Electrode, fig. 1(j)).
Therefore, it would have been obvious to one of ordinary skill in the art to form the memory device of Wei with the passivation layer as taught in Fowler in order to enable insulated electrical connection and device operation in air. See par [0037] of Fowler.
With regard to claim 17, fig. 1 of Wei discloses an the oxidation resistance conductive material 102 comprises at least one of Pt, Pd (“palladium”, par [0099]), or Jr.
With regard to claim 18, fig. 1 of Wei discloses that the substrate 101 comprises at least one of Si (“silicon”, par [0111]), SiO2, Si3N4, Al2O3, AIN, or glass.
With regard to claim 23, fig. 1 of Wei discloses that the top electrode 106 comprises at least one of Pd (“palladium”, par [0099]), Pt, Ir, W, Ta, Hfl Nb, V, Ti, TiN, TaN, or NbN.
With regard to claim 24, fig. 1 of Wei discloses that the thermal oxide layer 102 comprises SiO2 (“a single-crystal silicon, according to a thermal oxidation method”, par [0111]).
With regard to claim 26, fig. 1 of Wei discloses a filament 105 is formed in the filament forming layer 104 responsive to a switching voltage (“breakdown voltage”, par [0117]) applied to the filament forming layer 105.
With regard to claim 27, fig. 1 of Wei discloses a first row wire WL0 connected to the patterned bottom electrode 103, and a first column wire BL1 connected to the top electrode 106.
Claims 19-20 and 30 are rejected under 35 U.S.C. 103 as being unpatentable over Wei (US 2014/0050013), Fowler (US 2015/0053908), and Himeno (US 2012/0193600).
With regard to claim 19, fig. 1 of Wei discloses that layer 103 comprising palladium (“palladium”, par [0099]).
Wei and Fowler do not disclose an alloy comprising Pd.
However, fig. 1C of Himeno discloses alloy (“alloy of the metals”, par [0016]) comprising Pd (“palladium”, par [0016]).
Therefore, it would have been obvious to one of ordinary skill in the art to form the bottom electrode of Wei with the alloy of palladium as taught in Himeno in order to provide a variable resistance nonvolatile memory element with a stable variable resistance characteristic. See par [0015] of Himeno.
With regard to claim 20, Wei and Fowler do not disclose that the alloy comprising Pd comprises at least one of Pt or Ir.
However, fig. 1C of Himeno discloses that the alloy (“alloy of the metals”, par [0016]) comprising Pd (“palladium”, par [0016]) comprises at least one of Pt (“platinum”, par [0016]) or Ir.
Therefore, it would have been obvious to one of ordinary skill in the art to form the bottom electrode of Wei with the alloy of palladium as taught in Himeno in order to provide a variable resistance nonvolatile memory element with a stable variable resistance characteristic. See par [0015] of Himeno.
With regard to claim 30, fig. 1 of Wei discloses that the layer comprising at least one of palladium (“palladium”, par [0099]) or platinum.
Wei and Fowler do not disclose an alloy comprising Pt and Pd.
However, Himeno discloses an alloy (“alloy of the metals”, par [0016]) comprising Pt (“platinum”, par [0016]) and Pd (“palladium”, par [0016]).
Therefore, it would have been obvious to one of ordinary skill in the art to form the bottom electrode of Wei with the alloy of palladium as taught in Himeno in order to provide a variable resistance nonvolatile memory element with a stable variable resistance characteristic. See par [0015] of Himeno.
Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over Wei (US 2014/0050013), Fowler (US 2015/0053908), and Majhi (US 2017/0271583).
With regard to claim 22, Wei and Fowler do not disclose a thickness of the patterned bottom electrode is between 10 nanometers and 30 nanometers.
However, fig. 10F of Majhi discloses a thickness of the patterned bottom electrode 101 is between 10 nanometers and 30 nanometers (“2 to about 25 nm”, par [0036]).
Therefore, it would have been obvious to one of ordinary skill in the art to form the bottom electrode of Wei with the thickness as taught in Majhi in order to provide a suitable thickness for the resistive memory cell. See par [0036] of Majhi.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/BENJAMIN TZU-HUNG LIU/ Primary Examiner, Art Unit 2893