DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 04 December 2025 has been entered.
Response to Arguments
Applicant’s arguments/amendments, see Remarks/Claims, filed 04 December 2025, with respect to the rejection(s) of the claim(s) in the previous Office action have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of the prior art referenced in the rejections below.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 3-8 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding Claim 3, it recites “wherein the first portion and second portion have been planarized so that their respective upper surfaces are flat and coplanar. There is no support for this found in the specification and drawings, as the second portion (1622) is planarized, but the first portion (1621) is not, as shown in Fig. 5B. It appears there would be support if the limitations recited “wherein the first layer and the second layer have been planarized so that their respective upper surfaces are flat and coplanar.”
For at least this reason, claims 4-8 are also rejected based on their dependency from claim 3.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
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Claims 1-3 are rejected under 35 U.S.C. 102 (a)(2) as being anticipated by Yao-Wen Chang et al. (US 20210111312 A1; hereinafter Chang).
Regarding Claim 1, Chang discloses a display device (Annotated Fig. 5) comprising:
a substrate (102; ¶0018);
a first signal line (126b; ¶0027; which transmits signals from the transistors 104 to the pixel element in 114b) and a second signal line (120b; ¶0024; which transmits signals from the transistors 104 to the pixel element in 114b) disposed on the substrate (102); and
an interlayer-insulating layer (514/516; ¶0059) disposed between the first signal line (126b) and the second signal line (120b),
wherein the interlayer-insulating layer (514/516) includes a first portion (514/516 at height of P1 in the annotated Fig. 5) and a second portion (514/516 at height of P2 in the annotated Fig. 5), the second portion (P2) being laterally adjacent to the first portion (P1) (P1 in area 114b is laterally adjacent P2 in area 114a), having different heights measured from a major surface of the substrate (top of 102) along a first direction (up/down) that is perpendicular to the major surface of the substrate (top of 102) (as shown in annotated Fig. 5), the first portion (P1) is continuous and uninterrupted by contact holes between the first portion (P1) and the second portion (P2) (no direction is defined, between P1 and P2 in a vertical direction and or horizontal direction in adjacent parts of P1 and P2 are uninterrupted by contact holes in the area between 114a and 114b),
an entirety of an upper surface of the first portion (P1) of the interlayer-insulating layer (514/516 at P1 height) is flat and coplanar (as shown in annotated Fig. 5), an entirety of an upper surface of the second portion (P2) of the interlayer-insulating layer (514/516 at height P2) is flat and coplanar (as shown in annotated Fig. 5),
a height of an entire range of the first portion (514/516 at P1 height) is lower than a height of any range of the second portion (514/516 at P2 height),
the interlayer-insulating layer (514/516) defines a contact hole (hole containing 120b) therein, and
the contact hole is disposed in the first portion of the interlayer-insulating layer (hole containing 120b is disposed in 514/516 at P1),
the interlayer-insulating layer (514/516) includes a first layer (516) and a second layer (514) disposed on the first layer (as shown in Fig. 5, commensurate in scope with Applicant’s definition of “disposed on” provided in the specification at [0043]), and
a portion of the upper surface of the second portion of the interlayer-insulating layer (top of P2 of 514/516) is defined by an upper surface of the first layer (top of 516) (as shown in annotated Fig. 5),
wherein the first portion (1P) and the second portion (2P) are defined on the upper surface of the interlayer-insulating layer (1P and 2P are both defined on an upper surface of 514/516 as shown in annotated Fig. 5).
Regarding Claim 2, Chang discloses the display device of claim 1, wherein the first portion (1P) of the interlayer-insulating layer (514/516) overlaps the first signal line (126b) and the second signal line (120b) in a plan view (they overlap in cross sectional view and therefore also in plan view), and the contact hole of the interlayer-insulating layer exposes a portion of the first signal line (126b) (as shown in Fig. 5).
Regarding Claim 3, Chang discloses the display device of claim 2, wherein the first portion (1P) and the second portion (2P) have been planarized so that their respective upper surfaces are flat and coplanar (as shown in Fig. 5) (wherein this is a product-by-process limitation per MPEP 2113; therefore the respective upper surfaces being flat and coplanar satisfy this limitation).
Allowable Subject Matter
Claims 9-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding Claim 9, Chang discloses the display device of claim 1.
However, the references of the Prior Art of record and considered pertinent to the applicant's disclosure and to the Examiner’s knowledge does not teach or render obvious, at least to the skilled artisan, all the limitations of the instant invention in their entirety (the individual limitations may be found just not in combination with proper motivation); further comprising:
a first capacitor electrode and a second capacitor electrode overlapping each other in a plan view with the interlayer-insulating layer therebetween, and the first capacitor electrode and the second capacitor electrode overlap the first portion of the interlayer-insulating layer in the plan view.
For at least this reason, claims 10-11 would also be allowable based on their dependency from claim 9 should all presently-considered limitations be included in independent form.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NATHAN PRIDEMORE whose telephone number is (703)756-4640. The examiner can normally be reached Monday - Friday 8:00am - 4:00pm EST.
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NATHAN PRIDEMORE
Examiner
Art Unit 2898
/NATHAN PRIDEMORE/Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898