DETAILED ACTION/EXAMINER’S COMMENT
This Office action responds to the amendments filed on 04/01/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Amendment Status
Applicant’s response filed on 04/01/2026 in reply to the final rejection mailed on 02/05/2026, has been entered. The present Office action is made with all previously suggested amendments being fully considered. Accordingly, pending in this Office action are claims 1-4, 6-14, 21-25, 27, & 28.
Claim Objections
Claim 1 is objected to because of the following informalities: “the capping layer is not is physical contact…” in line 13. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 1 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
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The limitation “wherein the capping layer is not in physical contact with the first epitaxy layer” is not shown in Applicant’s specification. Applicant’s specification (see, e.g., para.0044) shows four epitaxy layers 77, 78, 79, & 81 and capping layer 75. Only epitaxy layer 77 maps to the limitation “first epitaxy layer” since the other limitation of Claim 1 states “and wherein the bottommost surface of the capping layer 75 is above a bottommost surface of the first epitaxy layer 77.” Capping layer 75 is in physical contact with the first epitaxy layer 77 as shown below.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 & 4 are rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 20210366786) in view of Tsai (US 20190165141) as evidenced by Sie (US 20210408266).
Regarding Claim 1, Chen shows a method for manufacturing a semiconductor device, comprising:
forming a first semiconductor fin 52 (see, e.g., fig. 2, following annotated figure, para.0019) on a substrate 50 (see, e.g., para.0019);
forming a source/drain region 70 (see, e.g., fig. 4a-b, para.0038) in the first semiconductor fin 56;
wherein the source/drain region comprises
a first epitaxy layer 70A in the first semiconductor fin,
and a second epitaxy layer 70B over the first epitaxy layer;
depositing a capping layer 74 (see, e.g., fig. 4b, para.0048) on the source/drain region 70;
wherein a topmost surface of the capping layer 74 is above topmost surfaces of the first epitaxy layer 70A and the second epitaxy layer 70B (see, e.g., following annotated figure),
wherein a bottommost surface of the capping layer 74 is below a bottommost surface of the second epitaxy layer 70B (see, e.g., following annotated figure),
and wherein the bottommost surface of the capping layer 74 is above a bottommost surface of the first epitaxy layer 70A (see, e.g., following annotated figure)
wherein the capping layer is not in physical contact with the first epitaxy layer (see, e.g., following annotated figure),
and wherein the capping layer is not is physical contact with the second epitaxy layer (see, e.g., following annotated figure);
depositing a dielectric layer 76 (see, e.g., para.0048) over the capping layer,
etching an opening 90 (see, e.g., fig. 10b, para.0061) through the capping layer 74 and the dielectric layer 76,
the opening exposing the source/drain region;
forming a silicide layer 96 (see, e.g., fig. 11b, para.0062) on the exposed source/drain region 70,
and forming a source/drain contact 98 (see, e.g., para.0062) on the silicide layer.
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Chen, however, fails to show
wherein the capping layer comprises a first boron concentration higher than a second boron concentration of the source/drain region.
wherein during the depositing of the dielectric layer, the capping layer is oxidized.
Tsai (see, e.g., para.0033, para.0038), in a similar method to Chen, teaches that a capping layer 110 including a boron concentration higher than the boron concentration of the source/drain region 109 would facilitate the dopant diffusion into the source/drain region to reduce contact resistance, increase carrier density and improve device performance.
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to use the capping layer of Tsai in the method of Chen, to reduce contact resistance, increase carrier density, and improve device performance.
Chen, in view of Tsai, however, fails to show
wherein during the depositing of the dielectric layer, the capping layer is oxidized.
Chen (see, e.g., para.0048), in view of Tsai, teaches the dielectric layer 76 can be deposited by Plasma Chemical Vapor Deposition (PCVD) over the capping layer 74, made of silicon nitride.
Sie (see, e.g., figs. 10a-d, para.0030), in a similar method to Lu, in view of Tsai, shows that during PECVD of a dielectric layer 81 over a capping layer 80, made of silicon nitride, the capping layer would be oxidized as a result of the precursor gas flowing onto the capping layer.
It would be obvious one of ordinary skill in the art to observe the limitation, wherein during the depositing of the dielectric layer, the capping layer is oxidized, in the method of Chen, in view of Tsai, as evidenced by Sie.
Regarding Claim 4, Chen, in view of Tsai and further in view of Sie, shows the method of claim 1, further comprising:
forming a second semiconductor fin 52 (left side, see, e.g., following annotated figure) on the substrate 20,
the first semiconductor fin being adjacent to the first semiconductor fin;
forming a second source/drain region 70 (left side) in the second semiconductor fin,
wherein the source/drain region and the second source/drain region are merged (see, e.g., following annotated figure);
depositing the capping layer 74 on the second source/drain region.
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Claims 2 & 27 are rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 20210366786) in view of Tsai (US 20190165141) & Sie (US 20210408266) and further in view of Lin (US 20190103309).
Regarding Claim 2, Chen, in view of Tsai & Sie, shows the method of claim 1,
Chen, in view of Tsai & Sie, however, fails to show
wherein etching the opening through the capping layer comprises a dry etch process that includes using fluorine-comprising etchant.
Lin (see, e.g., fig. 9, para.0028), in a similar method to Chen, in view of Tsai & Sie, teaches wherein etching the opening 106 through the capping layer 102 comprises a dry etch process that includes using fluorine-comprising etchant (dry etch with CH3F). The dry etching process of Lin is incorporated into Chen, in view of Tsai & Sie.
It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to use the etching process of Lin in Chen, in view of Tsai & Sie, because the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known etching method material for another.
Regarding Claim 27, Chen, in view of Tsai & Sie, shows the method of claim 1,
Chen, in view of Tsai & Sie, however, fails to show,
wherein the dielectric layer comprises silicon oxide
Lin (see, e.g., fig. 10, para.0031), in a similar method to Chen, in view of Tsai & Sie, teaches the dielectric layer surrounding a contact opening for a source/drain region comprises silicon oxide. The silicon oxide material as taught by Lin is incorporated as the dielectric layer of Chen, in view of Tsai & Sie.
It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to use the material of Lin in Chen, in view of Tsai & Sie, because the combination is simple substitution of one known element for another to obtain predictable results – simple substitution of one known dielectric layer material for another.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 20210366786) in view of Tsai (US 20190165141) & Sie (US 20210408266) and further in view of More (US 20220367649).
Regarding Claim 3, Chen, in view of Tsai (see, e.g., para.0033, para.0035, para.0038) & Sie, shows the method of claim 1,
wherein the second boron concentration is in a range from 1 x 1020/cm3 to about 2 x 1021/cm3.
Tsai (see, e.g., para.0035), shows a second boron concentration of the source/drain region 109 is in a range from 1 x 1020/cm3 to about 2 x 1021/cm3.
Chen, in view of Tsai & Sie, however, fails to show
wherein the first boron concentration is in a range from 3 x 1021/cm3 to 1 x 1022/cm3.
However, ranges of boron concentration will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such ranges are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation” In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
More (see, e.g., fig. 8a, para.0038), in a similar method to Chen, in view of Tsai & Sie, shows a first boron concentration of the capping layer between 5×1020/cm3 to about 2×1021/cm3. Since the applicant has not established the criticality of the claimed range, and similar ranges have been used in the art, it would have been obvious to one of ordinary skill in the art to use boron concentration range of the capping layer of More in the method of Chen, in view of Tsai & Sie, as an obvious concentration range.
Criticality
The specification contains no disclosure of either the critical nature of the claimed temperature and pressure ranges or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 20210366786) in view Tsai (US 20190165141) & Sie (US 20210408266) and further in view of More (US 20220367649) and Arst (US 5110757).
Regarding Claim 6, Chen, in view of Tsai & Sie, shows the method of claim 1,
Chen, in view of Tsai & Sie, however, fails to teach
wherein depositing the capping layer comprises depositing the capping layer at a process temperature in a range from 500°C to 700°C and at a process pressure in a range from 20 torr to 60 torr.
However, ranges of capping layer deposition temperature and pressure will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such ranges are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation” In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
More (see, e.g., fig. 9, para.0050, para.0052, para.0054), in a similar method to Chen, in view of Tsai & Sie, shows when depositing the capping layer comprises depositing the capping layer at least a temperature above 550°C. Arst (see, e.g., pg. 6, col. 3, ll. 47-48), in a similar method to Chen, in view of Tsai & Sie, shows when depositing the capping layer comprises depositing the capping layer at a process pressure in a range from 0 to 50 torr.
Since the applicant has not established the criticality of the claimed range, and similar ranges have been used in the art, it would have been obvious to one of ordinary skill in the art to use deposition temperature of the capping layer of More and the deposition pressure of Arst in the method of Chen, in view of Tsai & Sie, as an obvious deposition temperature and pressure. See paragraph 34 for criticality statement.
Claims 7, 8, 9, 10, 11, 14, & 28 are rejected under 35 U.S.C. 103 as being unpatentable over Lin (US 20190103309) in view of Arst (US 5110757) & Tsai (US 20190165141) and further in view of Li (US 10269648).
Regarding Claim 7, Lin (see, e.g., figs. 7, 8, & 10) shows a method for manufacturing a semiconductor device, comprising:
forming a first semiconductor fin 56 on a substrate 20
forming a source/drain region 72 in the first semiconductor fin, the source/drain region being adjacent to a channel region of the first semiconductor fin (portion of 56, see, e.g., fig. 7, para.0036);
depositing a capping layer 102 on the source/drain region 72,
depositing a contact etch stop layer (CESL) 81 on the source/drain region;
forming an inter-layer dielectric (ILD) 82 on the CESL;
performing an etching process to form a contact opening 106 that extends through the ILD 82, the CESL 81, and the capping layer 102,
wherein the contact opening exposes the source/drain region (see, e.g., para.0035);
a first sidewall 104a of the source/drain region and a second sidewall 104d of the source/drain region (see, e.g., fig. 9, para.0030)
wherein after performing the etching process, a third thickness of the capping layer 102 near 104a (30 Å) on the first sidewall of the source/drain region is larger than a fourth thickness of the capping layer 102 near 104e (20 Å) on the second sidewall of the source/drain region (see, e.g., para.0030)
wherein the first sidewall 104a is above the second sidewall 104d (see, e.g., fig. 10);
and forming a source/drain contact 88 in the contact opening.
Lin, however, fails to show
wherein during the depositing of the capping layer, an etchant is supplied along with process reactants that are used to deposit the capping layer
wherein after depositing the capping layer, a concentration of diffused boron atoms in the channel region is in a range from 1 x 1015/cm3 to 1 x 1018/cm3,
wherein the diffused boron atoms comprise boron atoms that have diffused from the capping layer to the channel region
wherein before performing the etching process, a first thickness of the capping layer on the first sidewall of the source/drain region is larger than a second thickness of the capping layer on the second sidewall of the source/drain region
Arst (see, e.g., col. 3, lines 60-62), in a similar method to Lin, teaches that supplying an etchant, hydrochloric acid, during the depositing of the capping layer would control the defect silicon growth rate during deposition.
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to use the step of supplying an etchant, hydrochloric acid, during the depositing of the capping layer in the method of Arst in the method of Lin to control the defect silicon growth rate during deposition.
Lin, in view of Arst, however, fails to explicitly state
wherein after depositing the capping layer, a concentration of diffused boron atoms in the channel region is in a range from 1 x 1015/cm3 to 1 x 1018/cm3,
wherein the diffused boron atoms comprise boron atoms that have diffused from the capping layer to the channel region
wherein before performing the etching process, a first thickness of the capping layer on the first sidewall of the source/drain region is larger than a second thickness of the capping layer on the second sidewall of the source/drain region
Tsai (see, e.g., fig. 13c, para.0033, para.0035), in a similar method to Lin, in view of Arst, teaches the capping layer 110 acting as a dopant diffusion source for the source/drain region would provide increased carrier density and reduce contact resistance.
It would be obvious to one of ordinary skill in the art to use the capping layer of Tsai, in the method of Lin, in view of Arst, acting as a dopant diffusion source for the source/drain region to provide increased carrier density and reduce contact resistance.
Further, Tsai states the source/drain region would receive a concentration of 1 x 1017/cm3 to 1 x 1022/cm3 overlapping with the claimed concentration range. Thus, when depositing the capping layer of Tsai, in the method of Lin, in view of Arst, it would diffuse its boron atom concentration into the source/drain region and by virtue the channel region since the two regions are merged, Lin (see, e.g., para.0026).
Lin (see, e.g., fig. 8, para.0027), in view of Arst & Tsai, states the capping layer 102 is formed before the etching process to a thickness between 10 Å and about 50 Å.
However, Lin, in view of Arst & Tsai, fails to show,
wherein before performing the etching process, a first thickness of the capping layer on the first sidewall of the source/drain region is larger than a second thickness of the capping layer on the second sidewall of the source/drain region
Li (see, e.g., fig. 2g, pg. 18, col. 7, ll. 13-18), in a similar method to Lin, in view of Arst & Tsai, teaches a configuration:
wherein before performing the etching process, a first thickness T1 (15 Å) of the capping layer on a first sidewall S1 of the source/drain region 164 of 160a is larger than a second thickness T3 (10Å, equivalent to thickness T2) of the capping layer on a second sidewall S3 of the source/drain region 164 of 160a
Li (see, e.g., pg. 19, col. 9, ll. 17-26) states the first thickness T1 larger than the second thickness T3 (equivalent to thickness T2) would decrease the loss of the source/drain region when performing the etching process and therefore improve the performance of the semiconductor device.
It would have been obvious to one of ordinary skill in the art to use configuration of Li, in the method of Lin, in view of Arst & Tsai, decrease the loss of the source/drain region when performing the etching process and therefore improve the performance of the semiconductor device.
Regarding Claim 8, Lin (see. e.g., para.0035), in view of Arst & Tsai and further in view of Li, shows the method of claim 7, further comprising:
forming a metal layer on the exposed source/drain region;
annealing the metal layer to form a silicide layer (silicide not shown, see, e.g., para.0035)
Regarding Claim 9, Lin (see, e.g., fig. 10), in view of Arst & Tsai and further in view of Li, shows the method of claim 7
wherein the first sidewall 102 near 104a of the source/drain region is above outermost points of the capping layer, and the second sidewall 102 near 104d of the source/drain region is below the outermost points of the capping layer
Regarding Claim 10, Lin (see, e.g., para.0030), in view of Arst & Tsai and further in view of Li, shows the method of claim 9
wherein the first thickness of the capping layer 102 near 104a is in a range from 0.5 nm to 2 nm, and the second thickness 102 near 104d of the capping layer is up to 2 nm.
Lin (see, e.g., fig. 10, para.0030) states the first sidewall 102 near 104a thickness may be 10-20 Å and the second sidewall 102 near 104d thickness may be 20 Å.
Regarding Claim 11, Lin (see, e.g., fig. 7), in view of Arst & Tsai (see, e.g., para.0032, para.0033, para.0038) and further in view of Li, shows the method of claim 7
wherein the process reactants that are used to deposit the capping layer comprise borane, diborane, or boron trichloride.
Regarding Claim 14, Lin (see, e.g., para.0028), in view of Arst & Tsai and further in view of Li, shows the method of claim 7
wherein performing the etching process to form the contact opening comprises performing a fluorine-based plasma etch process
Regarding Claim 28, Lin, in view of Arst (see, e.g., col.3, lines 60-62) & Tsai and further in view of Li, shows the method of claim 7,
wherein the etchant comprises hydrochloric acid.
Claims 12 & 13 are rejected under 35 U.S.C. 103 as being unpatentable over Lin (US 20190103309) in view of Arst (US 5110757), Tsai (US 20190165141), Li (US 10269648) and further in view of More (US 20220367649).
Regarding Claim 12, Lin, in view of Arst, Tsai, & Li, shows the method of claim 7
Tsai (see, e.g., para.0035), shows a second boron concentration of the source/drain region 109 is in a range from 1 x 1020/cm3 to about 2 x 1021/cm3.
Lin, in view of Arst, Tsai, & Li, however, fails to show
wherein the first boron concentration is in a range from 3 x 1021/cm3 to 1 x 1022/cm3.
More (see, e.g., fig. 8a, para.0038), in a similar method to Lin, in view of Arst, Tsai, & Li, shows a first boron concentration of the capping layer between 5×1020/cm3 to about 2×1021/cm3. Since the applicant has not established the criticality of the claimed range, and similar ranges have been used in the art, it would have been obvious to one of ordinary skill in the art to use boron concentration range of the capping layer of More in the method of Lin, Arst, Tsai, & Li, as an obvious concentration range. See paragraph 34 for criticality statement.
Regarding Claim 13, Lin, in view of Arst and Tsai, shows the method of claim 7
Lin, in view of Arst and further in view of Tsai, however, fails to show
wherein a width between outermost points of the capping layer is in a range from 40 nm to 70 nm.
However, a range of width will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such ranges are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation” In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
More (see, e.g., fig. 1b, para.0041), in a similar method to Lin, in view of Arst, Tsai, & Li, shows wherein a width W124 between outermost points of the capping layer is between 40 nm to 60 nm since it is ratio of 1-1.5 to width W150 of 40 nm. Since the applicant has not established the criticality of the claimed range, and similar ranges have been used in the art, it would have been obvious to one of ordinary skill in the art to use width of the capping layer of More in the method of Lin, in view of Arst, Tsai, & Li, as an obvious capping layer width. See paragraph 34 for criticality statement.
Claims 21 & 22 are rejected under 35 U.S.C. 103 as being unpatentable over Lu (US 20180190653) in view of Tsai (US 20190165141) as evidenced by Sie (US 20210408266).
Regarding Claim 21, Lu shows a method comprising:
forming a first semiconductor fin 10 (see, e.g., fig. 2a, following annotated figure, para.0031) on a substrate 5 (see, e.g., para.0031);
forming a source/drain region 20 (see, e.g., para.0037) in the first semiconductor fin,
the source/drain region being adjacent to a channel region 14 (see, e.g., para.0031) of the first semiconductor fin;
forming a capping layer 24 (see, e.g., para.0038) on the source/drain region,
depositing an inter-layer dielectric (ILD) 70 (see, e.g., para.0032) over the capping layer,
forming an opening 102 (see, e.g., figs. 4b-c, para.0054, para.0058) through the capping layer and the ILD,
wherein the opening exposes surfaces of the source/drain region (see, e.g., figs. 4b-c);
forming a silicide layer 55 (see, e.g., fig. 2b, para.0040) on the exposed source/drain region 20, and on a first portion of the capping layer 94 (see, e.g., following annotated figure),
wherein the silicide layer overlaps the first portion of the capping layer (see, e.g., following annotated figure);
and forming a source/drain contact 60 (comprised of elements 62 & 64, see, e.g., para.0041) on the silicide layer,
wherein a bottommost point of the silicide layer 55 is below a topmost point of the channel region 14 (see, e.g., following annotated figure)
and wherein the first portion of the capping layer 24 is disposed below the topmost point of the channel region 14 (see, e.g., following annotated figure)
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Lu, however, fails to show
wherein a first boron concentration of the capping layer is greater than a second boron concentration of the source/drain region.
wherein during depositing the ILD over the capping layer, the capping layer is oxidized.
Tsai (see, e.g., fig. 13c, para.0033, para.0038), in a similar method to Lu, teaches that a capping layer 110 including a boron concentration higher than the boron concentration of the source/drain region 109 would facilitate the dopant diffusion into the source/drain region to reduce contact resistance, increase carrier density and improve device performance.
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to use the capping layer of Tsai in the method of Lu to reduce contact resistance, increase carrier density, and improve device performance.
Lu, in view of Tsai, however, fails to show
wherein during depositing the ILD over the capping layer, the capping layer is oxidized.
Lu (see, e.g., para.0032, para.0038), in view of Tsai, teaches ILD 70, made of silicon oxide, can be deposited by Plasma Chemical Vapor Deposition (PCVD) over the capping layer 24, made of silicon nitride.
Sie (see, e.g., figs. 10a-d, para.0030), in a similar method to Lu, in view of Tsai, shows that during PECVD of a dielectric layer 81, made of silicon oxide, over a capping layer 80, made of silicon nitride, the capping layer would be oxidized as a result of the precursor gas flowing onto the capping layer.
It would be obvious one of ordinary skill in the art to observe the limitation, wherein during depositing the ILD over the capping layer, the capping layer is oxidized, in the method of Lu, in view of Tsai, as evidenced by Sie.
Regarding Claim 22, Lu, in view of Tsai (see. e.g., para.0033), and further in view of Sie, shows the method of claim 21
wherein the capping layer comprises crystalline boron
Claims 23 & 24 are rejected under 35 U.S.C. 103 as being unpatentable over Lu (US 20220246479) in view of Tsai (US 20190165141) & Sie (US 20210408266), and further in view of More (US 20220367649).
Regarding Claim 23, Lu, in view of Tsai & Sie, shows the method of claim 21
wherein the second boron concentration is in a range from 1 x 1020/cm3 to about 2 x 1021/cm3.
Tsai (see, e.g., para.0035), shows a second boron concentration of the source/drain region 109 is in a range from 1 x 1020/cm3 to about 2 x 1021/cm3.
Lu, in view of Tsai & Sie, however, fails to show
wherein the first boron concentration is in a range from 3 x 1021/cm3 to 1 x 1022/cm3.
However, ranges of boron concentration will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such ranges are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation” In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
More (see, e.g., fig. 8a, para.0038), in a similar method to Lu, in view of Tsai & Sie, shows a first boron concentration of the capping layer between 5×1020/cm3 to about 2×1021/cm3. Since the applicant has not established the criticality of the claimed range, and similar ranges have been used in the art, it would have been obvious to one of ordinary skill in the art to use boron concentration range of the capping layer of More in the method of Lu, in view of Tsai & Sie, as an obvious concentration range. See paragraph 34 for criticality statement.
Regarding Claim 24, Lu, in view of Tsai & Sie, shows the method of claim 21
Lu, in view of Tsai & Sie, however, fails to teach
wherein a width between outermost points of the capping layer is in a range from 40 nm to 70 nm.
However, a range of width will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such ranges are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation” In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955). More (see, e.g., fig. 1b, para.0041), in a similar method to Lu, in view of Tsai & Sie, shows wherein a width W124 between outermost points of the capping layer is between 40 nm to 60 nm since it is ratio of 1-1.5 to width W150 of 40 nm. Since the applicant has not established the criticality of the claimed range, and similar ranges have been used in the art, it would have been obvious to one of ordinary skill in the art to use width of the capping layer of More in the method of Lu, in view of Tsai & Sie, as an obvious capping layer width. See paragraph 34 for criticality statement.
Claim 25 is rejected under 35 U.S.C. 103 as being unpatentable over Lu (US 20220246479) in view of Tsai (US 20190165141), Sie (US 20210408266), & More (US 20220367649), and further in view of Li (US 10269648).
Regarding Claim 25, Lu, in view of Tsai, Sie, & More, shows the method of claim 24
Lu, in view of Tsai, Sie, & More, however, fails to show,
wherein a second portion of the capping layer has a first thickness that is greater than a second thickness of a third portion of the capping layer,
wherein the second portion of the capping layer is disposed above the outermost points of the capping layer,
and the third portion of the capping layer is disposed below the outermost points of the capping layer.
Li (see, e.g., fig. 2g, pg. 18, col. 7, ll. 13-18), in a similar method to Lu, in view of Tsai, Sie, & More, teaches a configuration:
wherein a second portion of the capping layer 170 near S1 has a first thickness T1 (15 Å) that is greater than a second thickness T3 (10 Å) of a third portion of the capping layer 170 near S3,
wherein the second portion of the capping layer is disposed above the outermost points of the capping layer (see, e.g., fig. 2g),
and the third portion of the capping layer is disposed below the outermost points of the capping layer (see, e.g., fig. 2g).
Li (see, e.g., pg. 19, col. 9, ll. 17-26) states the first thickness T1 larger than the second thickness T3 (equivalent to thickness T2) would decrease the loss of the source/drain region when performing the etching process and therefore improve the performance of the semiconductor device.
It would have been obvious to one of ordinary skill in the art to use configuration of Li, in the method of Lu, in view of Tsai, Sie, & More, decrease the loss of the source/drain region when performing the etching process and therefore improve the performance of the semiconductor device.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-4, 6-14, 21-25, 27, & 28 have been considered but are moot because the new ground of rejection does not rely on the same combination of references applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
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/FERNANDO JOSE RAMOS-DIAZ/ Examiner, Art Unit 2818
/SAMUEL PARK/Examiner, Art Unit 2818
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