DETAILED ACTION
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 11/24/2025 has been entered.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-2, 9-11, 14-16, 21 and 23-24 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Xie et al. (US 2021/0375685; herein “Xie”).
Regarding claim 1, Xie teaches in Fig. 13 and related text a semiconductor device, comprising:
a plurality of nanostructure channels (114/116/118, see [0036]) over a semiconductor substrate (102),
wherein the plurality of nanostructure channels are arranged along a direction perpendicular to the semiconductor substrate;
a mesa region (region of 102 below 114) below the plurality of nanostructure channels;
a buffer region (see annotated Fig. 13 below for one example interpretation of “buffer region”) adjacent to the mesa region,
wherein the buffer region comprises:
an undoped semiconductor layer (902b, see [0055]-[0056]) on a portion of the semiconductor substrate;
a first doped semiconductor layer (first layer of 1204/1304 of buffer region, see [0061] and [0057]; note that “layer is interpreted as “a thickness of some material”) on the undoped semiconductor layer; and
a second doped semiconductor layer (second layer of 1204/1304 of buffer region, see [0061] and [0057]) on the first doped semiconductor layer;
a source/drain region (1204/1302 above buffer region, see annotated Fig. 13) above the buffer region and adjacent to the plurality of nanostructure channels;
a dielectric region (1212, see [0065]) between the buffer region and the source/drain region;
wherein one or more of the plurality of nanostructure channels overlap an end portion of the dielectric region (e.g. in at least one direction, see Fig. 13);
and
a sidewall layer (402) between the buffer region and the mesa region.
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Regarding claim 2, Xie further discloses wherein the dielectric region (1212) is above the buffer region (e.g. above upper slanted surface of buffer region), and wherein a top surface of the dielectric region extends above a top surface of the mesa region (see Fig. 13).
Regarding claim 24, Xie further discloses wherein the undoped semiconductor layer (902b) contacts (e.g. at least thermally) the portion of the semiconductor substrate.
Regarding claim 9, Xie teaches in Fig. 13 and related text a semiconductor device, comprising:
a plurality of nanostructure channels (114/116/118, see [0036]) over a semiconductor substrate (102),
wherein the plurality of nanostructure channels are arranged along a direction perpendicular to the semiconductor substrate;
a mesa region (region of 102 below 114) below the plurality of nanostructure channels;
a buffer region (see annotated Fig. 13 above for one example interpretation of “buffer region”) adjacent to the mesa region,
wherein the buffer region comprises:
an undoped semiconductor layer (902b, see [0055]-[0056]) on a portion of the semiconductor substrate;
a first doped semiconductor layer (first layer of 1204/1302 of buffer region, see [0061] and [0057]; note that “layer is interpreted as “a thickness of some material”) on the undoped semiconductor layer; and
a second doped semiconductor layer (second layer of 1204/1302 of buffer region, see [0061] and [0057]) on the first doped semiconductor layer;
a source/drain region (1204/1304 above buffer region, see annotated Fig. 13) above the buffer region and adjacent to the plurality of nanostructure channels; and
a dielectric region (1212, see [0065]), including a gas, between a top surface of the buffer region (e.g. upper slanted surface of buffer region) and a bottom surface of the source/drain region (e.g. bottom slanted surface of S/D part of 1204/1304),
wherein one or more of the plurality of nanostructure channels overlap an end portion of the dielectric region (e.g. in at least one direction, see Fig. 13).
Regarding claim 10, Xie further discloses wherein a bottom surface of the dielectric region extends below a top surface of the mesa region (in the interpretation where the mesa region further includes region of 122/202 below 114 in addition to 102 below 114).
Regarding claim 11, Xie further discloses wherein the undoped semiconductor layer comprises a first epitaxial layer, wherein the first doped semiconductor layer comprises a first portion of a second epitaxial layer, and wherein the second doped semiconductor layer comprises a first portion of a third epitaxial layer (see [0055] and [0029]).
Note that the limitation “epitaxial” claims recites a process, however the claim is directed to a product. Therefore, this limitation is considered to be product by process limitations. "Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process." In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). See MPEP 2113.
Regarding claims 14 and 15, Xie further discloses wherein the source/drain region comprises: a second portion of the second epitaxial layer over inner spacers; and a second portion of the third epitaxial layer adjacent to the second portion of the second epitaxial layer along a direction parallel to the semiconductor substrate;
wherein the bottom surface of the source/drain region comprises a bottom surface of the second portion of the second epitaxial layer and a bottom surface of the second portion of the third epitaxial layer (see annotated Fig. 11 below for an example interpretation of first and second epitaxial layer which have portions in the source/drain region as claimed).
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Regarding claim 16, Xie further discloses wherein the first doped semiconductor layer (902B) comprises a portion of a first epitaxial layer, and wherein the second doped semiconductor layer (second layer of 1204/1304) comprises a portion of a second epitaxial layer over the portion of the first epitaxial layer (see [0055] and [0029]).
Regarding claim 21, Xie teaches in Fig. 13 and related text a semiconductor device, comprising:
a fin structure comprising a plurality of nanostructure channels (structure including 114/116/118, see [0036]);
a mesa region (region of 122/202/102 below 114) below the fin structure,
wherein a recess extends through the fin structure and the mesa region;
sidewall layers (e.g. 402 and lowermost 602A) in a first portion of the recess, wherein the first portion of the recess is in the mesa region;
a buffer region (see annotated Fig. 13 above for one example interpretation of “buffer region”) in the first portion of the recess and between the sidewall layers,
wherein the buffer region comprises:
an undoped semiconductor layer (902b, see [0055]-[0056]) on a portion of the semiconductor substrate;
a first doped semiconductor layer (first layer of 1204/1302 of buffer region, see [0061] and [0057]; note that “layer is interpreted as “a thickness of some material”) on the undoped semiconductor layer; and
a second doped semiconductor layer (second layer of 1204/1302 of buffer region, see [0061] and [0057]) on the first doped semiconductor layer;
a source/drain region (1204/1304 above buffer region, see annotated Fig. 13) in a second portion of the recess,
wherein the second portion of the recess is above the first portion of the recess; and
a dielectric region (1212, see [0065]) between a top surface of the buffer region (e.g. upper slanted surface of buffer region) and a bottom surface of the source/drain region (e.g. bottom slanted surface of S/D part of 1204/1304),
wherein one or more of the plurality of nanostructure channels overlap an end portion of the dielectric region (e.g. in at least one direction, see Fig. 13).
Regarding claim 23, Xie further discloses the dielectric region (1212) includes a gas (see [0065]).
Claim Rejections - 35 USC § 102/ 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 4-8, 12, and 17 is/are rejected under 35 U.S.C. 102(a)(1) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Xie.
Regarding claim 4, Xie further discloses wherein the plurality of nanostructure channels are included in a fin structure, and wherein a height of the fin structure above a bottom surface of a bottom-most inner spacer, of a plurality of inner spacers (602A/B, see [0051]) included in the fin structure, is included in a range of approximately 30 nanometers to approximately 80 nanometers (note that “approximately” is interpreted with its broadest reasonable interpretation).
In the alternative, one of ordinary skill in the art before the effective filing date of the claimed invention would have recognized the height of the fin structure to be a result effective variable affecting the electrical characteristics of the channels, the capacity of the device based on number of channels, and the overall size of the device. Thus, it would have been obvious to modify the device of Xie to have the height within the claimed range in order to achieve desired characteristics, and since optimum or workable ranges of such variables are discoverable through routine experimentation. see MPEP 2144.05 II.B and 2143. Furthermore, it has also been held that the applicant must show that a particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936, (Fed. Cir. 1990). Note that the law is replete with cases in which when the mere difference between the claimed invention and the prior art is some dimensional limitation or other variable within the claims, patentability cannot be found. The instant disclosure does not set forth evidence ascribing unexpected results due to the claimed dimensions. See Gardner v. TEC Systems, Inc., 725 F.2d 1338 (Fed. Cir. 1984), which held that the dimensional limitations failed to point out a feature which performed and operated any differently from the prior art.
Regarding claim 5, Xie further discloses wherein the source/drain region comprises:
a portion of an epitaxial layer (a portion of 1204/1304, see [0029]) adjacent to the fin structure and over the plurality of inner spacers included in the fin structure,
wherein the portion of the epitaxial layer is continuous across the plurality of inner spacers (602A/B).
Note that the limitation “epitaxial” claims recites a process, however the claim is directed to a product. Therefore, this limitation is considered to be product by process limitations. "Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process." In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). See MPEP 2113.
Regarding claim 6, Xie further discloses wherein the portion of the epitaxial layer comprises a width included in a range of approximately 5 nanometers to approximately 10 nanometers (note that can choose a portion of 1204/1304 such that the claimed limitation is met; further note that “approximately” is interpreted with its broadest reasonable interpretation).
Regarding claim 7, Xie further discloses wherein a ratio of the width of the portion of the epitaxial layer to a width of the source/drain region is included in in a range of approximately 1:10 to approximately 2:5 (note that can choose a portion of 1204/1304 such that the claimed limitation is met; further note that “approximately” is interpreted with its broadest reasonable interpretation).
Regarding claim 8, Xie further discloses wherein the portion of the epitaxial layer corresponds to a portion of a first epitaxial layer, and
wherein the source/drain region further comprises: a portion of a second epitaxial layer (e.g. upper and lower portions of 1204/1304 as the first and second epitaxial layers) adjacent to the portion of the first epitaxial layer.
Note that the limitation “epitaxial” claims recites a process, however the claim is directed to a product. Therefore, this limitation is considered to be product by process limitations. "Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process." In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). See MPEP 2113.
Regarding claim 12, Xie further discloses wherein a thickness of the dielectric region is included in a range of approximately 3 nanometers to approximately 10 nanometers (note that can choose a portion of 1212 such that the claimed limitation is met; further note that “approximately” is interpreted with its broadest reasonable interpretation).
In the alternative, one of ordinary skill in the art before the effective filing date of the claimed invention would have recognized the thickness of the dielectric region to be a result effective variable affecting the electrical characteristics such as the nature of parasitic devices formed. Thus, it would have been obvious to modify the device of Xie to have the thickness within the claimed range in order to achieve desired characteristics, and since optimum or workable ranges of such variables are discoverable through routine experimentation. see MPEP 2144.05 II.B and 2143. Furthermore, it has also been held that the applicant must show that a particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936, (Fed. Cir. 1990). Note that the law is replete with cases in which when the mere difference between the claimed invention and the prior art is some dimensional limitation or other variable within the claims, patentability cannot be found. The instant disclosure does not set forth evidence ascribing unexpected results due to the claimed dimensions. See Gardner v. TEC Systems, Inc., 725 F.2d 1338 (Fed. Cir. 1984), which held that the dimensional limitations failed to point out a feature which performed and operated any differently from the prior art.
Regarding claim 17, Xie further discloses wherein a thickness of the dielectric region (1212) is included in a range of approximately 5 nanometers to approximately 30 nanometers (note that can choose a portion of 1212 such that the claimed limitation is met; further note that “approximately” is interpreted with its broadest reasonable interpretation).
In the alternative, one of ordinary skill in the art before the effective filing date of the claimed invention would have recognized the thickness of the dielectric region to be a result effective variable affecting the electrical characteristics such as the nature of parasitic devices formed. Thus, it would have been obvious to modify the device of Xie to have the thickness within the claimed range in order to achieve desired characteristics, and since optimum or workable ranges of such variables are discoverable through routine experimentation. see MPEP 2144.05 II.B and 2143. Furthermore, it has also been held that the applicant must show that a particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936, (Fed. Cir. 1990). Note that the law is replete with cases in which when the mere difference between the claimed invention and the prior art is some dimensional limitation or other variable within the claims, patentability cannot be found. The instant disclosure does not set forth evidence ascribing unexpected results due to the claimed dimensions. See Gardner v. TEC Systems, Inc., 725 F.2d 1338 (Fed. Cir. 1984), which held that the dimensional limitations failed to point out a feature which performed and operated any differently from the prior art.
Claim(s) 3 is/are rejected under 35 U.S.C. 103 as obvious over Xie, as applied to claim 1 above, and in view of Song et al. (US 2020/0381547; herein “Song”).
Regarding claim 3, Xie does not disclose wherein a depth of the sidewall layer below a top-most portion of a shallow trench isolation region adjacent to the buffer region is included in a range of approximately 2 nanometers to approximately 20 nanometers.
In the same field of endeavor, Song discloses a semiconductor device comprising a shallow trench isolation region (see [0031]), wherein a top-most portion of a shallow trench isolation region adjacent to the buffer region is at a same height as a top most portion of the mesa region.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Xie by having a shallow trench isolation region with a top-most portion of the shallow trench isolation region adjacent to the buffer region at a same height as a top most portion of the mesa region, as shown by Song, in order to provide proper isolation between active regions of the device.
The limitation “a depth of the sidewall layer below a top-most portion of a shallow trench isolation region adjacent to the buffer region is included in a range of approximately 2 nanometers to approximately 20 nanometers” is therefor taught by the combination of a depth of the sidewall layer below a top-most portion of the mesa region is included in a range of approximately 2 nanometers to approximately 20 nanometers, as shown by Xie (note that can choose a portion of the mesa region such that the claimed limitation is met; further note that “approximately” is interpreted with its broadest reasonable interpretation), and the shallow trench isolation region having a top-most portion at a same height as a top most portion of the mesa region, as shown by Song.
Additionally, one of ordinary skill in the art before the effective filing date of the claimed invention would have recognized the thickness of the depth to be a result effective variable affecting the electrical characteristics such as the nature of parasitic devices formed. Thus, it would have been obvious to modify the device of Xie to have the depth within the claimed range in order to achieve desired characteristics, and since optimum or workable ranges of such variables are discoverable through routine experimentation. see MPEP 2144.05 II.B and 2143. Furthermore, it has also been held that the applicant must show that a particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936, (Fed. Cir. 1990). Note that the law is replete with cases in which when the mere difference between the claimed invention and the prior art is some dimensional limitation or other variable within the claims, patentability cannot be found. The instant disclosure does not set forth evidence ascribing unexpected results due to the claimed dimensions. See Gardner v. TEC Systems, Inc., 725 F.2d 1338 (Fed. Cir. 1984), which held that the dimensional limitations failed to point out a feature which performed and operated any differently from the prior art.
Claim(s) 13 is/are rejected under 35 U.S.C. 103 as obvious over Xie.
Regarding claim 13, Xie does not explicitly disclose further discloses wherein the first epitaxial layer (902B) comprises: a concave top surface, however it would have been an obvious matter of design choice to have the first epitaxial layer have a concave top surface, since such a modification would have involved a mere change in the shape of a component. A change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). See MPEP 2144.04
Additionally, the modified device of Xie would show a depth of the concave top surface is included in range of approximately 5 nanometers to approximately 20 nanometers (note that can choose a point from which the depth is measured such that the claimed limitation is met; further note that “approximately” is interpreted with its broadest reasonable interpretation).
In the alternative, one of ordinary skill in the art before the effective filing date of the claimed invention would have recognized the depth of the concave to be a result effective variable affecting the epitaxial growth of the subsequent layers. Thus, it would have been obvious to modify the device of Xie to have the depth within the claimed range in order to achieve desired growth characteristics, and since optimum or workable ranges of such variables are discoverable through routine experimentation. see MPEP 2144.05 II.B and 2143. Furthermore, it has also been held that the applicant must show that a particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936, (Fed. Cir. 1990). Note that the law is replete with cases in which when the mere difference between the claimed invention and the prior art is some dimensional limitation or other variable within the claims, patentability cannot be found. The instant disclosure does not set forth evidence ascribing unexpected results due to the claimed dimensions. See Gardner v. TEC Systems, Inc., 725 F.2d 1338 (Fed. Cir. 1984), which held that the dimensional limitations failed to point out a feature which performed and operated any differently from the prior art.
Response to Arguments
Applicant's arguments filed 11/24/2025 have been fully considered but are moot in view of the new grounds of rejection presented above. In particular, it is noted that “overlaps” has been given its broadest reasonable interpretation in accordance with MPEP 2111, and does not require any specific direction of overlap.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Lauren R Bell whose telephone number is (571)272-7199. The examiner can normally be reached M-F 8am-5pm.
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/LAUREN R BELL/Primary Examiner, Art Unit 2896 2/25/2026