Prosecution Insights
Last updated: April 19, 2026
Application No. 17/661,386

BACK SIDE POWER SUPPLY INTERCONNECT ROUTING

Final Rejection §102
Filed
Apr 29, 2022
Examiner
DIAZ, JOSE R
Art Unit
2815
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Ltd.
OA Round
2 (Final)
87%
Grant Probability
Favorable
3-4
OA Rounds
2y 6m
To Grant
94%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allow Rate
799 granted / 922 resolved
+18.7% vs TC avg
Moderate +8% lift
Without
With
+7.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
26 currently pending
Career history
948
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
39.3%
-0.7% vs TC avg
§102
36.3%
-3.7% vs TC avg
§112
7.8%
-32.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 922 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 21-25 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Mehandru et al. (US 2020/0303509). Regarding claim 21, Mehandru discloses a semiconductor structure, comprising: a transistor structure (1300/1200) comprising a source/drain (S/D) region (961) [Figs. 12A-13 and paragraphs 0074-0076]; a front side metal line (M1,1333/1320,1075) above the S/D region [Figs. 12A-12B, 13 (annotated below) and paragraphs 0074-0076]; a front side metal via (V1, 1333/1320,1071) in contact with a front surface of the S/D region and with the front side metal line (1333/1320,1075) [Figs. 12A-12B, 13 (annotated below) and paragraphs 0074-0076]; a back side metal line (M2,1334/1321) below the S/D region (961) [Figs. 12A-12B, 13 (annotated below) and paragraphs 0074-0076]; and a back side metal via (V2,1334/1321,1281) in contact with a back surface of the S/D region and with the back side metal line [Figs. 12A-12B, 13 (annotated below) and paragraphs 0074-0076]. [AltContent: textbox (M4)][AltContent: arrow][AltContent: textbox (M2)][AltContent: arrow][AltContent: textbox (V4)][AltContent: arrow][AltContent: textbox (V3)][AltContent: arrow][AltContent: textbox (V2)][AltContent: arrow][AltContent: textbox (M1)][AltContent: arrow][AltContent: textbox (V1)][AltContent: arrow] PNG media_image1.png 438 900 media_image1.png Greyscale Regarding claim 22, Mehandru discloses another transistor (1300/1200) comprising another S/D region (another region 961); and another back side metal via (V4) in contact with a back surface of the other S/D region [Figs. 12A-12B, 13 (annotated above) and paragraphs 0074-0076]. Regarding claim 23, Mehandru discloses another back side metal line (M4) below and in contact with the other back side metal via (V4), wherein the other back side metal line (M4) is at a same metallization level as the back side metal line (M2) [Figs. 12A-12B, 13 (annotated above) and paragraphs 0074-0076]. Regarding claim 24, Mehandru discloses another front side metal via (V3) electrically connected to the other S/D region (another region 961), wherein the front side metal via (V1) and the other front side metal via (V3) are electrically connected to the front side metal line (M1) [Figs. 12A-12B, 13 (annotated above) and paragraphs 0074-0076]. Regarding claim 25, Mehandru discloses another front side metal via (V3) in contact with the front side metal line (M1), wherein the [an]other front side metal via (V3) is at a same metallization level as the front side metal via (V1) [Figs. 12A-12B, 13 (annotated above) and paragraphs 0074-0076]. Allowable Subject Matter Claims 1-15 are allowed. Response to Arguments Applicant’s arguments with respect to claims 21-25 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Correspondence Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSE R DIAZ whose telephone number is (571)272-1727. The examiner can normally be reached Monday-Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Benitez can be reached at 571-270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Jose R Diaz/Primary Examiner, Art Unit 2815
Read full office action

Prosecution Timeline

Apr 29, 2022
Application Filed
May 23, 2025
Non-Final Rejection — §102
Oct 21, 2025
Applicant Interview (Telephonic)
Oct 21, 2025
Examiner Interview Summary
Oct 23, 2025
Response Filed
Nov 07, 2025
Final Rejection — §102 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
87%
Grant Probability
94%
With Interview (+7.5%)
2y 6m
Median Time to Grant
Moderate
PTA Risk
Based on 922 resolved cases by this examiner. Grant probability derived from career allow rate.

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