DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant’s submission filed on 20 July 2026 has been entered.
Response to Amendment
The Office acknowledges receipt on 20 July 2026 of Applicants’ amendments in which claims 1, 9, and 21 are amended, claim 8 is cancelled, and claim 26 is newly added.
Response to Arguments
Applicants’ arguments filed 20 July 2026 have been fully considered but they are not persuasive. Applicants generally assert with respect to each of claims 1, 9, and 21 that the Office has not identified art teaching the collective subject matter of the claim, without identifying a specific feature of each claim that distinguishes over the applied art and how it does so. Accordingly, Applicants’ attention is directed to the analysis provided with respect to the rejection of each claim presented below.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 2, 4, 7, 9, 10, 12, and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lung et al. (US20200006336A1) in view of Fan et al. (US20180315752A1).
Regarding claim 1, Lung teaches a method comprising:
forming a first fin (20) and a second fin (20) protruding from a substrate (10) {Fig. 2; ¶0037};
forming a first isolation layer (30) surrounding the first fin (20) and the second fin (20) {Fig. 4; ¶0040};
epitaxially growing a first epitaxial region (60) on the first fin (20) and a second epitaxial region (60) on the second fin (20), wherein the first epitaxial region (60) and the second epitaxial region (60) are merged together {Fig. 8; ¶0054};
forming a second isolation layer (80) over the first epitaxial region (60) and the second epitaxial region (60) {Fig. 10; ¶0068};
performing a first etching process on the second isolation layer (80), the first epitaxial region (60), and the second epitaxial region (60), wherein the first etching process separates the first epitaxial region (60) from the second epitaxial region (60), wherein the second isolation layer (80) remains over the first epitaxial region (60) and the second epitaxial region (60) after the first etching process {Fig. 12; ¶0069};
performing a planarization process on a dielectric material (85) {¶0062};
after performing the planarization process, performing a process on the second isolation layer (80) to form a first opening (95) that exposes the first epitaxial region (60) and a second opening (95) that exposes the second epitaxial region (60) {Fig. 15; ¶0071};
forming a first conductive contact (70 or 70, 97) in the first opening (95) and a second conductive contact (70 or 70, 97) in the second opening (95), wherein the first conductive contact (70 or 70, 97) and the second conductive contact (70 or 70, 97) comprise a silicide {Figs. 15, 16; ¶0071}, wherein the first conductive contact (70 or 70, 97) and the second conductive contact (70 or 70, 97) are separated from the dielectric material (85) by the second isolation layer (80) {Figs. 15, 16; separated along a diagonal line-segment drawn from 70 through 80 to 85}; and
forming a first gate stack (40) extending over the first fin (20) {¶0048}.
Lung does not teach in the embodiment discussed above the additional operation of, after performing the first etching process, depositing a dielectric material on sidewalls of the second isolation layer and between the first epitaxial region and the second epitaxial region.
However, Lung teaches: (1) a first alternative in which a dielectric material (85) is deposited before etching a separation between the first epitaxial region (60) and the second epitaxial region (60) {Fig. 10; ¶0068} and (2) a second alternative in which the dielectric material (85) is deposited after etching a separation between the first epitaxial region (60) and the second epitaxial region (60) {Fig. 14; ¶0071}. Moreover, with respect to the second alternative, Lung teaches depositing the dielectric material (85) on sidewalls of the second isolation layer (80) (which is deposited directly on the epitaxial regions (60)) and between the first epitaxial region (60) and the second epitaxial region (60). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lung’s method based on the further teachings of Lung – to include, after performing the first etching process, depositing a dielectric material on sidewalls of the second isolation layer and between the first epitaxial region and the second epitaxial region – because a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. MPEP ¶2143((I)(E). Moreover, the instant application does not identify a new or unexpected result occurring from the recited sequence of processing steps and the selection of any order of performing process steps is prima facie obvious in the absence of a new or unexpected result. MPEP 2144.04(IV)(C).
Lung does not teach performing a planarization process on both the dielectric material and on a top surface of the second isolation layer.
In an analogous art, Fan teaches in Fig. 18B and paragraph [0048] performing a planarization process on a dielectric material (102) and on a top surface of a second isolation layer (88) {i.e., the top surface of the second isolation layer (88) is exposed to the same planarization process as the dielectric material (102)}. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lung’s method based on the teachings of Fan – such that a planarization process on the dielectric material and on a top surface of the second isolation layer – to remove the excess portions of … dielectric layers. Fan ¶0048. Moreover, applying a known technique (e.g., as taught by Fan) in the same way to enhance another known technique (e.g., as taught by Lung) to achieve a predictable result is within the capability of one of ordinary skill in the art. MPEP §2143(I)(C). Furthermore, applying a known technique (e.g., as taught by Fan) in the same way to enhance another known technique (e.g., as taught by Lung) to achieve a predictable result is within the capability of one of ordinary skill in the art. MPEP §2143(I)(C).
Lung does not expressly teach the process performed on the second isolation layer to form a first opening that exposes the first epitaxial region and a second opening that exposes the second epitaxial region is a second etching. More specifically, Lung does not teach how the openings are created.
However, Lung’s Fig. 15 and paragraph [0071] teaches the first and second openings (95) are trenches formed through layers (85) and (80) and into an upper portion of epitaxial layers (60). In Figs. 11 and 12 and paragraph [0069], Lung expressly teaches an etching process for creating a trench (90) formed through layers (85) and (80) and into epitaxial layers (60). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lung’s method as modified by Fan based on the further teachings of Lung – such that the process performed on the second isolation layer to form a first opening that exposes the first epitaxial region and a second opening that exposes the second epitaxial region is a second etching – because applying a known technique (e.g., as taught by Lung) in the same way to enhance another known technique (e.g., as also taught by Lung) to achieve a predictable result is within the capability of one of ordinary skill in the art. MPEP §2143(I)(C).
Regarding claim 2, Lung as modified by Fan teaches the method of claim 1, but Lung does not expressly teach in the same embodiment wherein the first fin and the second fin are separated by a distance in the range of 26 nm to 190 nm.
However, Lung teaches in Fig. 20 and paragraph [0080] another embodiment in which the first fin and the second fin are separated by a distance (S2) in the range of 26 nm to 190 nm {¶0080, the distance S2 ranges from about 30 nm to about 65 nm}. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lung’s method as modified by Fan based on the further teachings of Lung – such that the first fin and the second fin are separated by a distance in the range of 26 nm to 190 nm – because: (1) the first and second fins must be separated by some distance, (2) the epitaxial source/drain regions formed on the fins may merge if the fins are sufficiently closely spaced {Lung ¶0076}, (3) some of the merged epitaxial source/drain regions may have gate cuts formed therethrough to create distinct transistors if the fins are sufficiently spaced apart, and (4) all the claimed elements (first fin, second fin, and separation of first and second fins) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Lung) with no change in their respective functions to yield nothing more than predictable results (e.g., a specific separation distance of fins) to one of ordinary skill in the art. MPEP §2143(I)(A). Moreover, a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. MPEP ¶2143((I)(E).
Regarding claim 4, Lung as modified by Fan teaches the method of claim 1, and Lung further teaches wherein the first epitaxial region (60) is a source/drain region of a first Fin Field-Effect Transistor (FinFET) (1) and the second epitaxial region (60) is a source/drain region of a second FinFET (2) {Fig. 13; ¶0069}.
Regarding claim 7, Lung as modified by Fan teaches the method of claim 1, and Lung further teaches wherein the dielectric material (85) physically contacts a sidewall of the first epitaxial region (60) and a sidewall of the second epitaxial region (60) {Fig. 14; ¶0071}.
Regarding claim 9, Lung teaches a method comprising:
forming a plurality of fins (20) extending over a substrate (10) {Fig. 2; ¶0037};
forming a plurality of epitaxial source/drain regions (60) on the plurality of fins (20), wherein the plurality of epitaxial source/drain regions (60) are merged together to form a merged epitaxial structure (merged 60s) {Fig. 8; ¶0054};
forming an etch stop layer (80) on the merged epitaxial structure (merged 60s) {Fig. 9; ¶0068};
forming an inter-layer dielectric layer (85) over the etch stop layer (80) and the merged epitaxial structure (merged 60s) {Fig. 10; ¶0068};
after forming the inter-layer dielectric layer (85), etching a first trench (90) extending through the inter-layer dielectric layer (85) and through the merged epitaxial structure (merged 60s) {Fig. 12; ¶0069}; and
forming a gate structure (44) extending over the plurality of fins (20) , wherein the gate structure (44) is free of the insulating material (85) {Fig. 4; ¶0048}.
Lung does not teach in the embodiment discussed above the additional operation of depositing an insulating material into the first trench.
However, Lung teaches: (1) a first alternative in which an insulating material (85) is deposited before etching a trench (90) {Fig. 10; ¶0068} and (2) a second alternative in which the insulating material (85) is deposited after etching the trench (90) {Fig. 14; ¶0071}. Moreover, with respect to the second alternative, Lung teaches depositing the insulating material (85) into the first trench (90). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lung’s method based on the further teachings of Lung – to include depositing an insulating material into the first trench – because a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. MPEP ¶2143((I)(E). Furthermore, Lung’s Figs. 15 and 16 illustrate the insulating material (85) is ultimately deposited within trench (90) regardless of whether the first alternative or the second alternative process is pursued.
Lung does not teach wherein the insulating material and the inter-layer dielectric layer are different materials.
In an analogous art, Fan teaches in Fig. 4 and paragraph [0025] depositing an insulating material (54) into a trench (trench filled by 60 and 54) created within a dielectric layer (42). Additionally, Fan teaches in paragraph [0025] the insulating material (54) and the dielectric layer (42) may be the same material or different materials. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lung’s method based on the teachings of Fan – such that Lung’s insulating material and Lung’s inter-layer dielectric layer are different materials – because a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. MPEP ¶2143((I)(E).
Regarding claim 10, Lung as modified by Fan teaches the method of claim 9, but Lung does not expressly teach in the same embodiment wherein the fins of the plurality of fins have a first pitch in the range of 36 nm to 200 nm.
However, Lung teaches in Fig. 20 and paragraph [0080] another embodiment in which the fins of the plurality of fins have a first pitch (S2) in the range of 30 nm to 65 nm. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lung’s method as modified by Fan based on the further teachings of Lung – such that the fins of the plurality of fins have a first pitch in the range of 30 nm to 65 nm – because: (1) the first and second fins must be separated by some distance, (2) the epitaxial source/drain regions formed on the fins may merge if the fins are sufficiently closely spaced {Lung ¶0076}, (3) some of the merged epitaxial source/drain regions may have gate cuts formed therethrough to create distinct transistors if the fins are sufficiently spaced apart, and (4) all the claimed elements (first fin, second fin, and separation of first and second fins) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Lung) with no change in their respective functions to yield nothing more than predictable results (e.g., a specific separation distance of fins) to one of ordinary skill in the art. MPEP §2143(I)(A). Moreover, a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. MPEP ¶2143((I)(E).
Lung does not expressly teach the first pitch has a range of 36 nm to 200 nm. However, as discussed in the preceding paragraph, Lung teaches a first pitch having a range of 30 nm to 65 nm. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. MPEP §2144.05(I).
Regarding claim 12, Lung as modified by Fan teaches the method of claim 9, and Lung further teaches comprising:
forming a second trench (90) extending through the inter-layer dielectric layer (85) and through the merged epitaxial structure (merged 60s) {Fig. 12; ¶0069; ¶0046, there are four or more fin structures disposed on the substrate; ¶0069, gap 90 is then extended … so as to separate the source/drain structures 60 of adjacent devices}; and
depositing the insulating material (85) into the second trench (90) {Fig. 14; ¶0071; see the analysis of base claim 9 for a discussion of the modification applied to Lung, which modification applies similarly with respect to this limitation}.
Regarding claim 15, Lung as modified by Fan teaches the method of claim 9, and Lung further teaches wherein the insulating material (85) extends underneath the merged epitaxial structure (merged 60s) {Fig. 10; insulating material (85) extends below portions of the merged epitaxial structure (merged 60s)}.
Alternatively, Lung’s embodiment illustrated by Fig. 14 and applied in the modification of Lung discussed with respect to base claim 9 illustrates the insulating material (85) extends below all of the merged epitaxial structure (merged 60s).
Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lung in view of Fan as applied to claim 1 above, and further in view of Lee et al. (US20180151564A1).
Regarding claim 3, Lung as modified by Fan teaches the method of claim 1, but Lung does not expressly teach wherein the dielectric material comprises silicon carbonitride.
In an analogous art, Lee teaches in Figs. 7A-B and paragraph [0084] a dielectric material (145) comprises silicon carbonitride. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lung’s method as modified by Fan based on the teachings of Lee – such that the dielectric material comprises silicon carbonitride – because [t]he selection of a known material based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Claim(s) 5, 6, and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lung in view of Fan as applied to claim 1 (for claims 5 and 6) and claim 9 (for claim 13) above, and further in view of Wen et al. (US20200251325A1).
Regarding claim 5, Lung as modified by Fan teaches the method of claim 1, but Lung does not teach wherein a bottom surface of the dielectric material is a first distance to the substrate and a top surface of the first isolation layer is a second distance to the substrate that is greater than the first distance.
In an analogous art, Wen teaches in Fig. 14B and paragraph [0017] a bottom surface of a dielectric material (114) is closer to a substrate (102) than is a top surface of a firs isolation layer (106). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lung’s method as modified by Fan based on the teachings of Wen – such that a bottom surface of the dielectric material is a first distance to the substrate and a top surface of the isolation layer is a second distance to the substrate that is greater than the first distance – to ensure the isolation between the remaining portions of the gate structure. Wen ¶0044.
Regarding claim 6, Lung as modified by Fan teaches the method of claim 1, but Lung does not teach wherein a bottom surface of the dielectric material extends below a top surface of the substrate.
Wen teaches in Fig. 14B and paragraph [0017] a bottom surface of the dielectric material (114) extends below a top surface of the substrate (102, 104). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lung’s method as modified by Fan based on the teachings of Wen – such that a bottom surface of the dielectric material extends below a top surface of the substrate – to ensure the isolation between the remaining portions of the gate structure. Wen ¶0044.
Regarding claim 13, Lung as modified by Fan teaches the method of claim 9, but Lung does not expressly teach wherein the merged epitaxial structure comprises n-type epitaxial source/drain regions and p-type epitaxial source/drain regions.
However, Lung teaches in paragraph [0055] the source-drain structures may be p-channel or n-channel.
Wen teaches in Fig. 18 and paragraph [0036] n-type epitaxial source/drain regions (162b) and p-type epitaxial source/drain regions (162a). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lung’s method as modified by Fan based on the teachings of Wen – such that Lung’s merged epitaxial structure comprises n-type epitaxial source/drain regions and p-type epitaxial source/drain regions – so as to form a p-type FinFet, which may be used for a pull-up transistor in an SRAM cell, and an n-type FinFet, which may be used as a pull-down or pass-gate transistor in the SRAM cell. Wen ¶0015.
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lung in view of Fan as applied to claim 9 above, and further in view of Lin (US20230130955A1).
Regarding claim 11, Lung as modified by Fan teaches the method of claim 9, but Lung does not expressly teach wherein depositing the insulating material into the first trench forms an air gap in the first trench under the insulating material.
In an analogous art, Lin teaches in Fig. 4 and paragraph [0025] that depositing an insulating material (54) into the first trench forms an air gap (60) in the first trench under the insulating material (54). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lung’s method as modified by Fan based on the teachings of Lin – such that an insulating material deposited into the first trench forms an air gap in the first trench under the insulating material – to reduce parasitic capacitance. Lin ¶0034.
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lung as modified by Fan as applied to claim 9 above, and further in view of Wen and Wang (US20230093835A1).
Regarding claim 14, Lung as modified by Fan teaches the method of claim 9, but Lung does not expressly teach wherein a bottom surface of the first trench is farther from the substrate than a bottom surface of the merged epitaxial structure.
Wen teaches in Fig. 18 that a first trench (114) has a bottom surface disposed within an isolation structure (106) (e.g., dielectric), which is disposed on a substrate (102), whereas a bottom surface of a merged epitaxial structure (162) is disposed directly within the substrate (102). Thus, Wen teaches that a bottom surface of the first trench is farther from the substrate than a bottom surface of the merged epitaxial structure. And Wang teaches in paragraph [0039] that disposing a dielectric between a gate electrode and a substrate reduces leakage current and improves reliability of the transistor device. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lung’s method as modified by Fan based on the teachings of Wen – such that a bottom surface of the first trench is farther from the substrate than a bottom surface of the merged epitaxial structure – because disposing a dielectric between a gate electrode (i.e., Wen’s trench after being filled with a gate electrode) and a substrate reduces leakage current and improves reliability of the transistor device, as is taught by Wang in ¶0039. Moreover, all the claimed elements (trench, substrate, epitaxial structure) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Lung) with no change in their respective functions to yield nothing more than predictable results (e.g., a gate electrode isolated from the channel region of the substrate) to one of ordinary skill in the art. MPEP §2143(I)(A).
Claim(s) 26 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lung in view of Fan as applied to claim 1 above, and further in view of Wei et al. (US20230032866A1).
Regarding claim 26, Lung as modified by Fan teaches the method of claim 1, but Lung does not teach wherein a height of the first conductive contact and the second conductive contact above the substrate is greater than a height of the dielectric material above the substrate.
In an analogous art, Wei teaches in Fig. 19a and paragraph [0037] a height of a first conductive contact (129) and a second conductive contact (131) above a substrate (101) is greater than a height of a dielectric material (120) above the substrate (101). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lung’s method as modified by Fan based on the teachings of Wei, to achieve the above-identified subject matter, so as to provide a conductive path for electrical signaling between the respective source/drain regions disposed below the first and second conductive contacts and components disposed external to the dielectric material. Moreover, all the claimed elements (e.g., conductive contacts, substrate, dielectric material) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Wei) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Claims 21, 22, 24, and 25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lung.
Regarding claim 21, Lung teaches a method, comprising:
forming a plurality of fins (20) extending on a substrate (10), wherein adjacent fins (20) of the plurality of fins (20) are respectively separated by a first distance (S1), wherein the plurality of fins (20) comprises a first set of adjacent fins (leftmost 20) and a second set of adjacent fins (rightmost 20) {Fig. 2; ¶0037};
forming a plurality of epitaxial source/drain regions (60) on the plurality of fins (20), wherein adjacent epitaxial source/drain regions (60) of the plurality of epitaxial source/drain regions (60) are respectively merged together, wherein the plurality of epitaxial source/drain regions (60) comprises a first set of epitaxial source/drain regions (60) on the first set of adjacent fins (leftmost 20) and a second set of epitaxial source/drain regions (60) on the second set of adjacent fins (rightmost 20) {Fig. 8; ¶0054};
forming an etch stop layer (80) on surfaces of the first set of epitaxial source/drain regions (60) and on surfaces of the second set of epitaxial source/drain regions (60) {Fig. 10; ¶0068};
forming an insulating region (85) on the etch stop layer (80) over the first set of epitaxial source/drain regions (60), along first (outer) sidewalls of the first set of epitaxial source/drain regions (60), over the second set of epitaxial source/drain regions (60), and along first (outer) sidewalls the second set of epitaxial source/drain regions (60) {Fig. 10; ¶0068};
after forming the insulating region (85) and the plurality of epitaxial source/drain regions (60), forming an isolation region (region of 90) between the first set of epitaxial source/drain regions (60) and the second set of epitaxial source/drain regions (60), wherein the isolation region (region of 90) is a region of a dielectric material (air released from air gap 65 upon the penetration of 90 into air gap 65), wherein the isolation region (region of 90) physically contacts second (inner) sidewalls of the first set of epitaxial source/drain regions (60) and second (inner) sidewalls of the second set of epitaxial source/drain regions (60) {Fig. 12; ¶0069; [0056], air gap 65, air is a dielectric},
wherein the second (inner) sidewalls of the first set of epitaxial source/drain regions (60) and the second (inner) sidewalls of the second set of epitaxial source/drain regions (60) are between the first (outer) sidewalls of the first set of epitaxial source/drain regions (60) and the first (outer) sidewalls of the second set of epitaxial source/drain regions (60); and
forming a first gate structure (leftmost portion of 44) over the first set of adjacent fins (leftmost 20) and a second gate structure (rightmost portion of 44) over the second set of adjacent fins (rightmost 20) {Figs. 4, 8; ¶0046, 0071},
wherein a top surface of the isolation region (region of 90) is farther from the substrate (10) than a top surface of the first gate structure (44) and a top surface of the second gate structure (44) {Lung’s Figs. 5A and 8-11 illustrate that Lung’s component (40) – which includes a gate (44), a cap insulating layer (46), and sidewall spacers (48) – is the same height as Lung’s insulating region (85) and the coplanar isolation region (region of 90) formed therein. Additionally, Lung’s Fig. 5A and paragraph [0048] teach that the gate (44) is disposed entirely below the height of the cap insulating layer (46) and sidewall spacers (48)}.
Lung does not expressly teach forming the gate structure after forming the isolation region. However, Lung teaches in paragraph [0071] “[t]hen the insulating layer 80 (contact etch stop layer), the interlayer dielectric layer 85, and the metal gate structures are formed,” which implies a particular sequence of formation corresponding to the order of items in the listed series of “the insulating layer 80 (contact etch stop layer), the interlayer dielectric layer 85, and the metal gate structures.” Additionally, the Office notes: (1) the instant application does not identify a new or unexpected result occurring due to the claimed sequence of operations and (2) the selection of any order of performing process steps is prima facie obvious in the absence of a new or unexpected result. MPEP 2144.04(IV)(C).
Regarding claim 22, Lung teaches the method of claim 21, and Lung further teaches wherein the insulating region (85) {¶0070, silicon oxide} is a different material than the isolation region (region of 90, air [0056]) {¶0071, gap}.
Regarding claim 24, Lung teaches the method of claim 21, and Lung further teaches further comprising forming a mask material (46) on the first gate structure (44) {Fig. 5A; ¶0048}.
Regarding claim 25, Lung teaches the method of claim 21, and Lung further teaches wherein forming the isolation region (region of 90) comprises forming an opening (90) in the plurality of epitaxial source/drain regions (60) that extends fully through the plurality of epitaxial source/drain regions (60) {Fig. 13; ¶0071}.
Claim(s) 23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lung as applied to claim 22 above, and further in view of Wen.
Regarding claim 23, Lung teaches the method of claim 22, but Lung does not teach wherein top surfaces of the isolation region and the insulating region are level.
Wen teaches in Fig. 1B and paragraph [0017], that top surfaces of the isolation region (114a) and the insulating region (166) are level. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lung’s method based on the teachings of Wen – such that top surfaces of the isolation region and the insulating region are level – because the skilled artisan could have applied Wen’s manufacturing technique in the same way to the method taught by Lung and the results would have been predictable to the skilled artisan. MPEP §2143(I)(C).
Citation of Pertinent Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Huang et al. (US20210134969A1) teaches a method includes forming a gate structure over a fin protruding above a substrate, forming a gate spacer layer on sidewalls of the gate structure, forming an etch stop layer on sidewalls of the gate spacer layer, replacing the gate structure with a gate stack, forming a source/drain contact adjacent the etch stop layer, recessing the gate stack to form a first recess, filling the first recess with a first dielectric material, recessing the source/drain contact and the etch stop layer to form a second recess, filling the second recess with a second dielectric material, recessing the second dielectric material and the gate spacer layer to form a third recess, and filling the third recess with a third dielectric material, wherein the composition of the third dielectric material is different from that of the first dielectric material and the second dielectric material.
Conclusion
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/D.W.W./Examiner, Art Unit 2891
/MATTHEW C LANDAU/Supervisory Patent Examiner, Art Unit 2891
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