DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 1/6/2026 has been entered.
Claim Rejections - 35 USC § 112
In view of Applicant’s amendments, the prior 112(a) and 112(b) rejections are withdrawn.
Rejection 1/2
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4, 23, 32, and 34 are rejected under 35 U.S.C. 103 as being unpatentable over Ching et al. (US 2022/0148979), Ahmad et al. (US 2019/0237371), Chiu et al. (US 2006/0249852), Yu et al. (US 2014/0042643), and Arrington et al. (US 2021/0202348), all of record.
(Re Claim 1) Ching teaches a semiconductor package comprising: a substrate (500; Fig. 13) comprising a first edge (top edge in Fig. 13) and a second edge (bottom edge in Fig. 13) opposite the first edge; a package component (100; Fig. 13 and 14) bonded to the substrate (¶51), wherein the package component comprises a semiconductor die (¶¶34, 46), wherein a first edge (top edge of 100 seen in Fig. 13) of the package component is a closest edge of the package component to the first edge of the substrate;
an additional package component (top left 900 seen in Fig. 13) bonded to the substrate (Fig. 14, ¶73) and beside the package component (Fig. 13), wherein the additional package component comprises another semiconductor die (¶¶73, 76); and a ring structure (600A; Fig. 13 and 14) attached to the substrate (Fig. 14), wherein the ring structure encircles the package component in a top view (Fig. 13), the ring structure comprising: a first segment (Fig. 13 markup) extending along the first edge of the substrate, wherein the first segment has a first width (W4), the first width being a distance between an outer edge of the first segment and an inner edge of the first segment.
Ching does not explicitly teach a semiconductor package comprising: an underfill between the package component and the substrate, wherein the underfill encircles the package component in a top view, and wherein the underfill comprises a first sidewall and a second sidewall opposite to the first sidewall;
an additional underfill between the additional package component and the substrate, wherein the additional underfill encircles the additional package component in the top view; and
wherein the first segment comprises a recess extending at least partially through the ring structure, and
wherein the recess faces the first edge of the package component in the top view, wherein the recess comprises a third sidewall and a fourth sidewall facing the third sidewall, and wherein the first sidewall and the second sidewall are laterally between the third sidewall and the fourth sidewall of the recess in the top view, and the recess laterally overlaps the additional underfill in the top view.
Ahmad teaches a package component (14; Fig. 1), and forming a centered recess (24; Fig. 1, ¶23) in a first segment of a ring structure (10; Fig. 1), wherein the recess faces an edge of the package component.
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to form a recess centered in the first segment of the ring structure of Ching, as taught by Ahmad, in order to reduce warpage caused by the package component 100 (Ahmad: ¶¶24-25).
As the recess of Ahmad faces towards the package components, the recess of modified Ching will face the first edge of the package component in the top view (see the markup showing the recess of modified Ching).
The recess then comprises a third sidewall (the left sidewall parallel to the first width; see the markup showing the recess of modified Ching) and a fourth sidewall (the right sidewall parallel to the first width; see the markup showing the recess of modified Ching).
Chiu teaches forming an underfill (46; Fig. 4A) between a package component (41; Fig. 4A) and a substrate (40; Fig. 4A).
A PHOSITA would find it obvious to form an underfill between the package component and the substrate of modified Ching, as taught by Chiu, in order to reduce stress on the solder connections bonding the package component to the substrate (Chiu: ¶33).
Yu teaches forming a semiconductor package (301; Fig. 3B) surrounded by smaller dies (303; Fig. 3B) such that the width of a first edge (top edge) in a top view is 12 mm (¶42).
As Ching does not disclose the actual dimensions of the ring structure, a PHOSITA desiring to make or use the semiconductor package of Ching would look to the art to find suitable dimensional relationships for the semiconductor package. As Yu teaches the dimensions of a die configuration of a semiconductor package similar to Ching’s, a PHOSITA would find it obvious to use the dimensions given by Yu for the semiconductor package of Ching, as this produces a working device.
Arrington teaches an underfill (430; Fig. 4) that encircles a package component (305; Fig. 4 and 5C) in a top view, and that the lateral spread of an underfill (430; Fig. 4 and 5C) is no more than 1-2 mm (¶27).
A PHOSITA would find it obvious to dispense the underfill of modified Ching as taught by Arrington as a spreading, low viscosity underfill flows under the package component and the additional package component (Arrington: ¶27), ultimately allows for eliminating void defects in the underfill (Arrington: ¶27), and produces an advantageous curvature (Arrington: ¶27).
This results in an additional underfill (Arrington: Fig. 4) between the additional package component and the substrate, wherein the additional underfill encircles the additional package component in the top view (Arrington: Fig. 4; Ching: Fig. 13).
A first sidewall of the underfill is the left sidewall as would be seen in Fig. 13 of Ching (Arrington: Fig. 4 and 5C), and the second sidewall of the underfill is the right sidewall as would be seen in Fig. 13 of Ching (Arrington: Fig. 4 and 5C).
With a lateral spread of the underfill of modified Ching of no more than 1-2 mm, a package component width of 12 mm, and a recess width of 19 mm, the first sidewall and the second sidewall of modified Ching are laterally between the third sidewall and the fourth sidewall of the recess in the top view.
Ahmad has been shown to teach a recess having a width of 19 mm (Fig. 4B), which is wider than the 12 mm width of the first edge of the semiconductor package of modified Ching.
As Ahmad teaches that the shape and size of the recess may be different according to desired warpage control (¶¶25-26), and the overall effect of the shape of the ring structure is readily evaluated and optimized (¶¶18-20), a person having ordinary skill in the art before the effective filing date of the claimed invention would understand that the width of the recess is a result effective variable, with respect to controlling warpage, and so the claimed width relationship would have been obvious to optimize and ascertainable through routine experimentation, such that the recess additionally laterally overlaps the additional underfill in the top view. Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955
PNG
media_image1.png
612
903
media_image1.png
Greyscale
PNG
media_image2.png
689
951
media_image2.png
Greyscale
(Re Claim 2) Modified Ching teaches the semiconductor package of claim 1, wherein the first edge of the package component and the first edge of the substrate are spaced apart by a first distance, wherein a second edge (bottom edge as seen in Fig. 13) of the package component is a closest edge of the package component to the second edge of the substrate, wherein the second edge of the package component and the second edge of the substrate are spaced apart by a second distance, wherein the first distance is greater than the second distance (the first distance is W2+W4 and the second distance is W1+W3; W2 is larger than W1, and W3 may be smaller than W4; Fig. 13, ¶¶59, 85).
(Re Claim 3) Modified Ching teaches the semiconductor package of claim 1, wherein the ring structure further comprises a second segment (Fig. 13 markup) extending along the second edge of the substrate, the second segment having a second width (W3; Fig. 13), wherein the second width is a distance between an outer edge of the second segment and an inner edge of the second segment, wherein the first width is greater than the second width (W3 may be smaller than W4; ¶59).
(Re Claim 4) Modified Ching teaches the semiconductor package of claim 1, wherein the first segment has a second width, wherein the second width is a distance between the outer edge of the first segment and a bottom of the recess (the second width is the distance between E3 and the bottom of the recess of modified Ching; see markup of modified Ching), wherein the first edge of the package component and the bottom of the recess are spaced apart by a first distance (modified Ching markup).
Modified Ching does not explicitly teach the semiconductor package wherein the first distance is greater than the second width.
Ahmad teaches forming a recess (44B; Fig. 4) such that a first distance is greater than a second width, wherein the second width is a distance between an outer edge of a first segment and a bottom of a recess (4.5 mm; Fig. 4), and the distance between an edge (right edge as seen in Fig. 4) of a package component (14; Fig. 4) closest to the recess and the bottom of the recess is a first distance (at least 8.25 mm from the given dimensions; Fig. 4).
As Ching does not disclose the actual dimensions of the ring structure, a PHOSITA desiring to make or use the semiconductor package of Ching would look to the art to find suitable dimensional relationships for the semiconductor package. As Ahmad teaches a first distance is greater than a second width, a PHOSITA would find it obvious to try forming the first distance and second width of modified Ching such that the first distance is greater than the second width, as Ahmad’s example demonstrating a first distance greater than a second width generates an operational semiconductor package that reduces warpage, there are only two other size relationships between the first distance and the second width – the first distance is less than the second width, and the first distance is equal to the second width – and the shape of the ring structure is optimizable according to the desired level of warpage control (Ahmad: “The stiffener shape is optimized to adjust the interaction between the package and stiffener 10 to provide improved co-planarity “; ¶¶18-20). Choosing from a finite number of identified, predictable solutions, with a reasonable expectation for success, is likely to be obvious to a person of ordinary skill in the art. See KSR International Co. v. Teleflex Inc., 550 U.S. 398, 415-421, USPQ2d 1385, 1395 - 97 (2007) (see MPEP § 2143, E.).
(Re Claim 23) Modified Ching teaches the semiconductor package of claim 1, wherein the ring structure comprises a material with a Young's Modulus greater than 100 GPa (the ring structure is formed from e.g. metals including copper; ¶60).
(Re Claim 32) Modified Ching teaches the semiconductor package of claim 1, wherein the ring structure further comprises a third segment (the portion of 600A that is between the first and second segment as defined in the Fig. 13 markup of Ching), wherein the third segment is free of a recess, and wherein the first segment is longer than the third segment (short side S10 versus long side S11; ¶57).
(Re Claim 34) Modified Ching teaches the semiconductor package of claim 1, wherein the additional underfill comprises a fifth sidewall (left sidewall of underfill 430 from Arrington as seen in the top view of Ching) and a sixth sidewall (right sidewall of underfill 430 from Arrington as seen in the top view of Ching) opposite the fifth sidewall, and wherein the third sidewall is laterally between the fifth sidewall and the sixth sidewall (see Ching’s Fig. 13 markup).
Claims 9-13 and 24 are rejected under 35 U.S.C. 103 as being unpatentable over Ching et al. (US 2022/0148979), Ahmad et al. (US 2019/0237371), Chiu et al. (US 2006/0249852), and Lee et al. (US 2012/0018871), and Yuan (US 2011/0156235), all of record.
(Re Claim 9) Ching teaches the semiconductor package comprising: a substrate (500; Fig. 13);
a package component (100; Fig. 13 and 14) bonded to the substrate (¶51), wherein the package component comprises a semiconductor die (¶34); and a frame structure (600A; Fig. 13 and 14) attached to the substrate (Fig. 14), wherein the frame structure encloses the package component in a top view (Fig. 13), the frame structure comprising: a first bar (Fig. 13 markup) along a first edge (top edge as seen in Fig. 13) of the substrate, wherein the first bar comprises a first portion (Fig. 13 markup) having a first width (W4; Fig. 13), a second portion (Fig. 13 markup) having a second width (W4; Fig. 13), and a third portion (Fig. 13 markup) having the first width (W4; Fig. 13), wherein the second portion is disposed between the first portion and the third portion (Fig. 13 markup), and wherein a closest edge of the second portion to the first edge of the substrate is level with a closest edge of the first portion to the first edge of the substrate and a closest edge of the third portion to the first edge of the substrate (Fig. 13 markup).
Ching does not explicitly teach a semiconductor package comprising:
an underfill between the package component and the substrate, wherein the first width is greater than the second width; and
an encapsulant over the substrate, wherein the encapsulant is between the package component and the frame structure, wherein the encapsulant is on a side of an inner sidewall of the frame structure and a side of an outer sidewall of the frame structure, and wherein the outer sidewall of the frame structure is opposite to the inner sidewall of the frame structure.
Ahmad teaches a package component (14; Fig. 1), and forming a centered recess (24; Fig. 1, ¶23) in a second portion of a frame structure (10; Fig. 1), wherein the recess faces an edge of the package component.
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to form a recess centered in the second portion of the frame structure of Ching, as taught by Ahmad, in order to reduce warpage caused by the package component 100 (Ahmad: ¶¶24-25).
With the recess formed, the second width is taken from S11 to the bottom of the recess (markup of modified Ching using Fig. 13), and so the first width is greater than the second width.
Chiu teaches forming an underfill (46; Fig. 4A) between a package component (41; Fig. 4A) and a substrate (40; Fig. 4A).
A PHOSITA would find it obvious to form an underfill between the package component and the substrate of modified Ching, as taught by Chiu, in order to reduce stress on the solder connections bonding the package component to the substrate (Chiu: ¶33).
Lee teaches spacing a frame structure (310+320; Fig. 2A and 3B, ¶98) from the edges of a substrate (110; Fig. 2A and 3B).
A PHOSITA would find it obvious to space the frame structure apart from the edges of the substrate 500 of modified Ching, as taught by Lee, to allow for clearance for the use of a blade or laser to separate multiple packages during manufacturing without cutting through the frame structures (Lee: ¶201).
Lee additionally teaches forming an encapsulant (330a; Fig. 13G) over a substrate (110; Fig. 13G), wherein the encapsulant is between a package component (210a+212+220+222+230 left of center as seen in Fig. 13G; see also Fig. 3B) and a frame structure (310+320 left of center as seen in Fig. 13G), wherein the encapsulant is on a side of an inner sidewall of the frame structure (inner sidewall of the right part of the frame structure as seen in Fig. 13G) and a side of an outer sidewall of the frame structure (outer sidewall of the right part of the frame structure as seen Fig. 13G), and wherein the outer sidewall of the frame structure is opposite to the inner sidewall of the frame structure (Fig. 13G).
A PHOSITA would find it obvious to fill the space between the package component and the frame structure with encapsulant as taught by Lee (Lee: ¶194) in order to increase the stiffness of the overall package (Yuan: ¶17).
With the spacing of the frame structure of modified Ching in view of Lee, the encapsulant formed in view of Lee in modified Ching is then between the package component and the frame structure (due to filling empty space between these elements; Ching: Fig. 14), wherein the encapsulant is on a side of an inner sidewall (Ching: S8; Fig. 14) of the frame structure and a side of an outer sidewall (Ching: S12; Fig. 14; compare to the formation of the encapsulant in Lee’s Fig. 13G) of the frame structure, and wherein the outer sidewall of the frame structure is opposite to the inner sidewall of the frame structure (Ching: Fig. 14; see also Ching’s Fig. 14 markup below).
PNG
media_image3.png
742
999
media_image3.png
Greyscale
PNG
media_image4.png
672
910
media_image4.png
Greyscale
PNG
media_image5.png
687
1030
media_image5.png
Greyscale
(Re Claim 10) Modified Ching teaches the semiconductor package of claim 9, wherein a first edge (top edge as seen in Fig. 13) of the package component and the first edge of the substrate are spaced apart by a first distance, wherein a second edge (bottom edge as seen in Fig. 13) of the package component and a second edge of the substrate are spaced apart by a second distance, wherein the first distance is greater than the second distance (the first distance is W2+W4 and the second distance is W1+W3; W2 is larger than W1, and W3 may be smaller than W4; Fig. 13, ¶¶59, 85).
(Re Claim 11) Modified Ching teaches the semiconductor package of claim 9, wherein the frame structure further comprises a second bar along a second edge of the substrate, wherein the second bar has a uniform third width (W3; Fig. 13), wherein the first width is greater than the third width (W3 may be smaller than W4; Fig. 13, ¶¶59, 85).
(Re Claim 12) Modified Ching teaches the semiconductor package of claim 9, wherein a first edge (top edge as seen in Fig. 13) of the package component and a closest edge of the second portion to the first edge of the package component are spaced apart by a first distance (markup of modified Ching).
However, modified Ching does not explicitly teach the semiconductor package wherein the first distance is greater than the second width.
Ahmad teaches forming a recess (44B; Fig. 4) such that a first distance is greater than a second width, wherein the second width is a distance between an outer edge of a second portion of a first bar and a bottom of a recess (4.5 mm; Fig. 4), and the distance between an edge (right edge as seen in Fig. 4) of a package component (14; Fig. 4) closest to the recess and the bottom of the recess is a first distance (at least 8.25 mm from the given dimensions; Fig. 4).
As Ching does not disclose the actual dimensions of the ring structure, a PHOSITA desiring to make or use the semiconductor package of Ching would look to the art to find suitable dimensional relationships for the semiconductor package. As Ahmad teaches a first distance is greater than a second width, a PHOSITA would find it obvious to try forming the first distance and second width of modified Ching such that the first distance is greater than the second width, as Ahmad’s example demonstrating a first distance greater than a second width generates an operational semiconductor package that reduces warpage, there are only two other size relationships between the first distance and the second width – the first distance is less than the second width, and the first distance is equal to the second width – and the shape of the ring structure is optimizable according to the desired level of warpage control (Ahmad: “The stiffener shape is optimized to adjust the interaction between the package and stiffener 10 to provide improved co-planarity “; ¶¶18-20). Choosing from a finite number of identified, predictable solutions, with a reasonable expectation for success, is likely to be obvious to a person of ordinary skill in the art. See KSR International Co. v. Teleflex Inc., 550 U.S. 398, 415-421, USPQ2d 1385, 1395 - 97 (2007) (see MPEP § 2143, E.).
(Re Claim 13) Modified Ching teaches the semiconductor package of claim 9, wherein the second portion is laterally centered about the package component (Ahmad: Fig. 1).
(Re Claim 24) Modified Ching teaches the semiconductor package of claim 9, wherein the frame structure comprises a material with a Young's Modulus greater than 100 GPa (the ring structure is formed from e.g. metals including copper; ¶60).
Claims 25-27 and 30 are rejected under 35 U.S.C. 103 as being unpatentable over Ching et al. (US 2022/0148979), Ahmad et al. (US 2019/0237371), Lee et al. (US 2012/0018871), and Yuan (US 2011/0156235), all of record.
(Re Claim 25) Ching teaches a semiconductor package comprising: a substrate (500; Fig. 13); one or more package components (100+900; Fig. 13) bonded to the substrate (Fig. 14, ¶51), wherein the one or more package components comprise one or more semiconductor dies (¶34), wherein a first package component (100; Fig. 13) of the one or more package components is disposed at a center of the substrate, wherein the substrate comprises a first edge (bottom as seen in Fig. 13) and a second edge (top as seen in Fig. 13) opposite the first edge; and a ring structure (600A; Fig. 13 and 14) attached to the substrate, wherein the ring structure encircles the one or more package components in a top view (Fig. 13), the ring structure comprising: a first segment (Fig. 13 markup) extending along the first edge of the substrate.
Ching does not explicitly teach a semiconductor package wherein the first segment comprises an indentation on an inner sidewall of the ring structure and extending at least partially through the ring structure, and wherein the indentation opens towards a first edge of the package component in the top view; and
an encapsulant over the substrate, wherein the encapsulant is in contact with an outer sidewall of the ring structure, the outer sidewall of the ring structure being opposite to the inner sidewall of the ring structure.
Ahmad teaches a package component (14; Fig. 1), and forming a single, centered indentation (24; Fig. 1, ¶23) in a first segment of a ring structure (10; Fig. 1), wherein the recess faces an edge of the package component. Furthermore, this indentation may be formed on a different side (¶25). Ahmad also teaches a package component (14; Fig. 4), and forming a centered indentation (44a; Fig. 4, ¶26) in a first segment of a ring structure (40; Fig. 4) that is on a different side compared with the indentation shown in Fig. 1 with respect to the line A of Fig. 1, wherein the indentation opens towards a first edge of the package component. A PHOSITA would then find it obvious to form an indentation on either side of a center line, as both locations result in predictable control of warpage (¶¶18-20, 26). See Ruiz v. A.B. Chance Co., 357 F.3d 1270, 69 USPQ2d 1686 (Fed. Cir. 2004).
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to form an indentation centered in the first segment of the ring structure of Ching, on the side closer to the package component as shown in Fig. 4 of Ahmad, in order to reduce warpage caused by the package component 100 (Ahmad: ¶¶24-25; see markup of modified Ching). See Ruiz v. A.B. Chance Co., 357 F.3d 1270, 69 USPQ2d 1686 (Fed. Cir. 2004).
As the recess of Ahmad opens towards the package components, first segment of modified Ching will comprise an indentation on an inner sidewall (Ching: S5; Fig. 13) of the ring structure, and the indentation of modified Ching will open towards a first edge (bottom edge as seen in Fig. 13) of the package component in the top view (see the markup showing the indentation of modified Ching).
Lee teaches spacing a ring structure (310+320; Fig. 2A and 3B, ¶98) from the edges of a substrate (110; Fig. 2A and 3B).
A PHOSITA would find it obvious to space the ring structure apart from the edges of the substrate 500 of modified Ching, as taught by Lee, to allow for clearance for the use of a blade or laser to separate multiple packages during manufacturing without cutting through the ring structures (Lee: ¶201).
Lee additionally teaches forming an encapsulant (330a; Fig. 13G) over a substrate (110; Fig. 13G), wherein the encapsulant is between a package component (210a+212+220+222+230 left of center as seen in Fig. 13G; see also Fig. 3B) and a ring structure (310+320 left of center as seen in Fig. 13G), is contact with an outer sidewall of the ring structure (outer sidewall of the right part of the ring structure as seen Fig. 13G), the outer sidewall of the ring structure being opposite to an inner sidewall (inner sidewall of the right part of the ring structure as seen in Fig. 13G) of the ring structure.
A PHOSITA would find it obvious to fill the space between the package component and the ring structure with encapsulant as taught by Lee (Lee: ¶194) in order to increase the stiffness of the overall package (Yuan: ¶17).
With the spacing of the ring structure of modified Ching in view of Lee, the encapsulant formed in view of Lee in modified Ching is then between the package component and the ring structure (due to filling empty space between these elements; Ching: Fig. 14), wherein the encapsulant is in contact with an outer sidewall (Ching: S9; Fig. 12 and 14; compare to the formation of the encapsulant in Lee’s Fig. 13G) of the ring structure, the outer sidewall of the ring structure being opposite to the inner sidewall (Ching: Fig. 12 and 14; see also Ching’s Fig. 12 markup below)
PNG
media_image6.png
731
1018
media_image6.png
Greyscale
PNG
media_image7.png
627
866
media_image7.png
Greyscale
PNG
media_image8.png
646
1040
media_image8.png
Greyscale
(Re Claim 26) Modified Ching teaches semiconductor package of claim 25, wherein the first edge of the first package component is closer to the first edge of the substrate than a second edge of the first package component is to the second edge of the substrate (the first distance is W1+W3 and the second distance is W2+W4; W2 is larger than W1, and W3 may be smaller than W4; Fig. 13, ¶¶59, 85).
(Re Claim 27) Modified Ching teaches the semiconductor package of claim 25, wherein the ring structure further comprises a second segment opposite the first segment, a width of the second segment being less than a width of the first segment (W4 may be less than W3; ¶¶59, 85).
(Re Claim 30) Modified Ching teaches the semiconductor package of claim 25, wherein the indentation is laterally centered about the first package component in the top view (modified Ching markup).
Claim 28 is rejected under 35 U.S.C. 103 as being unpatentable over Ching et al. (US 2022/0148979), Ahmad et al. (US 2019/0237371), Lee et al. (US 2012/0018871), and Yuan (US 2011/0156235), all of record, as applied to claim 25 above, and further in view of Yu et al. (US 2014/0042643) of record.
(Re Claim 28) Modified Ching teaches the semiconductor package of claim 25, but has not been shown to teach the semiconductor package wherein the indentation is wider than the first edge of the package component in the top view.
Yu teaches forming a semiconductor package (301; Fig. 3B) surrounded by smaller dies (303; Fig. 3B) such that a width of a first edge (top edge) in a top view is 12 mm (¶42).
As Ching does not disclose the actual dimensions of the ring structure, a PHOSITA desiring to make or use the semiconductor package of Ching would look to the art to find suitable dimensional relationships for the semiconductor package. As Yu teaches the dimensions of a die configuration of a semiconductor package similar to Ching’s, a PHOSITA would find it obvious to use the dimensions given by Yu for the semiconductor package of Ching, as this produces a working device.
Furthermore, Ahmad teaches an indentation having a width of 19 mm (Fig. 4B), which is wider than that of the first edge of the semiconductor package of modified Ching.
As Ahmad teaches that the shape and size of the indentation may be different according to desired warpage control (¶¶25-26), and the overall effect of the shape of the ring structure is readily evaluated and optimized (¶¶18-20), a person having ordinary skill in the art before the effective filing date of the claimed invention would understand that the width of the recess is a result effective variable, with respect to controlling warpage, and so the claimed width relationship would have been obvious to optimize and ascertainable through routine experimentation. Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Claim 29 is rejected under 35 U.S.C. 103 as being unpatentable over Ching et al. (US 2022/0148979), Ahmad et al. (US 2019/0237371), Lee et al. (US 2012/0018871), and Yuan (US 2011/0156235), all of record, as applied to claim 25 above, and further in view of Yu et al. (US 2014/0042643) and Lim et al. (USU 2011/0253428), both of record.
(Re Claim 29) Modified Ching teaches the semiconductor package of claim 25, but has not been shown to teach the semiconductor package wherein the indentation is narrower than the first edge of the first package component in the top view.
Yu teaches forming a semiconductor package (301; Fig. 3B) surrounded by smaller dies (303; Fig. 3B) such that a width of a first edge (top edge) in a top view is 12 mm (¶42).
As Ching does not disclose the actual dimensions of the ring structure, a PHOSITA desiring to make or use the semiconductor package of Ching would look to the art to find suitable dimensional relationships for the semiconductor package. As Yu teaches the dimensions of a die configuration of a semiconductor package similar to Ching’s, a PHOSITA would find it obvious to use the dimensions given by Yu for the semiconductor package of Ching, as this produces a working device.
Lim teaches forming an indentation (50’; Fig. 6) having a width of 10 mm (¶38) that is narrower than a first edge (60; Fig. 6) of a package component (15) in a top view.
As Ahmad teaches that the shape and size of the indentation may be different according to desired warpage control (¶¶25-26), and the overall effect of the shape of the ring structure is readily evaluated and optimized (¶¶18-20), a person having ordinary skill in the art before the effective filing date of the claimed invention would understand that the width of the recess is a result effective variable, with respect to controlling warpage, and so the claimed width relationship would have been obvious to optimize and ascertainable through routine experimentation. Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Claim 35 is rejected under 35 U.S.C. 103 as being unpatentable over Ching et al. (US 2022/0148979), Ahmad et al. (US 2019/0237371), Chiu et al. (US 2006/0249852), Yu et al. (US 2014/0042643), and Arrington et al. (US 2021/0202348), all of record as applied to claim 1 above, and further in view of Lee et al. (US 2012/0018871) and Yuan (US 2011/0156235), both of record.
(Re Claim 35) Modified Ching teaches the semiconductor package of claim 1, but has not been shown to teach the semiconductor package further comprising an encapsulant over the substrate, wherein the encapsulant is in contact with an inner sidewall of the ring structure and an outer sidewall of the ring structure, and wherein the outer sidewall of the ring structure is opposite to the inner sidewall of the ring structure.
Lee teaches spacing a ring structure (310+320; Fig. 2A and 3B, ¶98) from the edges of a substrate (110; Fig. 2A and 3B).
A PHOSITA would find it obvious to space the ring structure apart from the edges of the substrate 500 of modified Ching, as taught by Lee, to allow for clearance for the use of a blade or laser to separate multiple packages during manufacturing without cutting through the ring structures (Lee: ¶201).
Lee additionally teaches forming an encapsulant (330a; Fig. 13G) over a substrate (110; Fig. 13G), wherein the encapsulant is between a package component (210a+212+220+222+230 left of center as seen in Fig. 13G; see also Fig. 3B) and a ring structure (310+320 left of center as seen in Fig. 13G), wherein the encapsulant is in contact with an inner sidewall of the ring structure (inner sidewall of the right part of the ring structure as seen in Fig. 13G) and an outer sidewall of the ring structure (outer sidewall of the right part of the ring structure as seen Fig. 13G), and wherein the outer sidewall of the ring structure is opposite to the inner sidewall of the ring structure (Fig. 13G).
A PHOSITA would find it obvious to fill the space between the package component and the ring structure with encapsulant as taught by Lee (Lee: ¶194) in order to increase the stiffness of the overall package (Yuan: ¶17).
With the spacing of the ring structure of modified Ching in view of Lee, the encapsulant formed in view of Lee in modified Ching is then between the package component and the ring structure (due to filling empty space between these elements; Ching: Fig. 14), wherein the encapsulant is in contact with an inner sidewall (Ching: S8; Fig. 14) of the frame structure and an outer sidewall (Ching: S12; Fig. 14; compare to the formation of the encapsulant in Lee’s Fig. 13G) of the ring structure, and wherein the outer sidewall of the ring structure is opposite to the inner sidewall of the ring structure (Ching: Fig. 14; see also Ching’s Fig. 14 markup below).
PNG
media_image5.png
687
1030
media_image5.png
Greyscale
Rejection 2/2
Claims 25, 27, and 30 are rejected under 35 U.S.C. 103 as being unpatentable over Ching et al. (US 2022/0148979), Ahmad et al. (US 2019/0237371), Lee et al. (US 2012/0018871), and Yuan (US 2011/0156235), all of record.
(Re Claim 25) Ching teaches a semiconductor package comprising: a substrate (500; Fig. 13); one or more package components (100+900; Fig. 13) bonded to the substrate (Fig. 14, ¶51), wherein the one or more package components comprise one or more semiconductor dies (¶34), wherein a first package component (100; Fig. 13) of the one or more package components is disposed at a center of the substrate, wherein the substrate comprises a first edge (top as seen in Fig. 13) and a second edge (bottom as seen in Fig. 13) opposite the first edge; and a ring structure (600A; Fig. 13 and 14) attached to the substrate, wherein the ring structure encircles the one or more package components in a top view (Fig. 13), the ring structure comprising: a first segment (Fig. 13 markup) extending along the first edge of the substrate.
Ching does not explicitly teach a semiconductor package wherein the first segment comprises an indentation extending at least partially through the ring structure, and wherein the indentation opens towards a first edge of the package component in the top view; and
an encapsulant over the substrate, wherein the encapsulant is in contact with an outer sidewall of the ring structure, the outer sidewall of the ring structure being opposite to the inner sidewall of the ring structure.
Ahmad teaches a package component (14; Fig. 1), and forming a single, centered indentation (24; Fig. 1, ¶23) in a first segment of a ring structure (10; Fig. 1), wherein the recess faces an edge of the package component.
A person having ordinary skill in the art before the effective filing date of the claimed invention would find it obvious to form a recess centered in the first segment of the ring structure of Ching, as taught by Ahmad, in order to reduce warpage caused by the package component 100 (Ahmad: ¶¶24-25).
As the recess of Ahmad opens towards the package components, first segment of modified Ching will comprise an indentation on an inner sidewall (Ching: S7; Fig. 13) of the ring structure, and the indentation of modified Ching will open towards a first edge (top edge as seen in Fig. 13) of the package component in the top view (see the markup showing the indentation of modified Ching).
Lee teaches spacing a ring structure (310+320; Fig. 2A and 3B, ¶98) from the edges of a substrate (110; Fig. 2A and 3B).
A PHOSITA would find it obvious to space the ring structure apart from the edges of the substrate 500 of modified Ching, as taught by Lee, to allow for clearance for the use of a blade or laser to separate multiple packages during manufacturing without cutting through the ring structures (Lee: ¶201).
Lee additionally teaches forming an encapsulant (330a; Fig. 13G) over a substrate (110; Fig. 13G), wherein the encapsulant is between a package component (210a+212+220+222+230 left of center as seen in Fig. 13G; see also Fig. 3B) and a ring structure (310+320 left of center as seen in Fig. 13G), is contact with an outer sidewall of the ring structure (outer sidewall of the right part of the ring structure as seen Fig. 13G), the outer sidewall of the ring structure being opposite to an inner sidewall (inner sidewall of the right part of the ring structure as seen in Fig. 13G) of the ring structure.
A PHOSITA would find it obvious to fill the space between the package component and the ring structure with encapsulant as taught by Lee (Lee: ¶194) in order to increase the stiffness of the overall package (Yuan: ¶17).
With the spacing of the ring structure of modified Ching in view of Lee, the encapsulant formed in view of Lee in modified Ching is then between the package component and the ring structure (due to filling empty space between these elements; Ching: Fig. 14), wherein the encapsulant is in contact with an outer sidewall (Ching: S11; Fig. 12 and 14; compare to the formation of the encapsulant in Lee’s Fig. 13G) of the ring structure, the outer sidewall of the ring structure being opposite to the inner sidewall (Ching: Fig. 12 and 14; see also Ching’s Fig. 12 markup below)
PNG
media_image9.png
731
1018
media_image9.png
Greyscale
PNG
media_image4.png
672
910
media_image4.png
Greyscale
PNG
media_image8.png
646
1040
media_image8.png
Greyscale
(Re Claim 27) Modified Ching teaches the semiconductor package of claim 25, wherein the ring structure further comprises a second segment opposite the first segment, a width of the second segment being less than a width of the first segment (W3 may be less than W4; ¶¶59, 85).
(Re Claim 30) Modified Ching teaches the semiconductor package of claim 25, wherein the indentation is laterally centered about the first package component in the top view (modified Ching markup).
Claim 28 is rejected under 35 U.S.C. 103 as being unpatentable over Ching et al. (US 2022/0148979), Ahmad et al. (US 2019/0237371), Lee et al. (US 2012/0018871), and Yuan (US 2011/0156235), all of record, as applied to claim 25 above, and further in view of Yu et al. (US 2014/0042643) of record.
(Re Claim 28) Modified Ching teaches the semiconductor package of claim 25, but does not teach the semiconductor package wherein the indentation is wider than the first edge of the package component in the top view.
Yu teaches forming a semiconductor package (301; Fig. 3B) surrounded by smaller dies (303; Fig. 3B) such that a width of a first edge (top edge) in a top view is 12 mm (¶42).
As Ching does not disclose the actual dimensions of the ring structure, a PHOSITA desiring to make or use the semiconductor package of Ching would look to the art to find suitable dimensional relationships for the semiconductor package. As Yu teaches the dimensions of a die configuration of a semiconductor package similar to Ching’s, a PHOSITA would find it obvious to use the dimensions given by Yu for the semiconductor package of Ching, as this produces a working device.
Ahmad teaches an indentation having a width of 19 mm (Fig. 4B), which is wider than that of the first edge of the semiconductor package of modified Ching.
As Ahmad teaches that the shape and size of the indentation may be different according to desired warpage control (¶¶25-26), and the overall effect of the shape of the ring structure is readily evaluated and optimized (¶¶18-20), a person having ordinary skill in the art before the effective filing date of the claimed invention would understand that the width of the recess is a result effective variable, with respect to controlling warpage, and so the claimed width relationship would have been obvious to optimize and ascertainable through routine experimentation. Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Claim 29 is rejected under 35 U.S.C. 103 as being unpatentable over Ching et al. (US 2022/0148979), Ahmad et al. (US 2019/0237371), Lee et al. (US 2012/0018871), and Yuan (US 2011/0156235), all of record, as applied to claim 25 above, and further in view of Yu et al. (US 2014/0042643) and Lim et al. (USU 2011/0253428), both of record.
(Re Claim 29) Modified Ching teaches the semiconductor package of claim 25, but does not teach the semiconductor package wherein the indentation is narrower than the first edge of the package component in the top view.
Yu teaches forming a semiconductor package (301; Fig. 3B) surrounded by smaller dies (303; Fig. 3B) such that a width of a first edge (top edge) in a top view is 12 mm (¶42).
As Ching does not disclose the actual dimensions of the ring structure, a PHOSITA desiring to make or use the semiconductor package of Ching would look to the art to find suitable dimensional relationships for the semiconductor package. As Yu teaches the dimensions of a die configuration of a semiconductor package similar to Ching’s, a PHOSITA would find it obvious to use the dimensions given by Yu for the semiconductor package of Ching, as this produces a working device.
Lim teaches forming an indentation (50’; Fig. 6) having a width of 10 mm (¶38) that is narrower than a first edge (60; Fig. 6) of a package component (15) in a top view.
As Ahmad teaches that the shape and size of the indentation may be different according to desired warpage control (¶¶25-26), and the overall effect of the shape of the ring structure is readily evaluated and optimized (¶¶18-20), a person having ordinary skill in the art before the effective filing date of the claimed invention would understand that the width of the recess is a result effective variable, with respect to controlling warpage, and so the claimed width relationship would have been obvious to optimize and ascertainable through routine experimentation. Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Response to Arguments
Applicant's arguments filed 1/6/2026 have been fully considered but they are moot in view of the new rejection.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Christopher A Schodde whose telephone number is (571)270-1974. The examiner can normally be reached M-F 1000-1800 EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Manno can be reached on (571)272-2339. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/CHRISTOPHER A. SCHODDE/Examiner, Art Unit 2898
/JESSICA S MANNO/SPE, Art Unit 2898
Prosecution Insights