Prosecution Insights
Last updated: April 19, 2026
Application No. 17/674,430

LIGHT-EMITTING DIODE PACKAGES WITH SELECTIVELY PLACED LIGHT-ALTERING MATERIALS AND RELATED METHODS

Non-Final OA §103
Filed
Feb 17, 2022
Examiner
CAMPBELL, SHAUN M
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Creeled Inc.
OA Round
5 (Non-Final)
72%
Grant Probability
Favorable
5-6
OA Rounds
2y 8m
To Grant
81%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allow Rate
742 granted / 1025 resolved
+4.4% vs TC avg
Moderate +8% lift
Without
With
+8.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
47 currently pending
Career history
1072
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
53.2%
+13.2% vs TC avg
§102
26.5%
-13.5% vs TC avg
§112
14.3%
-25.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1025 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION RCE, received 11/18/2025, has been entered. Claims 1-24 are presented for examination. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1-8 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US Pub. No. 2018/0151790 A1), hereafter referred to as Kim, in view of Jagt et al. (US Pub. No. 2011/0175117 A1), hereafter referred to as Jagt. As to claim 1, Kim discloses a LED package (fig 9, [0112]) comprising: a submount (fig 9, 201); a pattern of metal traces on the submount (pattern of metal traces 210/220; [0032]): at least one LED chip (110) on the submount (201) and electrically coupled with the pattern of metal traces ([0026]), the at least one LED chip including a first side, a second side that is mounted to the submount, and peripheral edges that bound the first side and the second side (fig 9, top bottom and lateral sides of 110); and a light-altering material (250) directly on the peripheral edges of the at least one LED chip (110) and on portions of the submount (201) that are proximate the at least one LED chip (110) such that peripheral edges of the light-altering material (250) are in a position that is between peripheral edges of the submount (submount 201) and the at least one LED chip (110), the light-altering material comprising a light-reflective material ([0106]-[0108]). Kim does not disclose that the peripheral edges of the light-altering material are curved at an interface with the submount. Nonetheless, Jagt discloses an LED chip with a light-altering material that is also a reflective material includes peripheral edges that are curved at an interface with a submount in a position that is between peripheral edges of the submount and the at least one LED chip (figs 8a-c and fig 9, LED 1, unlabeled submount, light-altering material 7; [0074]). It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to deposit the light-altering material of Kim using the dispenser and capillary force such that the edges are curved as taught by Jagt since this will ensure an even coating of the light-altering material along the sidewall of the LED device while utilizing a simplified manufacturing process. As to claim 2, Kim in view of Jagt disclose the LED package of claim 1 (paragraphs above), Kim further discloses wherein a height of the light-altering material above the submount decreases across the submount with increasing distance from the peripheral edges of the at least one LED chip (fig 9, decreasing height of 250 from edge of 110 to the edge of 201). As to claim 3, Kim in view of Jagt disclose the LED package of claim 2 (paragraphs above), Kim further discloses wherein the height of the light-altering material at the peripheral edges of the light-altering material is less than 10% of a height of the at least one LED chip (fig 9, height of 250 decreases linearly so that at the outer edge of 250 the height approaches zero which will become less than 10% the height of LED chip 110). As to claim 4, Kim in view of Jagt disclose the LED package of claim 1 (paragraphs above), Kim further discloses an electrical overstress element (fig 8, 105) on the submount (201), wherein the light-altering material is further arranged to surround edges of the electrical overstress element (fig 8, material 250 at least partially surrounds edges of 105). As to claim 5, Kim in view of Jagt disclose the LED package of claim 1 (paragraphs above), Kim further discloses an encapsulant (fig 9, 260) that is arranged on the submount (201), wherein the encapsulant includes a lens portion (261) and a flash portion (262) that forms a lateral extension of the encapsulant from the lens portion to the peripheral edges of the submount (201), wherein the peripheral edges of the light-altering material (250) are registered within the lens portion of the encapsulant (261). As to claim 6, Kim in view of Jagt disclose the LED package of claim 1 (paragraphs above). Kim does not disclose wherein the at least one LED chip comprises a plurality of LED chips on the submount and the light-altering material is arranged on peripheral edges of each LED chip of the plurality of LED chips. Nonetheless, Jagt discloses wherein at least one LED chip comprises a plurality of LED chips on a submount and a light-altering material is arranged on peripheral edges of each LED chip of the plurality of LED chips (fig 7, LED chips 2 on submount 3 with light-altering material/reflective material 7 on each LED chip 2). It would have been obvious to one of ordinary skill before the effective filing of the claimed invention to include a plurality of LED chips on the submount of Kim as taught by Jagt since this will increase the amount of light emitted from the LED package. As to claim 7, Kim in view of Jagt disclose the LED package of claim 6 (paragraphs above), Jagt further discloses wherein the light-altering material is further arranged in gaps formed between neighboring LED chips of the plurality of LED chips (fig 7, material 7 in gaps between neighboring LED chips 2). As to claim 8, Kim in view of Jagt disclose the LED package of claim 1 (paragraphs above), Kim further discloses a lumiphoric material (120) that is arranged on the first side of the at least one LED chip (top side of 110) and on the light-altering material (250). As to claim 12, Kim in view of Jagt disclose the LED package of claim 1 (paragraphs above), Kim further discloses a lumiphoric material (120) that is arranged on the first side of the at least one LED chip (top side of 110), wherein portions of the lumiphoric material are arranged between the light-altering material and the submount (portions of 120 between leftmost side portion of 250 and 110). Claim(s) 20-23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Damborsky et al. (US Pub. No. 2019/0326485 A1), hereafter referred to as Damborsky, in view of Jagt. As to claim 20, Damborsky discloses a LED package (fig 4A, 40; [0067]) comprising: a submount (44); at least one LED chip (42) on the submount (44), the at least one LED chip including a first side, a second side that is mounted to the submount (top and bottom sides of LED chip 42), and peripheral edges that bound the first side and the second side (peripheral edges of 42); a lumiphoric material (46; [0069]) on the first side and on the peripheral edges of the at least one LED chip (42); and a light-altering material (60; [0069]) directly on a top surface of the lumiphoric material (material 60 is directly on top surface of lumiphoric material 46) relative to the submount (44), and the light-altering material being proximate the peripheral edges of the at least one LED chip (42) such that peripheral edges of the light-altering material (60) are arranged in positions that are between peripheral edges of the submount (44) and the at least one LED chip (42), the light-altering material comprising a light-reflective material ([0069]). Damborsky does not explicitly disclose that the light-altering material is directly on a side surface of the lumiphoric material. However, Damborsky does disclose: “In some embodiments, the light-altering material 60 is on the lumiphoric material 46 and adjacent to the LED chip 42.” ([0070]). However, this does not explicitly teach immediately adjacent, as in directly on a side surface. Nonetheless, Jagt discloses a light-altering material that is adjacent and not spaced apart from an LED (fig 1, LED 2 and light altering material 7). It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to form the light-altering material of Damborsky directly on a side surface of lumiphoric material since Jagt teaches that the light-altering material may be formed close to the LED in order to increase the amount of light reflected outside of the package and thus improving the light emission efficiency of the LED device. As to claim 21, Damborsky in view of Jagt disclose the LED package of claim 20 (paragraphs above), Damborsky further discloses wherein a height of the light-altering material above the submount decreases across the submount with increasing distance from the peripheral edges of the at least one LED chip (fig 4A, height of 60 decreases across 44 from middle of 60 to the peripheral edges of 44 in direction from edges of 42). As to claim 22, Damborsky in view of Jagt disclose the LED package of claim 20 (paragraphs above), Damborsky further discloses an encapsulant (50) that is arranged on the submount (44), wherein the encapsulant (50) includes a lens portion (50’) and a flash portion (50’’, 52; [0067]) that forms a lateral extension of the encapsulant from the lens portion to the peripheral edges of the submount (44), wherein the peripheral edges of the light-altering material (60) are registered within the lens portion of the encapsulant (50’). As to claim 23, Damborsky in view of Jagt disclose the LED package of claim 20 (paragraphs above), Damborsky further discloses wherein a height of the light-altering material above the submount is greater than a height of the at least one LED chip above the submount ([0072]). Claim(s) 9-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Jagt and further in view of Damborsky. As to claim 9, Kim in view of Jagt disclose the LED package of claim 8 (paragraphs above). Kim does not disclose wherein a height of the lumiphoric material above the submount decreases across the submount with increasing distance from the peripheral edges of the at least one LED chip. Nonetheless, Damborsky discloses wherein a height of a lumiphoric material above a submount decreases across the submount with increasing distance from the peripheral edges of at least one LED chip (fig 4a, height of lumiphoric material 46 above submount 44 decreases from edges of LED chip 42). It would have been obvious to one of ordinary skill before the effective filing of the claimed invention to form the lumiphoric material of Kim above the submount as taught by Damborsky since this will ensure that the emission of light in a non-vertical direction will be adjusted to the desired wavelength. As to claim 10, Kim in view of Jagt and Damborsky disclose the LED package of claim 9 (paragraphs above), Damborsky further discloses wherein portions of the lumiphoric material (46) are arranged on portions of the submount (44) that are outside the peripheral edges of the light-altering material (60). As to claim 11, Kim in view of Jagt and Damborsky disclose the LED package of claim 10 (paragraphs above), Damborsky further discloses an encapsulant (50) that is arranged on the submount (44), wherein the encapsulant includes a lens portion (50’) and a flash portion (52) that forms a lateral extension of the encapsulant from the lens portion to the peripheral edges of the submount (44), wherein the peripheral edges of the light-altering material (60) are registered within the lens portion (50’) of the encapsulant and the portions of the lumiphoric material (46) are registered with the flash portion (52) of the encapsulant (50). Claim(s) 24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Damborsky in view of Jagt and further in view of Kim. As to claim 24, Damborsky in view of Jagt disclose the LED package of claim 20 (paragraphs above), Damborsky does not disclose an electrical overstress element on the submount, wherein the light-altering material is further arranged to surround edges of the electrical overstress element. Nonetheless, Kim discloses an electrical overstress element (fig 8, 105) on the submount (201), wherein the light-altering material is further arranged to surround edges of the electrical overstress element (fig 8, material 250 at least partially surrounds edges of 105). It would have been obvious to one of ordinary skill before the effective filing of the claimed invention to include the overstress element of Kim in the LED package of Damborsky since this will protect the LED chip from electrical damage. Allowable Subject Matter Claims 13-19 are allowed. The following is a statement of reasons for the indication of allowable subject matter: The prior art of record fails to teach or suggest the method comprising dispensing a plurality of droplets of light-altering material proximate the LED chip on the submount, each droplet of the plurality of droplets being spaced apart from other droplets of the plurality of droplets proximate the LED, as recited in claim 13. Dependent claims 14-19 are allowable because of their dependence from claim 13. Response to Arguments Applicant’s arguments with respect to claim(s) 1-12 and 20-24 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Pertinent Art The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 2020/0335673A1; fig 32 of US 2017/0098746A1; and US 2017/0069606A1. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAUN M CAMPBELL whose telephone number is (571)270-3830. The examiner can normally be reached on MWFS: 7:30-6pm Thurs 1-2pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Purvis, Sue can be reached at (571)272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SHAUN M CAMPBELL/Primary Examiner, Art Unit 2893 1/15/2026
Read full office action

Prosecution Timeline

Feb 17, 2022
Application Filed
Jul 25, 2024
Non-Final Rejection — §103
Oct 07, 2024
Response Filed
Dec 20, 2024
Final Rejection — §103
Feb 21, 2025
Response after Non-Final Action
Mar 04, 2025
Request for Continued Examination
Mar 06, 2025
Response after Non-Final Action
May 21, 2025
Non-Final Rejection — §103
Aug 13, 2025
Response Filed
Sep 12, 2025
Final Rejection — §103
Nov 06, 2025
Response after Non-Final Action
Nov 18, 2025
Request for Continued Examination
Nov 22, 2025
Response after Non-Final Action
Jan 15, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
72%
Grant Probability
81%
With Interview (+8.3%)
2y 8m
Median Time to Grant
High
PTA Risk
Based on 1025 resolved cases by this examiner. Grant probability derived from career allow rate.

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