DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 01/02/2026 has been entered.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
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Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-5 and 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang et al. (US 2021/0012706 A1; hereinafter, “Yang”) in view Bang et al. (US 2020/0168685 A1; hereinafter, “Bang”, which is a prior art of record).
Regarding claim 1:
Yang discloses (in Figs. 1, 3 and 15) a display apparatus comprising:
a display panel 001 (Fig. 15 and [0077]) including a first area A1 [0029] (also see “First area” in Exhibit A above) in which a first display element 111 [0030] and a first pixel circuit 12 [0030] are arranged, a second area A22 [0045] (also see “Second area” in Exhibit A) in which a second display element 211 [0031] is arranged, and a peripheral area (see “Peripheral area” in Exhibit A, wherein the peripheral area is all areas not enclosed by either the “First area” or the “Second area”, i.e., the region A21 sandwiched between the “First area” and the “Second area” is part of the peripheral area) in which a pixel circuit unit 22 [0035] (Fig. 3) including a second pixel circuit 22b [0035] connected to the second display element 211 (i.e., “211” within “A22” in Fig. 3) is arranged; and
a component 002 (Fig. 15 and [0077]) arranged below the display panel to correspond to the second area A22, wherein the display panel includes: substrate
a substrate (inherent to the display panel);
Yang does not disclose all elements necessary for a complete, functional display apparatus; accordingly, Yang does not disclose the strikethrough limitations above.
Bang teaches (in Figs.1 and 3-5) a display apparatus comprising the following elements:
an organic insulating layer 121/122 (Fig. 3 and [0069]) that is arranged between a first display element OLED (Fig. 3) and the first pixel circuit TR (Fig. 3), and extends to a peripheral area PA1/PA2 (Fig. 3 and [0037]); and
a valley portion VA (Figs. 1, 3 and [063]) that is provided as an opening formed in the organic insulating layer 121/122 (Fig. 3) in the peripheral area PA1/PA2,
wherein the valley portion VA includes a first valley (see “First valley” in Exhibits A and B above) and a second valley (see “Second valley” in Exhibits A and B) that are spaced apart from each other.
Bang discloses the elements provide a display apparatus wherein outside air, such as moisture or oxygen, is prevented from penetrating into the display area DA [0064].
It would have been obvious to one of ordinary skill in the art to incorporate, into Yang, the elements taught by Bang, because Yang does not disclose a complete device and Bang teaches elements that are well suited for a complete display apparatus, and the elements would protect the display by preventing moisture from penetrating into the display area. Furthermore, when Yang is modified as taught by Bang (See Exhibit B), the first valley is disposed on one side of the pixel circuit unit and the second valley is disposed on the other side of the pixel circuit unit in a plan view (i.e., in Exhibit B, the vertical broken line represents the location of the pixel circuit unit in referenced to the first and second valleys).
Regarding claims 2-5 and 7:
re claim 2, Bang discloses a dam portion DM1 (Figs. 1, 5 and [0053]) that is arranged in the peripheral area PA1/PA2, and protrudes from an upper surface of a substrate (Fig. 5),
wherein the valley portion VA (Fig. 1) is arranged between the first area DA and the dam portion DM1 (in Fig. 1, a line drawn from the upper left-hand corner of “DA” to the upper left-hand corner of “DM1” will pass through “VA”);
re claim 3, Bang discloses an inner dam DM1 (Figs. 1 and 5) at least partially overlapping a second pixel circuit GM (Fig. 5), wherein the inner dam is arranged on the organic insulating layer 121/122;
re claim 4, Bang further discloses:
a dam portion DM2 (Fig. 1) arranged outside of the valley portion VA;
a fan-out line SM1 (Fig. 5 and [0089]) overlapping the dam portion DM2; and
a bridge line SM2 (Fig. 5 and [0089]) that is arranged on a different layer from a layer on which the fan-out line SM1 is arranged, and connects the fan-out line SM1 to the second pixel circuit (i.e., SM1 is part of VL1 [0089], and VL1 transmits ELVDD to the pixel circuits [0051]);
re claim 5, Bang discloses a e.g., one of the OLEDs in the display, Fig. 3) to the second pixel circuit GM (Fig. 5),
wherein the organic insulating layer 121/122 (Fig. 5) is provided by stacking a first organic insulating layer 121 and a second organic insulating layer 122, and the
re claim 7, Yang discloses the component 002 includes an imaging device (Fig. 15 and [0077]).
Therefore, Yang (in view Bang) renders claims 2-5 and 7 obvious.
Claims 6 and 8-25 are rejected under 35 U.S.C. 103 as being unpatentable over Yang in view Bang and Kim et al. (US 2018/0005568 A1; hereinafter, “Kim”).
Regarding claim 6:
Yang (in view of Bang) renders claim 1 obvious, and Bang further discloses:
an [buffer] insulating layer 111 (Fig. 5) disposed between the substrate 110 and the organic insulating layer 121/122,
Bang does not disclose the strike-through limitations above. However, Kim teaches a display comprising a bendable portion, wherein a bending are BA (Fig. 4 and [0047]) is formed by incorporating an inorganic buffer layer BF (Fig. 4 and [0060]), wherein an opening OPN (Fig. 4 and [0112]) corresponding to a second area is defined in the inorganic insulating layer BF, the opening OPN being filled with an organic insulating layer INS_B (Fig. 4 and [0113]).
It would have been obvious to one of ordinary skill in the art to modify Yang (in view Bang) by incorporating a bending area, as taught by Kim, because the modification could provide a bendable display apparatus; and when Kim’s bending area is incorporated, it would have been obvious to fill the opening with Bang’s organic layer 121 (see Bang Fig. 5) in order to reduce cost by using the same material.
Regarding claim 8:
Yang discloses a display panel 001 [0077] (in Figs. 1, 3 and 15) comprising:
a substrate (inherent to the display panel) including a display area A1/A22 [0029, 0045] in which an image is generated, and a peripheral area (see “Peripheral area” in Exhibit A, wherein the peripheral area includes A21 and all regions outside of A1 and A22) arranged in a vicinity of the display area A1/A22;
a first display element 111 [0030] arranged in a first area A1 of the display area A1/A22, and a first pixel circuit 12 [0030] connected to the first display element 111;
a second display element 211 [0031] arranged in a second area A22 of the display area;
a pixel circuit unit 22 [0035] in which a second pixel circuit 22b [0035] connected to the second display element 211 (i.e., “211” within “A22” in Fig. 3) in the peripheral area is arranged;
Yang does not explicitly disclose a scan driving circuit arranged in the peripheral area and connected to at least the first pixel circuit; however, it is noted Yang discloses scan wires SL (Figs. 3-5 and [0048-0049]) connected to at least the first pixel circuit 12 (Figs. 3-4).
Kim is cited to show, in a device similar to that of Yang, a scan driver may be incorporated at various peripheral areas of a display panel [0043-0044], wherein a scan driver (or scan driving circuit) is necessary to provide scan signals on scan wires (similar to Yang’s scan wires SL).
Furthermore, Yang does not disclose all elements necessary for a complete, functional display apparatus; accordingly, Yang does not disclose the additional strikethrough limitations above.
Bang teaches (in Figs.1 and 3-5) a display apparatus comprising the following elements:
an organic insulating layer 121/122 (Fig. 3 and [0069]) that is arranged between a first display element OLED (Fig. 3) and the first pixel circuit TR (Fig. 3), and extends to a peripheral area PA1/PA2 (Fig. 3 and [0037]); and
a valley portion VA (Figs. 1, 3 and [063]) that is provided as an opening formed in the organic insulating layer 121/122 (Fig. 3) in the peripheral area PA1/PA2, and at least partially surrounds a first area DA in a plan view (Figs. 1, 3 and [0037]),
wherein the valley portion VA includes a first valley (see “VA” on the left side of the display in Fig. 1) and a second valley (see “VA” on the right side of the display in Fig. 1) that are spaced apart from each other with respect to a pixel circuit unit therebetween (e.g., region “A” in Figs. 1 and 4 includes a pixel circuit unit GM/SM1/SM2 [0089 and 0101]).
Bang discloses the elements provide a display apparatus wherein outside air, such as moisture or oxygen, is prevented from penetrating into the display area DA [0064].
It would have been obvious to one of ordinary skill in the art to incorporate, into Yang, a scan driver circuit to provide scan signals to the scan wires, because Kim shows such a scan driver would be necessary for a functional display device. Furthermore, since Yang does not disclose all elements necessary for a complete, functional display apparatus, it would have been obvious to one of ordinary skill in the art to incorporate elements as taught by Bang, because the elements are well suited for a complete display apparatus, and the elements would protect the display by preventing moisture from penetrating into the display area. Furthermore, when Yang is modified as taught by Kim and Bang (See Exhibit B), the first valley is disposed on one side of the pixel circuit unit and the second valley is disposed on the other side of the pixel circuit unit in a plan view (i.e., in Exhibit B, the vertical broken line represents the location of the pixel circuit unit in referenced to the first and second valleys), and when a valley portion is incorporated into Yang, it would have been further obvious for the valley portion to at least partially surround the scan driving circuit in a plan view because the valley portion would further protect the scan driving circuit from moisture.
Regarding claims 9-20:
re claim 9, Bang discloses a dam portion DM1/DM2/DM3 (Figs. 1, 5 and [0053]) that is arranged in the peripheral area PA1/PA2, and protrudes from an upper surface of a substrate (Fig. 5),
wherein the valley portion VA (Fig. 1) is arranged between the first area DA and the dam portion DM1 (in Fig. 1, a line drawn from the upper left-hand corner of “DA” to the upper left-hand corner of “DM1” will pass through “VA”);
re claim 10, Bang discloses a common voltage driving line VL1 (Figs. 1, 5 and [0051]) that is arranged in the peripheral area PA1/PA2, and at least partially surrounds the display area DA,
wherein the dam portion DM1/DM2/DM3 includes a first dam DM2 (Fig. 5) overlapping the common voltage driving line VL1 (Fig. 5);
re claim 11, Bang discloses the common voltage driving line VL1 (Fig. 5) includes a first common voltage driving line (VL1 on the left-hand side of Fig. 1) and a second common voltage driving line (VL1 on the right-hand side of Fig. 1) that are spaced apart from each other with respect to the pixel circuit unit therebetween (e.g., region “A” in Figs. 1, 4 and 5 includes a pixel circuit unit GM/SM1/SM2 [0089 and 0101]);
re claim 12, Bang discloses a driving voltage supply line VL2 (Figs. 1, 5 and [0051]) that is arranged between the first common voltage driving line (VL1 on the left-hand side of Fig. 1) and the second common voltage driving line (VL1 on the right-hand side of Fig. 1) at one side of the pixel circuit unit (e.g., in region “A” in Figs. 1 and 4);
re claim 13, Bang discloses the first dam DM2 (Fig. 1) is arranged to cover one edge of the driving voltage supply line VL2 (i.e., in Fig. 1, “DM2” covers at least one edge of “VL2”);
re claim 14, Bang discloses the dam portion DM1/DM2/DM3 (Figs. 1 and 5) includes a second dam DM1 spaced apart from the first dam DM2, and the second dam DM1 is arranged to cover an edge of the common voltage driving line VL1 (i.e., in Fig. 1, “DM1” covers at least one edge of “VL1”);
re claim 15, Bang discloses the dam portion DM1/DM2/DM3 comprises a third dam DM3 (Figs. 1 and 5) outside of the second dam DM1, and a height [from a bottom surface] of the third dam DM3 [to a top surface of substrate “10”] is less than a height [from a bottom surface] of the second dam DM1[to a top surface of substrate “10”];
re claim 16, Bang discloses the organic insulating layer 121/122 (Fig. 5) is provided by stacking a first organic insulating layer 121 and a second organic insulating layer 122, and the pixel circuit unit GM/SM1/SM2 includes a line SM2 (Fig. 5) disposed between the first organic insulating layer 121 and the second organic insulating layer 122;
re claim 17, Bang discloses an inner dam DM1/DM2 (Fig. 5) at least partially overlapping the pixel circuit unit GM/SM1/SM2, wherein the inner dam is arranged on the organic insulating layer 121/122;
re claim 18, Bang discloses a fan-out line SM1 (Fig. 5 and [0089]) overlapping the dam portion DM1/DM2/DM3;
a bridge line SM2 (Fig. 5 and [0089]) that is arranged on a different layer from a layer on which the fan-out line is arranged, and connects the fan-out line SM1 to the second pixel circuit (i.e., SM1 is part of VL1 [0089], and VL1 transmits ELVDD to the pixel circuits [0051]); and
re claim 19, Bang discloses a e.g., one of the OLEDs in the display, Fig. 3) to the second pixel circuit GM (Fig. 5),
wherein the organic insulating layer 121/122 (Fig. 5) is provided by stacking a first organic insulating layer 121 and a second organic insulating layer 122, and the
re claim 20, Bang discloses an [buffer] insulating layer 111 (Fig. 5) disposed between the substrate 110 and the organic insulating layer 121/122, and
Kim discloses a bendable portion in a display panel, wherein a bending area BA (Fig. 4 and [0047]) is formed by incorporating an inorganic buffer layer BF (Fig. 4 and [0060]), wherein an opening OPN (Fig. 4 and [0112]) corresponding to a second area is defined in the inorganic insulating layer BF, the opening OPN being filled with an organic insulating layer INS_B (Fig. 4 and [0113]);
Accordingly, it would have been obvious to incorporate a bending area, as taught by Kim, because the modification could provide a bendable display apparatus; and when Kim’s bending area is incorporated, it would have been obvious to fill the opening with Bang’s organic layer 121 (see Bang Fig. 5) in order to reduce cost by using the same material.
Therefore, Yang (in view of Bang and Kim) renders claims 9-20 obvious.
Regarding claim 21:
Yang discloses a display panel 001 [0077] (Figs. 1, 3 and 15) comprising:
a substrate (inherent to the display panel) including a display area A1/A22 [0029, 0045] in which an image is implemented, and a peripheral (see “Peripheral area” in Exhibit A, wherein the peripheral area includes A21 and all regions outside of A1 and A22) arranged in a vicinity of the display area A1/A22;
a first display element 111 [0030] arranged in a first area A1 of the display area A1/A22, and a first pixel circuit 12 [0030] connected to the first display element 111;
a second display element 211 [0031] arranged in a second area A22 of the display area;
a pixel circuit unit 22 [0035] which is arranged in the peripheral area A21, and in which a second pixel circuit 22b [0035] connected to the second display element 211 (i.e., “211” within “A22” in Fig. 3) is arranged;
Yang does not explicitly disclose a scan driving circuit arranged in the peripheral area and connected to at least the first pixel circuit; however, it is noted Yang discloses scan wires SL (Figs. 3-5 and [0048-0049]) connected to at least the first pixel circuit 12 (Figs. 3-4).
Kim is cited to show, in a device similar to that of Yang, a scan driver may be incorporated at various peripheral areas of a display panel [0043-0044], wherein a scan driver (or scan driving circuit) is necessary to provide scan signals on scan wires (similar to Yang’s scan wires SL).
Furthermore, Yang does not disclose all elements necessary for a complete, functional display apparatus; accordingly, Yang does not disclose the additional strikethrough limitations above.
Bang teaches (in Figs.1 and 3-5) a display apparatus comprising the following elements:
an organic insulating layer 121/122 (Fig. 3 and [0069]) that is arranged between a first display element OLED (Fig. 3) and the first pixel circuit TR (Fig. 3), and extends to a peripheral area PA1/PA2 (Fig. 3 and [0037]);
a dam portion DM1/DM2/DM3 (Figs. 1, 5 and [0053]) that is arranged in a peripheral area PA1/PA2, and protrudes from an upper surface of the substrate (Fig. 5); and
a valley portion VA (Figs. 1, 3 and [063]) provided as an opening of the organic insulating layer 121/122 (Fig. 3) disposed between an edge (e.g., top left-hand corner edge in Fig. 1) of a display area DA and the dam portion DM1/DM2/DM3 in the peripheral area PA1/PA2 (e.g., in Fig. 1, a line drawn from the upper left-hand corner of “DA” to the upper left-hand corner of “DM1” will pass through “VA”),
Bang discloses the elements provide a display apparatus wherein outside air, such as moisture or oxygen, is prevented from penetrating into the display area DA [0064].
It would have been obvious to one of ordinary skill in the art to incorporate, into Yang, a scan driver circuit to provide scan signals to the scan wires, because Kim shows such a scan driver would be necessary for a functional display device. Furthermore, since Yang does not disclose all elements necessary for a complete, functional display apparatus, it would have been obvious to one of ordinary skill in the art to incorporate elements as taught by Bang, because the elements are well suited for a complete display apparatus, and the elements would protect the display by preventing moisture from penetrating into the display area. Furthermore, when Yang is modified as taught by Kim and Bang (See Exhibit B), the first valley is disposed on one side of the pixel circuit unit and the second valley is disposed on the other side of the pixel circuit unit in a plan view (i.e., in Exhibit B, the vertical broken line represents the location of the pixel circuit unit in referenced to the first and second valleys), and when a valley portion is incorporated into Yang, it would have been further obvious for the valley portion to extend between the scan driving circuit and the dam portion because it would allow the scan driving circuit (scan driver) to be formed on a separate chip and disposed on the substrate by chip-on-glass technology on an opposite side of a bendable display (as shown/taught by Kim, Figs. 1-2 and [0043-0044]).
Regarding claims 22-25:
re claim 22, Bang discloses a common voltage driving line VL1 (Figs. 1, 5 and [0051]) that is arranged in the peripheral area PA1/PA2, and at least partially surrounds the display area DA,
wherein the dam portion DM1/DM2/DM3 includes a first dam DM2 (Fig. 5) overlapping the common voltage driving line VL1 (Fig. 5);
re claim 23, Bang discloses the common voltage driving line VL1 (Fig. 5) includes a first common voltage driving line (VL1 on the left-hand side of Fig. 1) and a second common voltage driving line (VL1 on the right-hand side of Fig. 1) that are spaced apart from each other with respect to the pixel circuit unit therebetween (e.g., region “A” in Figs. 1, 4 and 5 includes a pixel circuit unit GM/SM1/SM2 [0089 and 0101]);
re claim 24, Bang discloses a driving voltage supply line VL2 (Figs. 1, 5 and [0051]) that is arranged between the first common voltage driving line (VL1 on the left-hand side of Fig. 1) and the second common voltage driving line (VL1 on the right-hand side of Fig. 1) at one side of the pixel circuit unit (e.g., in region “A” in Figs. 1 and 4); and
re claim 25, Bang discloses the first dam DM2 (Fig. 1) is arranged to cover one edge of the driving voltage supply line VL2 (i.e., in Fig. 1, “DM2” covers at least one edge of “VL2”).
Therefore, Yang (in view of Bang and Kim) renders claims 22-25 obvious.
Remarks
Applicant’s remarks have been fully considered, but they are moot in view of the new grounds of rejections.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LEX H MALSAWMA whose telephone number is (571)272-1903. The examiner can normally be reached M-F (4-12 Hours, between 5:30AM-10PM).
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/LEX H MALSAWMA/Primary Examiner, Art Unit 2892