Prosecution Insights
Last updated: May 29, 2026
Application No. 17/708,348

SUBSTRATE TRENCH FOR CONTROLLING UNDERFILL FILLET AREA AND METHODS OF FORMING THE SAME

Non-Final OA §112
Filed
Mar 30, 2022
Examiner
DINKE, BITEW A
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Limited
OA Round
6 (Non-Final)
73%
Grant Probability
Favorable
6-7
OA Rounds
0m
Est. Remaining
84%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
555 granted / 764 resolved
+4.6% vs TC avg
Moderate +12% lift
Without
With
+11.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
27 currently pending
Career history
803
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
91.5%
+51.5% vs TC avg
§102
3.1%
-36.9% vs TC avg
§112
1.7%
-38.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 764 resolved cases

Office Action

§112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments filed on 02/19/2026 have been fully considered but they are not persuasive. See the 35 U.S.C. 112(a) rejection as shown below: Specification The specification is objected to as failing to provide proper antecedent basis for the claimed subject matter. See 37 CFR 1.75(d)(1) and MPEP § 608.01(o). Correction of the following is required: Claims 1, 3, 14, and 17 recites the limitation “width of substrate trench” and “width of the chip-side insulating layer” The particular “width of substrate trench” and “width of the chip-side insulating layer” are indefinite because the “width of substrate trench” and the “width of the chip-side insulating layer” are not used or defined in the specification. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claim 1 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim 1 recites the limitation of “at least one substrate trench has a width greater than a width of the chip-side insulating layer between the at least one substrate trench and an outer sidewall of the substrate package” in lines 10-12, but there is no support for the limitation of “at least one substrate trench has a width greater than a width of the chip-side insulating layer between the at least one substrate trench and an outer sidewall of the substrate package.” For example, what is the width of substrate trench and what is the width of the chip-side insulating layer between the at least one substrate trench and an outer sidewall of the substrate package in the specification. In other worlds, the disclosure gave no indication that the drawings were drawn to scale. Note: drawings do not define the precise proportions of the elements and may not be relied on to show particular sizes if the specification is completely silent on the issue. Claims 2-13 are rejected as if depending on rejected claim 1. Claim 3 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim 3 recites the limitation of “width of the at least one substrate trench is greater than twice the width of the chip-side insulating layer between the at least one substrate trench and the outer sidewall of the substrate package” in lines 4-6, but there is no support for the limitation of “width of the at least one substrate trench is greater than twice the width of the chip-side insulating layer between the at least one substrate trench and the outer sidewall of the substrate package.” For example, what is the width of substrate trench and what is the width of the chip-side insulating layer between the at least one substrate trench and the outer sidewall of the substrate package in the specification. In other worlds, the disclosure gave no indication that the drawings were drawn to scale. Note: drawings do not define the precise proportions of the elements and may not be relied on to show particular sizes if the specification is completely silent on the issue. Claim 14 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim 14 recites the limitation of “at least one substrate trench has a width greater than a width of the chip-side insulating layers between the at least one substrate trench and an outer sidewall of the substrate package” in lines 13-15, but there is no support for the limitation of “at least one substrate trench has a width greater than a width of the chip-side insulating layers between the at least one substrate trench and an outer sidewall of the substrate package.” For example, what is the width of substrate trench and what is the width of the chip-side insulating layers between the at least one substrate trench and an outer sidewall of the substrate package in the specification. In other worlds, the disclosure gave no indication that the drawings were drawn to scale. Note: drawings do not define the precise proportions of the elements and may not be relied on to show particular sizes if the specification is completely silent on the issue. Claims 15-16 are rejected as if depending on rejected claim 14. Claim 17 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim 17 recites the limitation of “at least one substrate trench has a width greater than a width of the chip-side insulating layer between the at least one substrate trench and an outer sidewall of the substrate package” in lines 8-10, but there is no support for the limitation of “at least one substrate trench has a width greater than a width of the chip-side insulating layer between the at least one substrate trench and an outer sidewall of the substrate package.” For example, what is the width of substrate trench and what is the width of the chip-side insulating layer between the at least one substrate trench and an outer sidewall of the substrate package in the specification. In other worlds, the disclosure gave no indication that the drawings were drawn to scale. Note: drawings do not define the precise proportions of the elements and may not be relied on to show particular sizes if the specification is completely silent on the issue. Claims 18-20 are rejected as if depending on rejected claim 17. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to BITEW A DINKE whose telephone number is (571)272-0534. The examiner can normally be reached M-F 7 a.m. - 5 p.m.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at (571)272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BITEW A DINKE/Primary Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Show 13 earlier events
Nov 14, 2025
Non-Final Rejection mailed — §112
Jan 29, 2026
Examiner Interview Summary
Jan 29, 2026
Applicant Interview (Telephonic)
Feb 19, 2026
Response Filed
Mar 11, 2026
Final Rejection mailed — §112
Apr 15, 2026
Examiner Interview Summary
Apr 15, 2026
Applicant Interview (Telephonic)
May 18, 2026
Response after Non-Final Action

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12641899
COLOR SEPARATION ELEMENT AND IMAGE SENSOR INCLUDING THE SAME
3y 1m to grant Granted May 26, 2026
Patent 12641954
MEASURING METHOD AND MEASURING DEVICE
2y 8m to grant Granted May 26, 2026
Patent 12633258
DISPLAY DEVICE
2y 11m to grant Granted May 19, 2026
Patent 12622031
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE
4y 0m to grant Granted May 05, 2026
Patent 12622057
DISPLAY SUBSTRATE AND MANUFACTURE METHOD THEREOF, DISPLAY APPARATUS
4y 1m to grant Granted May 05, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

6-7
Expected OA Rounds
73%
Grant Probability
84%
With Interview (+11.8%)
2y 3m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 764 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month