DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on July 13, 2026 has been entered. Claims 1, 5, 6, 8, 9, 11, 12, and 21 have been amended.
Claims 1-15, 17, and 21-24 are currently pending.
Response to Arguments
Applicant’s arguments filed July 13, 2026, with respect to the rejection(s) of claim(s) 1-15, 17, and 21-24 under 35 U.S.C. 103 have been fully considered and are persuasive in view of Applicant’s amendments. Therefore, the rejections set forth in the previous Office Action filed April 13, 2026 have been withdrawn. Specifically, as Applicant persuasively argues on pages 9-10, the prior art of record does not disclose, teach, or suggest the feature of "moving the semiconductor die and the collector element between two locations to the location underneath a bonder element" as required by amended claims 1, 11, and 21. However, upon further consideration, a new ground(s) of rejection is made in view of Maeda, US 2010 / 0089980 A1 (hereinafter Maeda).
Applicant correctly notes on page 10 that, in Woo, the bond head 302 (being interpreted as the claimed bonder element by the Examiner) moves rather than the flip head 308 (being interpreted as the claimed collector element by the Examiner), which is fixed. Woo teaches moving the bond head 302 [the bonder element] from a first location to a second location above the semiconductor die and flip head collet 310 [the collector element] based on the alignment check (Woo, [0027; 0055]), the flip head collet 310 [the collector element] taught by Woo is fixed in position and does not move, except for inverting 180 degrees (Woo, [0027]).
However, as explained in the rejection of claims below, a bonding apparatus with movable collector element and movable bonder element was known in the art before the effective filing date of the claimed invention. For example, Maeda teaches a flip chip bonding apparatus with a bonding control unit configured to drive the pick-up head 62 of the semiconductor die pickup unit 60 [analogous to the collector element] in X, Y, and upward and downward directions to a transfer position, where the semiconductor die 12 is transferred to the bonding tool 54 [analogous to the bonder element], based on a position signal from a position detector and instructions from the bonding control unit 502 (Maeda, FIGs. 1-3, [0050-0060; 0073]).
Applicant argues on pages 10-11 that Woo teaches away from the claimed invention. This argument is not persuasive because although Woo is silent regarding a moveable collector element, Woo is also silent regarding any advantages of moving the semiconductor die to the handover position by moving only the bonder element while keeping the collector element stationary. Applicant has not provided any examples supporting the assertion that Woo teaches away from the claimed invention.
In response to Applicant’s argument on page 11 that the dependent claims are patentably distinct over the prior art, and are also allowable based at least on their dependency from the independent claims 1, 11, and 21, as amended, see the rejections of the claims below.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, and 5-9 are rejected under 35 U.S.C. 103 as being unpatentable over Woo et al., US 2018/0126718 A1 (hereinafter Woo) in view of Maki et al., US 2008/0318346 A1 (hereinafter Maki) in view of Choi et al., WO 2015/072593 A1 (hereinafter Choi) and further in view of Maeda, US 2010 / 0089980 A1 (hereinafter Maeda).
Regarding claim 1, as amended, Woo, in the same field of endeavor, teaches: a flip-chip bonding method, comprising: in a flip-chip bonding apparatus (Woo, FIG. 3, bonding apparatus 300, [0027]), providing a wafer with multiple semiconductor dies (Woo, FIG. 1, dies 110 shown on wafer 112) (Woo, FIG. 3, flip head collet 310, [0041]); flip-chipping the semiconductor die with the collector element (Woo, FIG. 3, flip head collet 310 inverted after retrieving die from wafer, [0041]); performing an alignment check to the semiconductor die to determine a first misalignment between a center of the collector element and a center of the semiconductor die resulting from the die shift (Woo, to compensate for picking errors, i.e., from the die shift, offset [the first misalignment] of the center of electrical component [the semiconductor die] relative to the center of flip head 308 [the collector element] is determined, [0055]), (Woo, FIG. 3, electrical component [the semiconductor die] transferred from flip head collet 310 [the collector element] to bond head collet 304 [the bonder element], [0041]); and bonding the semiconductor die to a carrier by the bonder element (Woo, “When the bond head 302 is at the alignment position, the electrical component [the semiconductor die] is transferred from the bond head collet 304 [the bonder element] onto the bonding pad 606 [the carrier] and is then bonded to the bonding pad 606,” [0051]).
Woo does not explicitly teach: wherein the alignment check comprises detection of an intensity of light reflection of an alignment mark on the semiconductor die when the semiconductor die is on the collector element. However, Woo teaches determining the offset of the center of the electrical component [the die] relative to the center of the flip head [the collector element] by analyzing an image [i.e., detection of an intensity of light reflection], see para [0055]. Although Woo is silent regarding an alignment mark on the semiconductor die, Applicant’s definition of an alignment mark is sufficiently broad so as to encompass the use of the center of the die as an alignment mark (see paragraphs 030, 038, and 046 of Applicant’s specification, stating “the edge or border of the semiconductor die 200 functions as the alignment mark for the semiconductor die 200,” it would have been obvious to a person having ordinary skill in the art that the use of the center of the die as an alignment mark, as taught by Woo, is referenced from the edge or border of the die).
Although Woo teaches providing a wafer with multiple semiconductor dies, Woo is silent regarding providing the multiple semiconductor dies on an adhesive film held by a frame element; lifting a semiconductor die up from the wafer by an ejector element resulting in a die shift of the semiconductor die.
However, Maki, in the same field of endeavor, teaches: providing a wafer with multiple semiconductor dies (Maki, FIGs. 5-7, wafer 1A shown with multiple chips 1) on an adhesive film held by a frame element (Maki, FIGs. 3-7, dicing tape 4 [the adhesive film] held by wafer ring 5 [the frame element], [0408]); lifting a semiconductor die up from the wafer by an ejector element (Maki, FIG. 30 shows block 110c of chucking piece 102 [the ejector element] lifting up chip 1 [the semiconductor die] from wafer arranged on dicing tape 4).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Woo with the multiple semiconductor dies on an adhesive film held by a frame element; lifting a semiconductor die up from the wafer by an ejector element as taught by Maki, arriving at Applicant’s claimed invention with predictable results and without undue experimentation. The motivation for doing so would be, as expressly recognized by Maki, to apply tension to the adhesive film by means of the frame element, thereby improving peeling of the chip from the dicing tape when the chucking piece [ejector element] pushes up on the die, resulting in faster manufacturing speed.
Although Woo in view of Maki teaches lifting a semiconductor die up from the wafer by an ejector element, Woo and Maki are silent regarding this process resulting in a die shift of the semiconductor die.
However, Choi, in the same field of endeavor, teaches “performing a misalignment [a die shift]… between a chip ejected from a wafer [the semiconductor die] and a needle unit of an ejector [the ejector element] before picking up the chip [lifting the semiconductor die],” (Choi, see Abstract). Choi teaches that misalignment [die shift] between the chip [the semiconductor die] and the needle [the ejector element] can prevent damage to the chip during the pickup operation (Choi, see FIG. 3 and associated text). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Woo in view of Maki with the teachings of Choi, arriving at Applicant’s claimed invention with predictable results and without undue experimentation. The motivation for doing so would be, as expressly recognized by Choi, to avoid damage to the chip during the pickup operation, thereby improving manufacturing throughput and device reliability.
Although Woo teaches the advantages of positioning the semiconductor die at an accurate handover position to ensure quality die bonding (Woo, [0002-0004]), Woo does so by performing an alignment check and then moving the position of the bond head 302 [the bonder element] from a first location to a second location above the semiconductor die and flip head collet 310 [the collector element] based on the alignment check (Woo, [0027; 0055]); the flip head collet 310 [the collector element] taught by Woo is fixed in position and does not move, except for inverting 180 degrees (Woo, [0027]). Woo is silent regarding moving the semiconductor die and the collector element from a first location to a second location based on the first misalignment of the alignment check, wherein the second location is a location underneath a bonder element.
However, Maeda, in the same field of endeavor teaches a flip chip bonding apparatus with a bonding control unit configured to drive the pick-up head 62 of the semiconductor die pickup unit 60 [analogous to the collector element] in X, Y, and upward and downward directions to a transfer position, where the semiconductor die 12 is transferred to the bonding tool 54 [analogous to the bonder element] at a handover position based on a position signal from a position detector and instructions from the bonding control unit 502 (Maeda, FIGs. 1-3, [0050-0060; 0073]).
A person having ordinary skill in the art before the effective filing date of the claimed invention would have recognized that achieving an accurate alignment of each of the collector element, semiconductor die, and bonder element at the handover position could be accomplished in only a limited number of ways, for example, by either moving the bonder element to a transfer position prior to handover, as taught by Woo, or by moving the collector element and die together to a transfer position before handover, as taught by Maeda. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Woo in view of Maki in view of Choi with the moveable semiconductor die pickup unit of Maeda, arriving at Applicant’s claimed invention with predictable results and without undue experimentation. The motivation for doing so would be, as recognized by Maeda, to allow for movement of each of the bonding tool 54 [the bonder element] and the pick-up tool 64 [the collector element] so that the semiconductor die 12 can be efficiently transferred in a simple and easy way, thereby improving manufacturing throughput.
Regarding claim 2, Woo in view of Maki in view of Choi and further in view of Maeda teaches: The method of claim 1, wherein the moving process of the semiconductor die and the collector element is optimized (Woo, FIG. 4, steps 420, 422, [0055-0056]; “By repeating these sub-steps on every electrical component, a runtime update of the handover position can be achieved to compensate for the picking errors,” [0055]) until a center of the bonder element is substantially aligned with the center of the semiconductor die (Woo, “bond head 302 is then moved to a position at which the center of the bond head collet 304 [the bonder element] is aligned with the center of the electrical component [the semiconductor die],” [0055]; see also [0044], i.e. the moving process of the semiconductor die and the collector element is optimized until a center of the bonder element is substantially aligned with the center of the semiconductor die).
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Woo in view of Maki in view of Choi and further in view of Maeda and further in view of Chao et al., US 2017/0256501 A1 (hereinafter Chao).
Regarding claim 3, Woo in view of Maki in view of Choi and further in view of Maeda teaches every element of claim 3 except: wherein the alignment check comprises detection of the intensity of light reflection of the alignment mark on the semiconductor die by an optical microscope.
However, Chao, in the same field of endeavor, teaches the use of an imaging system including an optical microscope to detect contrast, i.e., intensity of light reflection, of alignment marks on a semiconductor die in order to check alignment and compensate for misregistration by transmitting correction values to a pick-and-place tool (Chao, 0047; 0061]).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Woo in view of Maki in view of Choi and further in view of Maeda with the detection of the intensity of light reflection of the alignment mark on the semiconductor die by an optical microscope as taught by Chao, arriving at Applicant’s claimed invention with predictable results and without undue experimentation. The motivation for doing so would be, as expressly recognized by Chao, to measure and correct for misregistration during manufacturing, resulting in higher manufacturing tolerances and improved device reliability.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Woo in view of Maki in view of Choi and further in view of Maeda and further in view of Kinoshita et al., JP2004022995A (hereinafter Kinoshita).
Regarding claim 4, Woo in view of Maki in view of Choi and further in view of Maeda teaches nearly every element of claim 4 but is silent regarding: wherein the bonder element comprises three pieces with curved surfaces and having vacuum channels between the pieces.
However, Kinoshita, in the same field of endeavor, teaches: wherein the bonder element (Kinoshita, FIG. 1, fixture 2, including suction member 6, fixture body 8, and ventilation holes 11, [0023-0025]) comprises three pieces with curved surfaces (Kinoshita, see FIG. 1, “suction member 6 [the bonder element] has a suction surface 9 which is outwardly convex,” [0023]) and having vacuum channels between the pieces (Kinoshita, FIG. 1, ventilation holes 11 shown between the pieces of suction member 6, [0022-0023]).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Woo in view of Maki in view of Choi and further in view of Maeda with the teachings of Kinoshita, arriving at Applicant’s claimed invention with predictable results and without undue experimentation. The motivation for doing so would be, as expressly recognized by Kinoshita, to deform the semiconductor die into a downwardly convex shape during the bonding process, thereby reducing the potential for void formation during the bonding and reflow process, resulting in improved device reliability.
Claims 5-9 are rejected under 35 U.S.C. 103 as being unpatentable over Woo in view of Maki in view of Choi and further in view of Maeda, as applied to claim 1 above.
Regarding claim 5, Woo in view of Maki in view of Choi and further in view of Maeda teaches: The method of claim 1, further comprising, before lifting the semiconductor die up from the wafer by the ejector element (Maki, FIG. 30 shows block 110c of chucking piece 102 [the ejector element] lifting up chip 1 [the semiconductor die] from wafer arranged on dicing tape 4), performing an alignment check to determine a position of the semiconductor die so as to determine a second misalignment between the center of the semiconductor die and a center of the ejector element (Maki, FIG. 68 shows center of die 1a [the semiconductor die] aligned with center of block 110c of chucking piece 102 [the ejector element], [0421]; “alignment is made so that the chip 1 [the semiconductor die] … is positioned centrally of … chucking piece (lower base) 102 [the center of the ejector element,” [0565]).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Woo, Choi, and Maeda with the performing an alignment check to determine a position of the semiconductor die so as to determine a second misalignment between the center of the semiconductor die and a center of the ejector element as taught by Maki, arriving at Applicant’s claimed invention with predictable results and without undue experimentation. The motivation for doing so would be, as expressly recognized by Maki, to peel the chip evenly to avoid causing cracking or chipping of the chip, thereby improving manufacturing yield, device performance and reliability.
Regarding claim 6, Woo in view of Maki in view of Choi and further in view of Maeda teaches: The method of claim 5, further comprising adjusting a position of the frame element or the ejector element if the second misalignment fails the specification or standard (Maki, FIG. 12, “central portion of chucking piece 102 [the ejector element] is moved to the position just under one chip 1 [the semiconductor die]”, [0421]; “alignment is made so that the chip 1 [the semiconductor die] … is positioned centrally of … chucking piece (lower base) 102 [the center of the ejector element,” [0565]; i.e., the position of the ejector element is adjusted if it is not positioned centrally beneath the semiconductor die [i.e., if the second misalignment fails the specification or standard]).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Woo, Choi, and Maeda with the adjusting a position of the frame element or the ejector element if the second misalignment fails the specification or standard as taught by Maki, arriving at Applicant’s claimed invention with predictable results and without undue experimentation. The motivation for doing so would be, as expressly recognized by Maki, to peel the chip evenly to avoid causing cracking or chipping of the chip, thereby improving manufacturing yield, device performance and reliability.
Regarding claim 7, Woo in view of Maki in view of Choi and further in view of Maeda teaches: The method of claim 5, wherein the ejector element comprises lifting pins (Maki, FIG. 9 shows blocks 110b, 110c [lifting pins] of chucking piece 102 [the ejector element], [0415]), and lifting the semiconductor die up by the ejector element comprises moving the lifting pins upwards to push up the semiconductor die (Maki, FIG. 30 shows blocks 110b, 110c [lifting pins] of chucking piece 102 [the ejector element] moving upwards to push up the chip 1 [the semiconductor die] from wafer arranged on dicing tape 4, [0423-0424]).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Woo, Choi, and Maeda with the method of lifting the semiconductor die up by moving the lifting pins upwards to push up the semiconductor die as taught by Maki, arriving at Applicant’s claimed invention with predictable results and without undue experimentation. The motivation for doing so would be, as expressly recognized by Maki, to concentrate a peeling stress on the interface between the chip and the dicing tape by means of blocks 110b, 110c [lifting pins] of chucking piece 102 [the ejector element], thereby improving peeling of the chip from the dicing tape when the chucking piece [ejector element] pushes up on the die, resulting in faster manufacturing speed.
Regarding claim 8, Woo in view of Maki in view of Choi and further in view of Maeda teaches: The method of claim 1, further comprising, before bonding the semiconductor die to the carrier, performing an alignment check to determine a position of the semiconductor die so as to determine a third misalignment between the center of the semiconductor die and the center of the desired region of the carrier (Woo, FIGs. 6(a) – 6(c), determine misalignment between centers of the electrical component [the semiconductor die] and the bonding position [the desired region of the carrier], [0044-0050]; “the bond head 302 is moved to the alignment position at which the center of the bond head collet 304 [the bonder element] is aligned with the center of the bonding position [the desired region of the carrier],” [0051], i.e., the position of the semiconductor die is determined before bonding).
Regarding claim 9, Woo in view of Maki in view of Choi and further in view of Maeda teaches: The method of claim 8, further comprising adjusting a position of the carrier or the bonder element if the third misalignment fails the specification or standard (Woo, FIGs. 6(a) – 6(c), “the bond head 302 is moved [i.e., adjusting the position of the bonder element] to the alignment position at which the center of the bond head collet 304 [the bonder element] is aligned with the center of the bonding position [the desired region of the carrier],” [0051]; “align a position of the bond head collet with a position of the bonding position based on an offset [i.e., a third misalignment] that is determined from the images of the bonding position, bond head collet and reference marker,” [0017]).
Additionally, note that the broadest reasonable interpretation of a method claim having contingent limitations requires only those steps that must be performed and does not include steps that are not required to be performed because the condition(s) precedent are not met. If the claimed invention may be practiced without either the first or second condition happening, then neither step A or B is required by the broadest reasonable interpretation of the claim. Here, the method step B, “adjusting a position of the carrier or the bonder element,” is not required to be performed if step A does not occur, i.e., if the third misalignment passes the specification or standard. See MPEP 2111.04 (II).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Woo in view of Maki in view of Choi and further in view of Maeda and further in view of Kinoshita, as applied to claim 4 above.
Regarding claim 10, Woo in view of Maki in view of Choi and further in view of Maeda teaches nearly every element of claim 10 but is silent regarding: wherein the bonder element has a curved surface.
However, as discussed above regarding claim 4, Kinoshita teaches: wherein the bonder element has a curved surface (Kinoshita, see FIG. 1).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Woo in view of Maki in view of Choi and further in view of Maeda with the teachings of Kinoshita, arriving at Applicant’s claimed invention with predictable results and without undue experimentation. The motivation for the bonder element having a curved surface would be, as expressly recognized by Kinoshita, to deform the semiconductor die into a downwardly convex shape during the bonding process, thereby reducing the potential for void formation during the bonding and reflow process, resulting in improved device reliability.
Claims 11-13 are rejected under 35 U.S.C. 103 as being unpatentable over Woo in view of Choi and further in view of Maeda.
Regarding claim 11, as amended, Woo discloses: A flip-chip bonding method, comprising: in a flip-chip bonding apparatus (Woo, FIG. 3, bonding apparatus 300, [0027]), providing a wafer with multiple semiconductor dies (Woo, FIG. 1, dies 110 shown on wafer 112); (Woo, FIG. 3, flip head collet 310, [0041]) and flip-chipping the semiconductor die by the collector element (Woo, FIG. 3, flip head collet 310 inverted after retrieving die from wafer, [0041]); (Woo, FIG. 3, electrical component [the semiconductor die] transferred from flip head collet 310 [the collector element] to bond head collet 304 [the bonder element], [0041]); and before the moving operation, performing a checking operation to the semiconductor die, so as to determine whether a misalignment is present between the center of the semiconductor die and a center of the collector element resulting from the die shift (Woo, to compensate for picking errors, i.e., the die shift, offset [misalignment] of center of electrical component [the semiconductor die] relative to center of flip head 308 [the collector element] is determined, i.e., performing a checking operation to determine whether a misalignment is present between the center of the semiconductor die and a center of the collector element resulting from the die shift, [0055]),
Woo does not explicitly teach: wherein the checking operation comprises detection of an intensity of light reflection of an alignment mark on the semiconductor die when the semiconductor die is on the collector element. However, Woo teaches determining the offset of the center of the electrical component [the die] relative to the center of the flip head [the collector element] by analyzing an image [i.e., detection of an intensity of light reflection], see para [0055]. Although Woo is silent regarding an alignment mark on the semiconductor die, Applicant’s definition of an alignment mark is sufficiently broad so as to encompass the use of the center of the die as an alignment mark (see paragraphs 030, 038, and 046 of Applicant’s specification, stating “the edge or border of the semiconductor die 200 functions as the alignment mark for the semiconductor die 200,” it would have been obvious to a person having ordinary skill in the art that the use of the center of the die as an alignment mark, as taught by Woo, is referenced from the edge or border of the die).
Although Woo teaches picking the semiconductor die up from the wafer, Woo is silent regarding: lifting a semiconductor die up from the wafer by an ejector element along a Z direction resulting in a die shift of the semiconductor die, such that a lateral offset along a X direction perpendicular to the Z direction is between a center of the ejector element and a center of the semiconductor die.
However, Choi, in the same field of endeavor, teaches “performing a misalignment [a die shift]… between a chip ejected from a wafer [the semiconductor die] and a needle unit of an ejector [the ejector element] before picking up the chip [lifting the semiconductor die],” (Choi, see Abstract). Choi teaches that misalignment [die shift] between the chip [the semiconductor die] and the needle [the ejector element] can prevent damage to the chip during the pickup operation (Choi, see FIG. 3 and associated text, describing lifting a semiconductor die from a wafer by an ejector element along a Z direction resulting in a lateral offset along a X direction between a center of the ejector element and a center of the semiconductor die). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Woo with the teachings of Choi, arriving at Applicant’s claimed lifting a semiconductor die up from the wafer by an ejector element along a Z direction resulting in a die shift of the semiconductor die, such that a lateral offset along a X direction perpendicular to the Z direction is between a center of the ejector element and a center of the semiconductor die with predictable results and without undue experimentation. The motivation for doing so would be, as expressly recognized by Choi, to avoid damage to the chip during the pickup operation, thereby improving manufacturing throughput and device reliability.
Although Woo teaches moving the bond head 302 [the bonder element] from a first location to a second location above the semiconductor die and flip head collet 310 [the collector element] based on the alignment check and adjusting the position of the bond head 302 [the bonder element] to compensate for picking errors (Woo, [0027; 0055]), the flip head collet 310 [the collector element] taught by Woo is fixed in position and does not move, except for inverting 180 degrees (Woo, [0027]). Woo is silent regarding moving the semiconductor die and the collector element from a first location to a second location, wherein the second location is a location underneath a bonder element, and the moving operation is performed based on a result of the checking operation.
However, Maeda, in the same field of endeavor teaches a flip chip bonding apparatus with a bonding control unit configured to drive the pick-up head 62 of the semiconductor die pickup unit 60 [analogous to the collector element] in X, Y, and upward and downward directions to a transfer position, where the semiconductor die 12 is transferred to the bonding tool 54 [analogous to the bonder element], based on a position signal from a position detector and instructions from the bonding control unit 502 (Maeda, FIGs. 1-3, [0050-0060; 0073]).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Woo in view of Choi with the moveable semiconductor die pickup unit of Maeda, arriving at Applicant’s claimed invention with predictable results and without undue experimentation. The motivation for doing so would be, as recognized by Maeda, to allow for movement of each of the bonding tool 54 [the bonder element] and the pick-up tool 64 [the collector element] so that the semiconductor die 12 can be efficiently transferred in a simple and easy way, thereby improving manufacturing throughput.
Regarding claim 12, Woo in view of Choi and further in view of Maeda teaches: The method of claim 11, further comprising, during the moving operation (Woo, FIG. 3, electrical component [the semiconductor die] moved from flip head collet 310 [the collector element] to bond head collet 304 [the bonder element], [0041]; Maeda, FIGs. 1-3, [0050-0060; 0073]), compensating the misalignment if the misalignment is present between the center of the semiconductor die and the center of the collector element (Woo, offset of center of electrical component [the semiconductor die] relative to center of flip head 308 [the collector element] is determined and compensated for, [0055]).
Additionally, note that the broadest reasonable interpretation of a method claim having contingent limitations requires only those steps that must be performed and does not include steps that are not required to be performed because the condition(s) precedent are not met. If the claimed invention may be practiced without either the first or second condition happening, then neither step A or B is required by the broadest reasonable interpretation of the claim. Here, the method step B, “compensating the misalignment,” is not required to be performed if step A does not occur, i.e., if the misalignment is not present between the center of the semiconductor die and the center of the collector element. See MPEP 2111.04 (II).
Regarding claim 13, Woo in view of Choi and further in view of Maeda teaches: The method of claim 11, further comprising bonding the semiconductor die to a carrier by the bonder element (Woo, “When the bond head 302 is at the alignment position, the electrical component [the semiconductor die] is transferred from the bond head collet 304 [the bonder element] onto the bonding pad 606 [the carrier] and is then bonded to the bonding pad 606,” [0051]).
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Woo in view of Choi in view of Maeda and further in view of Chao.
Regarding claim 14, Woo in view of Choi in view of Maeda teaches nearly every element of claim 14 but is silent regarding: wherein the checking operation comprises detection of the intensity of light reflection of the alignment mark on the semiconductor die by an optical microscope.
However, Chao, in the same field of endeavor, teaches the use of an imaging system including an optical microscope to detect contrast, i.e., intensity of light reflection, of alignment marks on a semiconductor die in order to check alignment and compensate for misregistration by transmitting correction values to a pick-and-place tool (Chao, 0047; 0061]).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Woo in view of Choi in view of Maeda with the detection of the intensity of light reflection of the alignment mark on the semiconductor die by an optical microscope as taught by Chao, arriving at Applicant’s claimed invention with predictable results and without undue experimentation. The motivation for doing so would be, as expressly recognized by Chao, to measure and correct for misregistration during manufacturing, resulting in higher manufacturing tolerances and improved device reliability.
Claims 15, 17, 21, 23 and 24 are rejected under 35 U.S.C. 103 as being unpatentable over Woo in view of Choi in view of Maeda and further in view of Kinoshita.
Regarding claim 15, Woo in view of Choi in view of Maeda teaches nearly every element of claim 15 but is silent regarding: wherein the bonder element comprises three pieces with curved surfaces and having vacuum channels between the pieces.
However, Kinoshita, in the same field of endeavor, teaches: wherein the bonder element (Kinoshita, FIG. 1, fixture 2, including suction member 6, fixture body 8, and ventilation holes 11, [0023-0025]) comprises three pieces with curved surfaces (Kinoshita, see FIG. 1, “suction member 6 [the bonder element] has a suction surface 9 which is outwardly convex,” [0023]) and having vacuum channels between the pieces (Kinoshita, FIG. 1, ventilation holes 11 shown between the pieces of suction member 6, [0022-0023]).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Woo in view of Choi in view of Maeda with the teachings of Kinoshita, arriving at Applicant’s claimed invention with predictable results and without undue experimentation. The motivation for doing so would be, as expressly recognized by Kinoshita, to deform the semiconductor die into a downwardly convex shape during the bonding process, thereby reducing the potential for void formation during the bonding and reflow process, resulting in improved device reliability.
Regarding claim 17, Woo in view of Choi in view of Maeda teaches nearly every element of claim 17 but is silent regarding: wherein the bonder element has a curved surface.
However, as discussed above regarding claim 15, Kinoshita teaches: wherein the bonder element has a curved surface (Kinoshita, see FIG. 1).
Regarding claim 21, as amended, Woo teaches: A flip-chip bonding method, comprising: in a flip-chip bonding apparatus (Woo, FIG. 3, bonding apparatus 300, [0027]), (Woo, FIG. 3, flip head collet 310 [the collector element] retrieves die from a wafer, [0041]); flip-chipping the semiconductor die with the collector element (Woo, FIG. 3, flip head collet 310 [the collector element] inverted after retrieving die from wafer, [0041]); performing an alignment check to the semiconductor die, so as to determine whether a misalignment is present between a center of the semiconductor die and a center of the collector element resulting from the die shift (Woo, to compensate for picking errors, i.e., the die shift, offset [i.e., misalignment] of center of electrical component [the semiconductor die] relative to center of flip head 308 [the collector element] is determined, [0055]), (Woo, FIG. 3, electrical component [the semiconductor die] transferred from flip head collet 310 [the collector element] to bond head collet 304 [the bonder element], [0041]); and bonding the semiconductor die to a carrier by the bonder element (Woo, “When the bond head 302 is at the alignment position, the electrical component [the semiconductor die] is transferred from the bond head collet 304 [the bonder element] onto the bonding pad 606 [the carrier] and is then bonded to the bonding pad 606,” [0051]).
Woo does not explicitly teach: wherein the alignment check comprises detection of an intensity of light reflection of an alignment mark on the semiconductor die when the semiconductor die is on the collector element. However, Woo teaches determining the offset of the center of the electrical component [the die] relative to the center of the flip head [the collector element] by analyzing an image [i.e., detection of an intensity of light reflection], see para [0055]. Although Woo is silent regarding an alignment mark on the semiconductor die, Applicant’s definition of an alignment mark is sufficiently broad so as to encompass the use of the center of the die as an alignment mark (see paragraphs 030, 038, and 046 of Applicant’s specification, stating “the edge or border of the semiconductor die 200 functions as the alignment mark for the semiconductor die 200,” it would have been obvious to a person having ordinary skill in the art that the use of the center of the die as an alignment mark, as taught by Woo, is referenced from the edge or border of the die).
Although Woo teaches picking the semiconductor die up with a collector element, Woo is silent regarding: performing a die lifting operation on a semiconductor die by an ejector element resulting in a die shift of the semiconductor die.
However, Choi, in the same field of endeavor, teaches that misalignment is caused by the chip being lifted upward by the needle during ejection, and the movement of the semiconductor die relative to the bonder element is adjusted to correct for this misalignment: “performing a misalignment [a die shift]… between a chip ejected from a wafer [the semiconductor die] and a needle unit of an ejector [the ejector element] before picking up the chip [lifting the semiconductor die],” (Choi, see Abstract). Choi teaches that misalignment [die shift] between the chip [the semiconductor die] and the needle [the ejector element] can prevent damage to the chip during the pickup operation (Choi, see FIG. 3 and associated text). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Woo with the teachings of Choi, arriving at Applicant’s claimed invention with predictable results and without undue experimentation. The motivation for doing so would be, as expressly recognized by Choi, to avoid damage to the chip during the pickup operation, thereby improving manufacturing throughput and device reliability.
Woo in view of Choi is silent regarding: wherein the bonder element has a curved surface.
However, Kinoshita, in the same field of endeavor, teaches: wherein the bonder element (Kinoshita, FIG. 1, fixture 2, including suction member 6, fixture body 8, and ventilation holes 11, [0023-0025]) has a curved surface (Kinoshita, see FIG. 1, “suction member 6 [the bonder element] has a suction surface 9 which is outwardly convex,” [0023]).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Woo in view of Choi with the teachings of Kinoshita, arriving at Applicant’s claimed invention with predictable results and without undue experimentation. The motivation for doing so would be, as expressly recognized by Kinoshita, to deform the semiconductor die into a downwardly convex shape during the bonding process, thereby reducing the potential for void formation during the bonding and reflow process, resulting in improved device reliability.
Although Woo teaches moving the bond head 302 [the bonder element] from a first location to a second location above the semiconductor die and flip head collet 310 [the collector element] based on the alignment check (Woo, [0027; 0055]), the flip head collet 310 [the collector element] taught by Woo is fixed in position and does not move, except for inverting 180 degrees (Woo, [0027]). Woo is silent regarding: moving the semiconductor die and the collector element from a first location to a second location based on a result of the alignment check, wherein the second location is a location underneath a bonder element.
However, Maeda, in the same field of endeavor teaches a flip chip bonding apparatus with a bonding control unit configured to drive the pick-up head 62 of the semiconductor die pickup unit 60 [analogous to the collector element] in X, Y, and upward and downward directions to a transfer position, where the semiconductor die 12 is transferred to the bonding tool 54 [analogous to the bonder element], based on a position signal from a position detector and instructions from the bonding control unit 502 (Maeda, FIGs. 1-3, [0050-0060; 0073]).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Woo in view of Choi in view of Kinoshita with the moveable semiconductor die pickup unit of Maeda, arriving at Applicant’s claimed invention with predictable results and without undue experimentation. The motivation for doing so would be, as recognized by Maeda, to allow for movement of each of the bonding tool 54 [the bonder element] and the pick-up tool 64 [the collector element] so that the semiconductor die 12 can be efficiently transferred in a simple and easy way, thereby improving manufacturing throughput.
Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over Woo in view of Choi in view of Kinoshita in view of Maeda and further in view of Chao.
Regarding claim 22, Woo in view of Choi in view of Kinoshita in view of Maeda teaches nearly every element of claim 22 but is silent regarding: wherein the alignment check comprises detection of the intensity of light reflection of the alignment mark on the semiconductor die by an optical microscope.
However, Chao, in the same field of endeavor, teaches the use of an imaging system including an optical microscope to detect contrast, i.e., intensity of light reflection, of alignment marks on a semiconductor die in order to check alignment and compensate for misregistration by transmitting correction values to a pick-and-place tool (Chao, 0047; 0061]).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Woo in view of Choi in view of Kinoshita in view of Maeda with the detection of the intensity of light reflection of the alignment mark on the semiconductor die by an optical microscope as taught by Chao, arriving at Applicant’s claimed invention with predictable results and without undue experimentation. The motivation for doing so would be, as expressly recognized by Chao, to measure and correct for misregistration during manufacturing, resulting in higher manufacturing tolerances and improved device reliability.
Claims 23 and 24 are rejected under 35 U.S.C. 103 as being unpatentable over Woo in view of Choi in view of Maeda and further in view of Kinoshita.
Regarding claim 23, Woo in view of Choi in view of Maeda and further in view of Kinoshita teaches: The flip-chip bonding method of claim 21, wherein the bonder element (Kinoshita, FIG. 1, fixture 2, including suction member 6, fixture body 8, and ventilation holes 11, [0023-0025]) comprises three pieces with curved surfaces (Kinoshita, see FIG. 1, “suction member 6 [the bonder element] has a suction surface 9 which is outwardly convex,” [0023]) and having vacuum channels between the pieces (Kinoshita, FIG. 1, ventilation holes 11 shown between the pieces of suction member 6, [0022-0023]).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Woo in view of Choi in view of Maeda with the teachings of Kinoshita, arriving at Applicant’s claimed invention with predictable results and without undue experimentation. The motivation for the bonder element comprising three pieces with curved surfaces and having vacuum channels between the pieces would be, as expressly recognized by Kinoshita, to deform the semiconductor die into a downwardly convex shape by vacuum pressure during the bonding process, thereby reducing the potential for void formation during the bonding and reflow process, resulting in improved device reliability.
Regarding claim 24, Woo in view of Choi in view of Maeda and further in view of Kinoshita teaches: The flip-chip bonding method of claim 21, wherein during the moving operation of the semiconductor die and the collector element, a position of the bonder element is adjusted based on the result of the alignment check (Woo, FIG. 4, steps 420, 422, [0055-0056]; “By repeating these sub-steps on every electrical component, a runtime update of the handover position can be achieved to compensate for the picking errors,” [0055]), until a center of the bonder element is substantially aligned with the center of the semiconductor die (Woo, “bond head 302 is then moved to a position at which the center of the bond head collet 304 [the bonder element] is aligned with the center of the electrical component [the semiconductor die],” [0055]; see also [0044]).
Additionally, although Examiner has addressed all claim limitations in the rejections above, note that the broadest reasonable interpretation of a method claim having contingent limitations requires only those steps that must be performed and does not include steps that are not required to be performed because the condition(s) precedent are not met. If the claimed invention may be practiced without either the first or second condition happening, then neither step A or B is required by the broadest reasonable interpretation of the claim. Here, the method step B, “a position of the bonder element is adjusted,” is not required to be performed if step A does not occur, i.e., if the alignment check of claim 21 determines that no misalignment is present between a center of the semiconductor die and a center of the collector element. See MPEP 2111.04 (II).
Conclusion
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/D.L.N./Examiner, Art Unit 2899
/Brent A. Fairbanks/Supervisory Patent Examiner, Art Unit 2899
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