Prosecution Insights
Last updated: April 19, 2026
Application No. 17/740,618

Semiconductor Devices and Methods of Manufacture

Final Rejection §103
Filed
May 10, 2022
Examiner
STARK, JARRETT J
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Co., Ltd.
OA Round
4 (Final)
70%
Grant Probability
Favorable
5-6
OA Rounds
2y 8m
To Grant
82%
With Interview

Examiner Intelligence

Grants 70% — above average
70%
Career Allow Rate
889 granted / 1266 resolved
+2.2% vs TC avg
Moderate +12% lift
Without
With
+11.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
59 currently pending
Career history
1325
Total Applications
across all art units

Statute-Specific Performance

§101
2.7%
-37.3% vs TC avg
§103
61.4%
+21.4% vs TC avg
§102
15.7%
-24.3% vs TC avg
§112
10.9%
-29.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1266 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 10/27/2025 has been entered. Prior Art of Record The applicant's attention is directed to additional pertinent prior art cited in the accompanying PTO-892 Notice of References Cited, which, however, may not be currently applied as a basis for the following rejections. While these references were considered during the examination of this application and are deemed relevant to the claimed subject matter, they are not presently being applied as a basis for rejection in this Office action. The pertinence of these documents, however, may be revisited, and they may be applied in subsequent Office actions, particularly in light of any amendments or further clarification of the claimed invention. Response to Arguments Applicant’s arguments with respect to the newly amended claims have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsiao et al. (US 5985765 A) in view of Yang (US 20100301491 A1) in view of Jeong et al. (US 20180144950 A1). CLAIM 1. Hsiao discloses a method of manufacturing a semiconductor device, the method comprising: forming metallization layers 14/22 over a semiconductor substrate 10; forming a first pad 18[A,B.C] over the metallization layers 14/22; the forming the first pad comprising: forming a first barrier layer 18A: forming a conductive material 18B: forming a second barrier layer 18C; and patterning the first barrier layer, the conductive material, and the second barrier layer (Hsiao teaches the patterned structure is formed by anisotropic etching of the stacked layers to form the patterned structure as shown in figures 1-3.) depositing one or more passivation layers 26 over the first pad; and forming a first bond pad via [opening 1] through the one or more passivation layers 26 and at least partially through the first pad (Hsiao et al. figs 1-3 – Specifically note in the progression of figures, the etching step penetrates into the pad layer 18B.). PNG media_image1.png 636 392 media_image1.png Greyscale Hsiao's “Prior Art” work suggests, but doesn't explicitly show, a solid first bond pad via (i.e. damascene metallization) within a contact opening (opening 1 of figure 1) for electrical bonding. It's expected this “solid” bond pad vis would be a expected continuation of Hsiao's teachings on pads and contact openings, as this is the obvious if not implicit intention of the opening. Yang teaches a similar metallization pad with a contact opening and, specifically, bonding a first bond pad via to a first pad exposed by a contact opening. This bonding includes a recess in the first pad (Yang, Fig. 2C) which will increase contact area thereby increasing conduction, and bond strength. PNG media_image2.png 368 330 media_image2.png Greyscale Note in Yang, a POSIA may form a opening though a plurality of ILD layers, similar to the singular ILD layer of Hsiao in order to provide a solid bond pad via opening having a dual damascene structure. This conventional shape is routinely formed when forming a opening though multiple ILD layers with etch stop layers [ESL] and passivation layers therebetween. Such technique provides generic benefits such as controlled etching. Note that such process provides a opening such that when filled the solid bond pad via has a stepped profile. Note: Col. 2 lines 10-28 of Yang discloses (while not depicted) the dielectric layered structure may include passivation layers. Such passivation layer would be expected to be similar to what is shown in Hsaio. A person of ordinary skill in the art, knowing both Hsiao and Yang, would have found it obvious to improve Hsiao's process by forming a solid bond pad via contact within the contact opening as Yang teaches. Forming the opening in the scenario where there are a plurality of ILDs with intervening etch stop layers would be expected to achieve the stepped profile, wherein the first bond pad via would have at leas a first step change in width. Applying a known technique (from Yang) to improve an existing device (Hsiao's) with predictable results is considered obvious to a person of ordinary skill in the art, according to KSR International Co. v. Teleflex Inc. Further regarding, “patterning the first barrier layer, the conductive material, and the second barrier layer to have a reducing width as the first pad extends away from the semiconductor substrate”, it is noted that while Hsiao may not explicitly describe this specific trapezoidal shape via anisotropic dry etching, the modification is well-supported and understood in prior art. Jeon demonstrates the known convention of forming a analogous pad 170 wet etching to achieve the resultant shape expected (as shown in Figures 4-5 and described in paragraph [0104]). At the time of the invention, it would have been an obvious variation of the process described in Hsiao, by a PHOSITA at the time of the invention, to simply perform the patterning step of Jeong. The substituting of the wet etching process from Jeong into the stacked pad structure of Hsiao is considered an obvious variation because, the “substitutions of one known element for another to obtain predictable results” supports a finding of obviousness. Here, both anisotropic dry etching and isotropic wet etching are standard, functionally equivalent techniques used for the purpose of patterning analogous stacked pad layers. Replacing the dry etch of Hsiao with the wet etch of Jeon results in the conventional trapezoidal shape (reducing width). This is a predictable outcome based on the well-known physics of the etching methods. A noted in MPEP §2141, if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application yields unexpected results. CLAIM 2. Hsiao in view of Yang in view of Jeong disclose a method of claim 1, wherein the first pad comprises aluminum and copper (Hsiao Col. 2 ln 10-20). CLAIM 3. Hsiao in view of Yang in view of Jeong disclose a method of claim 1, wherein the forming the first bond pad via forms the bond pad via with a rounded corner (Hsiao Col. 2 --- Note: Per Applicant’s written description, the rounding as claimed is simply a result of etching, where plasma etching may provide “more” rounding than other types of etching. Hsiao teaches forming the opening and recess in the pad by etching. Specifically “conventional plasma etching.”(see Col. 2 ln 20-57) As such, even not explicitly shown in the figures of Hsiao, the process is none the less taught by Hsiao, and a POSITA would expect the same results of rounding at the corners at some finite scale, similarly to as described by the Applicant’s originally filed written description providing support for “forming” and description of the process that results in the structural feature.). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 4-5, 7, 21-22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsiao et al. (US 5985765 A) in view of Yang (US 20100301491 A1) in view of Jeong (US 20180144950 A1) in view of Lee et al. (US 20170338192 A1) and/or Kao et al. (US 20170200756 A1) CLAIM 4. Hsiao in view of Yang in view of Jeong disclose a method of claim 1, however are silent upon further comprising bonding the first bond pad via to a second bond pad via. The rejection of claim 1 as presented teaches the process forming a bond pad, a contact opening and subsequent first bond pad via within the contact opening and penetrating the bond pad. The cited references, as applied to claim 1, are not concerned with additional bonding and of metallization levels. At the time of invention, Lee et al. and Kao et al. demonstrated that bonding a further bond pad via to a first bond pad via was known, and that this bonding could be achieved through different methods. Lee et al. discloses forming a contact opening to a first bond pad and bonding a first via to it. Lee then repeats this to bond a second bond pad via (2’) to the first bond via (2). Therefore, based on Lee et al., a person of ordinary skill would have found it obvious to improve Hsiao (as modified by Yang) by bonding a second bond pad via to the first, adding wiring layers as needed. Using Lee's known bonding technique to improve Hsiao/Yang with predictable results is considered obvious under KSR International Co. v. Teleflex Inc. Similarly, Kao shows a different method for bonding a second bond via. Kao bonds a first bond pad via in one structure to a second bond pad via in another structure. Thus, modifying the Hsiao/Yang device to include bonding to a second bond pad via, as shown in both Lee et al. and Kao et al., would have been obvious. Applying either Lee's or Kao's known bonding methods to a known device for predictable improvements (such as adding wiring layers and more complex structures) is considered obvious under KSR International Co. v. Teleflex Inc. CLAIM 5. Hsiao in view of Yang in view of Jeong in view of Lee an/or Kao disclose a method of claim 1, further comprising depositing a first etch stop layer over the first pad prior to the depositing the one or more passivation layers (Hsiao figs. 1-6 – Note: the pad may be a multi-layer pad having overlying and underlying layers having various purposes. Further capping layer 19 may optionally be formed over the pad. Further note, the scope of “etch stop layer” is not fully defined by the claim, as particular etching is not specified nor materials for the etch stop layer. The ability to “stop” is dependent on material and etching, as such any layer could be a “etch stop” layer. It is noted that cap layer 19 is disclosed to function as a stop layer.) CLAIM 7. Hsiao in view of Yang in view of Jeong in view of Lee an/or Kao disclose a method of claim 1, wherein the forming the first bond pad via forms the first bond pad via partially through and in physical contact with the first pad (Hsiao figs 1-6 & Yang 2C) CLAIM 21. Hsiao in view of Yang in view of Jeong in view of Lee an/or Kao disclose a method of manufacturing a semiconductor device, the method comprising: forming metallization layers over a semiconductor substrate; (Hsiao figs 1-6 & Yang 2C) forming a first pad over the metallization layers (Hsiao figs 1-6 & Yang 2C); forming a plurality of passivation layers 26 over the first pad (Hsiao figs 1-6); and forming a first bond pad via extending through the plurality of passivation layers and at least partially through the first pad, wherein a conductive portion of the first bond pad via extends away from the semiconductor substrate at least as far as a top one of the plurality of passivation layers (Yang 2C – See regarding claim 1 for combination of Hsiao as modified by Yang.). wherein the forming the first bond Pad via further comprises: forming a first opening through a first one of the pluralities of passivation layers; and forming a second opening through a second one of the Plurality of Passivation layers, the second opening having a larger width than the first opening (Yang 2C – See regarding claim 1 for combination of Hsiao as modified by Yang. As demonstrated by Yang, one of ordinary skill in the art (POSITA) would have been motivated to employ a conventional dual damascene process to form a via opening through multiple interlayer dielectric (ILD) layers to establish an electrical connection to an underlying pad. Applying this conventional process in the context of Hsaio (which discloses X, Y, Z elements/steps), in view of Yang (which discloses the dual damascene method), would involve: Forming a first opening through the uppermost ILD layer to an underlying etch stop layer. Forming a second opening, having a second width, through a lower ILD layer and a passivation layer to expose the pad (Yang). Such a conventional process is a well-known, routine expedient in the art for creating via connections to underlying pads through multiple ILD layers. Therefore, the claimed method of forming openings with the recited relative width constraints would have been an obvious process to a POSITA at the time of the invention. Further regarding, “the first pad having at least three layers of material that collectively have a trapezoidal shape”, it is noted that while Hsiao may not explicitly describe this specific trapezoidal shape via anisotropic dry etching, the modification is well-supported and understood in prior art. Jeon demonstrates the known convention of forming a analogous pad 170 wet etching to achieve the resultant shape expected (as shown in Figures 4-5 and described in paragraph [0104]). At the time of the invention, it would have been an obvious variation of the process described in Hsiao, by a PHOSITA at the time of the invention, to simply perform the patterning step of Jeong. The substituting of the wet etching process from Jeong into the stacked pad structure of Hsiao is considered an obvious variation because, the “substitutions of one known element for another to obtain predictable results” supports a finding of obviousness. Here, both anisotropic dry etching and isotropic wet etching are standard, functionally equivalent techniques used for the purpose of patterning analogous stacked pad layers. Replacing the dry etch of Hsiao with the wet etch of Jeon results in the conventional trapezoidal shape (reducing width). This is a predictable outcome based on the well-known physics of the etching methods. A noted in MPEP §2141, if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application yields unexpected results. CLAIM 22. Hsiao in view of Yang in view of Jeong in view of Lee an/or Kao disclose a method of claim 21, wherein the forming the first bond pad via forms the first bond pad via to extend partially through the first pad and in physical contact with the first pad (Hsiao & Yang 2C – See regarding claim 1 for combination of Hsiao as modified by Yang.). Claim(s) 27-28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsiao et al. (US 5985765 A) in view of Yang (US 20100301491 A1) in view of Jeong () in view of Lee et al. (US 20170338192 A1) and/or Kao et al. (US 20170200756 A1) in view of Tsai et al. (US 20140264709 A1). CLAIM 27. Hsiao in view of Yang in view of Jeong in view of Lee an/or Kao disclose a method of manufacturing a semiconductor device, the method comprising: forming a first pad over a metallization layer, the first pad having a rounded outer perimeter and an inner perimeter (Hsiao – plasma etching a contact opening. Note the shape is a result of etching. See regarding claim 3.); depositing a plurality of passivation layers over the first pad (Yang fig. 2C – Col. 2 lines 10-28 – ILD, ESL, passivation, CMP layers all may make up the stacked dielectric layers over a pad in which a subsequent via structure may be formed though.); etching through the plurality of passivation layers to form an opening that extends at least partially through the first pad (Yang fig. 2C);and forming a first bond pad via in the opening (Hsiao & Yang 2C – See regarding claim 1 for combination of Hsiao as modified by Yang.), forming a first bond pad via in the opening (Yang 2C), the first bond pad via extending over and in physical contact with a surface of at least one of the plurality of passivation layers (i.e. plurality of dielectric layers of figure 2C. Specifically note Col. 2 of Yang that teaches the layers may include ILD, ESL, Passivation, and/or CMP layers. Understood modification of Hsaio would include the capability of simply forming additional dielectric layers over the passivation layer and pad of Hsaio as disclosed in Yang. Subsequently forming the via opening as taught by Yang would result in, the surface being on an opposite side of the at least one of the plurality of passivation layers from the metallization layer (See regarding claim 1). As such, the process as recited in claim 27 would be obvious to a POSITA over the teaching of Hsaio in view of Yang. When there is a design need or market pressure to solve a problem and there are a finite number of identified, predictable solutions, a person of ordinary skill in the art has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely the product not of innovation but of ordinary skill and common sense. KSR Int'l Co v. Teleflex Inc. Further regarding, “wherein the first bond pad via has a circular shape in a top down view”, the cited prior art may be silent upon the shape. However, Tsai ¶[0056] discloses “FIG. 15A shows metal pad 106 is of a circular shape” demonstrating that such a configuration is conventional in the art. The modification of the shape of the via from Hsiao to a circular shape as disclosed in Tsai is considered an obvious variation because, a change in shape, such as from rectangular to circular, is generally considered a matter of design choice and is not patentably significant unless the change produces an unexpected result or performs a new function.1 At the time of the invention, it would have been an obvious variation of the device in Hsiao to utilize a circular via as taught t by Tsai. The circular shape is a well-known, conventional geometry for pads in the semiconductor industry, often selected for its ease of fabrication, uniform stress distribution, and/or prevention of charge accumulation at corners. A PHOSITA at the time of the invention would have recognized that substituting one known shape (circular) for another (e.g., square or rectangular) would result in a predictable outcome: a functional electrical pad. Therefore, the substitution of the circular via shape of Tsai is an obvious design choice that yields no more than predictable results. CLAIM 28. Hsiao in view of Yang in view of Jeong in view of Lee an/or Kao in view of Tsai et al. disclose a method of claim 27, wherein the first bond pad via has a first portion extending through the first pad and a second portion extending through the first pad, the first portion being separated from the second portion by at least a portion of the plurality of passivation layers (Hsiao & Yang 2C – See regarding claim 1 for combination of Hsiao as modified by Yang.). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JARRETT J STARK whose telephone number is (571)272-6005. The examiner can normally be reached 8-4 M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Manno can be reached at 571-272-2339. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. JARRETT J. STARK Primary Examiner Art Unit 2822 3/2/2026 /JARRETT J STARK/Primary Examiner, Art Unit 2898 1 MPEP § 2144.04 (IV) B - Changes in Shape In reDailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966) (The court held that the configuration of the claimed disposable plastic nursing container was a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration of the claimed container was significant.).
Read full office action

Prosecution Timeline

May 10, 2022
Application Filed
Mar 17, 2025
Non-Final Rejection — §103
Jun 17, 2025
Response Filed
Jun 25, 2025
Final Rejection — §103
Aug 26, 2025
Response after Non-Final Action
Oct 27, 2025
Request for Continued Examination
Nov 04, 2025
Response after Non-Final Action
Nov 18, 2025
Non-Final Rejection — §103
Feb 23, 2026
Response Filed
Mar 02, 2026
Final Rejection — §103 (current)

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Prosecution Projections

5-6
Expected OA Rounds
70%
Grant Probability
82%
With Interview (+11.6%)
2y 8m
Median Time to Grant
High
PTA Risk
Based on 1266 resolved cases by this examiner. Grant probability derived from career allow rate.

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