Prosecution Insights
Last updated: April 19, 2026
Application No. 17/750,951

DUAL BLADE CONFIGURATION FOR WAFER EDGE TRIMMING PROCESS

Final Rejection §103§112
Filed
May 23, 2022
Examiner
NADAV, ORI
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Ltd.
OA Round
4 (Final)
60%
Grant Probability
Moderate
5-6
OA Rounds
3y 11m
To Grant
81%
With Interview

Examiner Intelligence

Grants 60% of resolved cases
60%
Career Allow Rate
417 granted / 693 resolved
-7.8% vs TC avg
Strong +21% interview lift
Without
With
+20.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 11m
Avg Prosecution
67 currently pending
Career history
760
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
52.6%
+12.6% vs TC avg
§102
14.2%
-25.8% vs TC avg
§112
29.5%
-10.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 693 resolved cases

Office Action

§103 §112
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA DETAILED ACTION Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-9 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. There is no support in the specification for the claimed limitation of “wherein the use of the first trim blade exposes a first sidewall of the first portion and a second sidewall of the second portion extending from the first upper surface of the second wafer to a bottom surface of the second wafer, defining an annular trench between the first sidewall of the first portion, the second sidewall of the second portion, the first upper surface of the second wafer, and an upper surface of the first wafer beneath a top surface of the first wafer”, as recited in claim 1. In fact, the phrase “bottom surface” is not recited in the disclosure. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-9 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The claimed limitation of “the first trim blade having a sidewall facing a center of the second wafer and a sidewall facing an outer perimeter of the second wafer”, as recited in claim 1, is unclear as to how one element (“a sidewall”) ca refer to two different elements. The claimed limitation of “using the first trim blade to remove material from the second wafer connecting a first portion of the second wafer containing the center of the second wafer to peripheral second portion of the second wafer containing the outer perimeter of the second wafer”, as recited in claim 1, is unclear as to which elements the term “connecting” refers. The claimed limitation of “wherein the use of the first trim blade exposes a first sidewall of the first portion and a second sidewall of the second portion extending from the first upper surface of the second wafer to a bottom surface of the second wafer”, as recited in claim 1, is unclear as to which elements the term “extending” refers. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-9, 15-24 and 26 are rejected under 35 U.S.C. 103 as being unpatentable over Tang et al. (2018/0166328) in view of Kuo et al. (9,064,770), Marchisi (9,640,464) and Morris et al. (11,387,190).Regarding claim 1, Tang et al. teach in figure 3B and related text a method comprising: receiving a wafer stack 30 comprising a first wafer 300 and a second wafer (another portion of 300) over the first wafer and bonded to the first wafer (see analysis below). Regarding the claimed limitations of “a wafer stack comprising a first wafer and a second wafer over the first wafer and bonded to the first wafer”, these are process limitations which would not carry patentable weight in this claim drawn to a structure, because distinct structure is not necessarily produced. The formation of a wafer stack by forming a first wafer and a second wafer over the first wafer and bonded to the first wafer does not produce a structure which is different from a structure which is formed using only one wafer stack and arbitrarily dividing said wafer stack into two portions namely a first wafer and a second wafer. Note that a “product by process” claim is directed to the product per se, no matter how actually made, In re Hirao, 190 USPQ 15 at 17 (footnote 3). See also In re Brown, 173 USPQ 685; In re Luck, 177 USPQ 523; In re Fessmann, 180 USPQ 324; In re Avery, 186 USPQ 161; In re Wertheim, 191 USPQ 90 (209 USPQ 554 does not deal with this issue); and In re Marosi et al., 218 USPQ 289, all of which make it clear that it is the patentability of the final product per se which must be determined in a “product by process” claim, and not the patentability of the process, and that an old or obvious product produced by a new method is not patentable as a product, whether claimed in “product by process” claims or not. Note that the applicant has the burden of proof in such cases, as the above case law makes clear. Tang et al. continue to teach in figure 3B and related text: removing (by using etching) a top portion of the second wafer after the second wafer is bonded to the first wafer, exposing a first upper surface of the second wafer facing away from the first wafer; aligning a first trim blade 71 having a first blade width over the first upper surface of the second wafer, the first trim blade having a sidewall facing a center of the second wafer and a sidewall facing an outer perimeter of the second wafer; using the first trim blade to remove material from the second wafer connecting a first portion of the second wafer containing the center of the second wafer to a second portion of the second wafer containing the outer perimeter of the second wafer, wherein the material removed is at a first distance from the outer perimeter of the second wafer, and wherein the use of the first trim blade exposes a first sidewall of the first portion and a second sidewall of the second portion extending from the first upper surface of the second wafer to a bottom surface of the second wafer, defining a trench between the first sidewall of the first portion, the second sidewall of the second portion, the first upper surface of the second wafer, and an upper surface of the first wafer beneath a top surface of the first wafer; aligning a second trim blade 72 (see figure 3C) having a second blade width over the second peripheral portion of the second wafer after forming the trench; and removing the second portion of the second wafer using the second trim blade. Tang et al. do not explicitly state that the second blade width is greater than the first blade width and do not teach using an annular trench. Kuo et al. teach in figure 8B and related text receiving a wafer stack comprising a first wafer and a second wafer over the first wafer and bonded to the first wafer, and using an annular trench. Marchisi teaches in figure 8 and related text a second blade width 54 is greater than a first blade width 40. Morris et al. teach in figures 1A, 1B and related text a second blade width 34 is greater than a first blade width 28. Tang et al., Marchisi, Morris et al. and Kuo et al. are analogous art because they are directed to trimming blades etching semiconductor wafers and one of ordinary skill in the art would have had a reasonable expectation of success to modify Tang et al. because they are from the same field of endeavor.It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to use an annular trench and to form the second blade width greater than the first blade width, as taught by Marchisi and Morris et al., in Tang et al.’s device in order to be able to use the device in application with requires specific trench widths and specification in the substrate. Regarding claim 2, in the combined device, after using the first trim blade, the first portion of the second wafer comprises a first contiguous piece of the second wafer further than the first distance from the outer perimeter of the second wafer, wherein the second portion of the second wafer comprises a second contiguous piece of the second wafer closer than the first distance to the outer perimeter of the second wafer and isolated from the first portion by the annular trench, and wherein during the removing of the second portion of the second wafer, the second trim blade is separated from the first portion of the second wafer by a portion of the annular trench. Regarding 3, prior art teach that removes portions of the first wafer to a first nonzero depth below the upper surface of the first wafer that the annular trench extends to, but does not teach that the second trim blade overlies the annular trench while removing the second portion of the second wafer, and removes portions of the first wafer to a first depth below the annular trench depth. It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to use the second trim blade overlies the annular trench while removing the peripheral portion of the second wafer, and removes portions of the first wafer to a first depth below the annular trench depth in prior art’s device, in order to use the device in an application which requires specific trench dimensions. Regarding claim 4, in the combined device, the second trim blade is isolated from portions of the second wafer further than the first distance from the outer perimeter of the second wafer by the annular trench. Regarding claim 5, prior art teaches in figure 8B and related text that after the annular trench is formed, the second portion of the wafer stack comprises a bonded portion where the second wafer is bonded to the first wafer. prior art does not teach that the bonded portion having a width less than 100 micrometers. It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to use the bonded portion having a width less than 100 micrometers in prior art’s device in order to improve the structural integrity of the device. Regarding claim 6, in the combined device, the second portion of the wafer stack comprises an unbonded portion where the first wafer is separated from the second wafer, and wherein the unbonded portion is spaced from the first portion of the second wafer by both the bonded portion and the annular trench. Regarding claim 7, in the combined device, the wafer stack comprises a bonded area and an unbonded area peripheral to the bonded area, and wherein after the annular trench is formed, the annular trench has an inner sidewall facing the unbonded area, and in the combined device the first portion has a sidewall facing the unbonded area and forming a continuous loop surrounding the central portion. Regarding claim 8, in the combined device, the first trim blade is used to perform a first trimming process to remove portions of the first wafer and the second wafer corresponding to a location of the annular trench, wherein the first trimming process removes portions of the second wafer covering a first the second sidewall of the second wafer in the second portion, wherein the second sidewall faces the first sidewall and facing the first portion; and wherein the second trim blade is used to perform a second trimming process that removes material of the second wafer in the second portion, material of the first wafer beneath the second portion, and the second sidewall of the second wafer in the second portion. Regarding claim 9, in the combined device, the annular trench has a first annular width corresponding to the first blade width, and the second portion has a second annular width that is less than or equal to the second blade width. Regarding claim 15, Tang et al., Marchisi, Morris et al. and Kuo et al. teach substantially the entire claimed structure, as applied to the claims above, including: receiving a first wafer; aligning a first trim blade having a first blade width over the first wafer; using the first trim blade to form an annular trench between a central portion of the first wafer and a peripheral portion of the first wafer, wherein the annular trench extends from a top surface of the first wafer to a first annular trench depth beneath the top surface of the first wafer, wherein after forming the annular trench, an inner sidewall of the peripheral portion forms a continuous loop around an outer sidewall of the central portion, wherein the peripheral portion is confined between the inner sidewall and an outer perimeter of the first wafer, and wherein the central portion is confined within the outer sidewall and is isolated from the peripheral portion by an air gap in the annular trench; aligning a second trim blade having a second blade width over the peripheral portion of the first wafer after using the first trim blade to form the annular trench, wherein the second blade width is greater than the first blade width; and removing the peripheral portion of the first wafer using the second trim blade after using the first trim blade to form the annular trench and aligning the second trim blade over the peripheral portion of the first wafer, wherein the second trim blade removes portions of the first wafer defining the inner sidewall and the outer perimeter of the first wafer, and wherein the second trim blade is spaced from the outer sidewall of the central portion throughout the removal of the peripheral portion. Regarding claim 16, in the combined device, the first wafer is bonded to a second wafer beneath the first wafer, and wherein the removal of the peripheral portion of the first wafer also removes portions of a peripheral portion of the second wafer. Regarding claim 17, it would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to use the first trim blade, after forming the annular trench, to use the first trim blade to extend the annular trench to a second annular trench depth beneath the top surface of the second wafer in prior art’s device in order to use the device in an application which requires specific trench dimensions. Regarding claim 18, in the combined device, the annular trench has a first annular width corresponding to the first blade width, and the peripheral portion has a second annular width that is less than or equal to the second blade width. Regarding claim 19, it would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to use the first trim blade, after forming the annular trench, to use the first trim blade to extend the annular trench to a second annular trench depth beneath the top surface of the second wafer in prior art’s device in order to use the device in form the first annular trench depth substantially half of the second annular trench depth application which requires specific trench dimensions. Regarding claim 20, in the combined device, the inner sidewall of the peripheral portion faces away from the outer perimeter of the first wafer and faces towards the central portion, and wherein the outer sidewall of the central portion faces the peripheral portion and the outer perimeter of the first wafer. Regarding claim 21, Tang et al., Marchisi, Morris et al. and Kuo et al. teach substantially the entire claimed structure, as applied to the claims above, including: receiving a wafer stack comprising a first wafer and a second wafer overlying the first wafer and bonded to the first wafer with bonding layers; removing a top portion of the second wafer; aligning a first trim blade over the second wafer after removing the top portion of the first wafer; using the first trim blade to remove material from the second wafer, the first wafer, and the bonding layers between the second wafer and the first wafer, thereby forming an annular trench that isolates a central portion of the second wafer from a peripheral portion of the second wafer surrounding the central portion using an air gap after aligning the first trim blade over the second wafer, wherein using the first trim blade exposes a first sidewall in the central portion and a second sidewall in the peripheral portion of the second wafer, a first sidewall and a second sidewall of the first wafer, and a first upper surface of the first wafer with a first annular width, wherein the first upper surface forms a continuous loop around the central portion of the second wafer; aligning a second trim blade over the peripheral portion of the second wafer after using the first trim blade to form the annular trench, wherein the second trim blade has a blade width greater than the first annular width of the first upper surface and an annular width of the peripheral portion; and removing the peripheral portion of the second wafer using the second trim blade after using the first trim blade to form the annular trench and aligning the second trim blade over the peripheral portion, resulting in the first wafer having a second exposed upper surface with a second annular width greater than the first annular width. Regarding claim 22, in the combined device, before aligning the second trim blade over the peripheral portion and removing the peripheral portion the annular trench extends from a top surface of the second wafer, through the second wafer to the first upper surface that is below a top surface of the first wafer. Regarding claim 23, in the combined device, the wafer stack further comprises a bonded portion and an unbonded portion surrounding the bonded portion (arbitrarily chosen), the unbonded portion comprising a first portion of the first wafer surrounding the bonded portion and a second portion of the second wafer directly overlying the first portion and not bonded to the first portion, wherein aligning the first trim blade over the second wafer further comprises positioning an outer blade edge of the first trim blade over the bonded portion of the wafer stack. Regarding claim 24, in the combined device, the first upper surface is exposed by a first trimming process performed by the first trim blade during the forming of the annular trench, the first trimming process removing material from the second wafer and the first wafer; wherein the second exposed upper surface is exposed by a second trimming process performed by the second trim blade during the removal of the peripheral portion, and wherein the second trimming process removes material from the second wafer and the first wafer in the peripheral portion that covers the second exposed upper surface. Regarding claim 26, in the combined device, after the first trim blade and before using the second trim blade, the bonding layers coupling the central portion of the second wafer to the first wafer are separated from the bonding layers coupling the peripheral portion of the second wafer to the first wafer by the air gap within the annular trench. Response to Arguments Applicant’s arguments with respect to the claim(s) have been considered but are moot because of the new ground of rejection. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ORI NADAV whose telephone number is 571-272-1660. The examiner can normally be reached between the hours of 7 AM to 4 PM (Eastern Standard Time) Monday through Friday. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached on 571-272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). O.N. /ORI NADAV/ 1/24/2026 PRIMARY EXAMINER TECHNOLOGY CENTER 2800
Read full office action

Prosecution Timeline

May 23, 2022
Application Filed
Feb 08, 2025
Non-Final Rejection — §103, §112
Apr 25, 2025
Examiner Interview Summary
Apr 25, 2025
Applicant Interview (Telephonic)
May 13, 2025
Response Filed
May 30, 2025
Final Rejection — §103, §112
Jul 14, 2025
Examiner Interview Summary
Jul 14, 2025
Applicant Interview (Telephonic)
Aug 06, 2025
Request for Continued Examination
Aug 08, 2025
Response after Non-Final Action
Aug 29, 2025
Request for Continued Examination
Sep 02, 2025
Response after Non-Final Action
Sep 06, 2025
Non-Final Rejection — §103, §112
Nov 24, 2025
Applicant Interview (Telephonic)
Nov 24, 2025
Examiner Interview Summary
Dec 09, 2025
Response after Non-Final Action
Dec 09, 2025
Response Filed
Jan 13, 2026
Response Filed
Jan 25, 2026
Final Rejection — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
60%
Grant Probability
81%
With Interview (+20.6%)
3y 11m
Median Time to Grant
High
PTA Risk
Based on 693 resolved cases by this examiner. Grant probability derived from career allow rate.

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