DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Amendment
The amendment filed on 2 March 2026 fails to place the application in condition for allowance.
Claims 1-20 are currently pending.
Claims 1-9, 11-13, and 15-20 are under examination.
Claims 10 and 14 are currently withdrawn.
Status of Rejections
The rejection of claims 1-9, 11-13, and 15-20 under 35 U.S.C. 103(a) is herein withdrawn due to Applicant’s Amendment filed 2 March 2026.
New rejections are provided herein.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-9, 11-13, and 15-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
As to claim 1, the phrase “physically separate” is not found within the specification to relate the chemical tank and the first semiconductor processing system.
As to claim 1, the phrase “integrated in the chemical tank” is not found within the specification. The instant specification relates to the sensors that measure the characteristics of the liquid but does not relate the sensor explicitly integrated into the chemical tank.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-3, 5-9, 13, 19, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Stevens et al (US 6,454,927 B1) in view of Han et al (US 2009/0200171 A1), Reiss et al (US 2003/0014145 A1), and Horsthemke et al (US 2009/0324804 A1).
As to claims 1-3, 7, 8, 13, 19, and 20, Stevens discloses A system (Fig. 2/3/4) comprising:
a first semiconductor processing station configured to deposit a material on a first semiconductor wafer (#220, col. 5 lines 12-26 which is an electrochemical deposition station as required by instant claim 2);
a chemical tank that is physically separate from the first semiconductor processing station and configured to provide liquid to an electroplating bath in the first semiconductor processing station to deposit the material on the first semiconductor wafer (#154 dosing system, with tank 250) wherein the chemical tank comprises one or more sensors that measure characteristics of the liquid within the chemical tank (#400 analyzer Fig. 5c connected to tank 250); and
a controller configured to perform operations (#s 223 a/b col. 8 lines 45-49) comprising:
receiving the measurements from the one or more sensors of the chemical tank (col. 8 lines 45-49).
Stevens fails to explicitly disclose:
wherein the sensor is integrated in the chemical tank
providing an input based on the measurements from the one or more sensors of the chemical tank to a trained model, wherein the trained model is configured to generate an output that adjusts an operating parameter of the first semiconductor processing station such that the thickness uniformity of the material is closer to a target thickness uniformity of the material; and
causing the first semiconductor processing station to deposit the material on a second semiconductor wafer using the operating parameter as adjusted by the output.
Han discloses using a bath analyzer to determine properties of the electrolyte as it related to defects of the wafer surface using a multi-variate analysis (Abstract) which results in the prediction of defects ([0002]). Han further discloses the measurement may be resistivity or conductivity of the material ([0084] as required by instant claim 7 where conductivity may be calculated from the stated variables). Han further discloses wherein the measurements from the one or more sensors of the chemical tank comprise a conductivity or resistivity measurement of the liquid that is used to extrapolate or calculate the thickness uniformity of the material. ([0084] as required by instant claim 20 where conductivity may be calculated from the stated variables. It is noted the phrase “is used…” does not impart further structural distinction due to being related to the relationship with the use not explicitly tied to the controller language as presented.)
Reiss discloses feeding parameters into an optimizer (Fig. 1 #152 which may be a neural network ([0051] as required by instant claim 13) which feeds inputs with respect to the plating process and post-process metrology (190) to output adjusted parameters of a semiconductor processing station such that the thickness uniformity of the material is closer to a target thickness uniformity of the material ([0029], [0035] via changing the recipe) which is evaluated on a run to run basis thus causing a first semiconductor processing station to deposit material on a second wafer using the modified operating parameters of the recipe adjusted by the output ([0055]). Reiss discloses incorporating a metrology tool which performs parametric measurements on the wafer ([0026] as required by instant claim 3). Reiss further discloses wherein a central computer system is in communication with both a processing station and a metrology tool (which may be regarded as a semiconductor processing station in accordance with claim 3 See Fig. 1 network with 110 and 120 as required by instant claim 8). Reiss further discloses receiving measurements from a second semiconductor processing station that is configured to perform measurements indicative of a thickness uniformity of the material after the material has been deposited on the first semiconductor wafer; and providing the measurements from the second semiconductor processing station to the trained model. (via reception of inputs from the metrology tool above and thus reading on instant claim 19).
Horsthemke discloses that an analysis unit of electrolyte composition in an electrolyte bath may be integrated directly into the electrolyte bath as opposed to an external module ([0067]).
Thus, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to have used the metrology tool and method of Reiss of feeding information to a neural network based on the uniformity desired on the metrology of a processing of a wafer in the controller of Stevens because it is an efficient technique for run to run control that is more efficient and able to address process drifts and fault conditions (Reiss [0011]).
Further, it would have been obvious to one of ordinary skill in the art to have provided inputs from the chemical tank supplying to the plating station and the associated chemical sensor as taught by Han in the apparatus of Stevens, as modified by Reiss, because said parameters are recognized by Han to affect the uniformity of the plating process to achieve an improved yield with acceptable or lower levels of defects (Han Abstract).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to have integrated the sensor into the plating tank as suggested in Horsthemke in the apparatus of Stevens because such a modification amounts to an obvious location of the analysis unit either integrate or not integrate in the tank from which the solution being analyzed is stored to provide the expected result of being able to analyze the constituents therein. See MPEP 2144.04 V B.
As to claim 5, Stevens further discloses a third semiconductor processing station configured to perform a rinse and dry process on the first semiconductor wafer, wherein the third semiconductor processing station receives the first semiconductor wafer after being processed by the first semiconductor processing station and before being processed by the second semiconductor processing station. (#212).
As to claim 6, the instant claim limitation is necessarily met because the recitation is drawn towards an inherent relationship between the uniformity and any generic measurement of a chemical sensor in a tank. In other words, regardless as to whether the prior art recognizes the relationship or what the relationship is, the relationship is necessarily present and thus satisfied.
As to claim 9, Stevens fails to explicitly disclose plural processing stations with plural integrated controllers.
Reiss discloses where each tool 154 may be provided with its own controller 152 ([0027]).
Thus it would have been obvious to one of ordinary skill in the art at the time the invention was filed to have provided plural semiconductor processing stations with plural integrated controllers as taught by Reiss in the apparatus of Sevens, as modified by Reiss and Han, because said modification amounts to an obvious duplication of parts to be able to provide the expected result of processing multiple workpieces. See MPEP 2144.04 VI B.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Stevens, as modified by Han and Reiss, as applied to claim 1 above, and further in view of Clark et al (US 2020/0083080 A1).
As to claim 4, Stevens, as modified by Han and Reiss, a third semiconductor processing station configured to remove a photoresist layer from the first semiconductor wafer, wherein the third semiconductor processing station receives the first semiconductor wafer after being processed by the first semiconductor processing station and before being processed by the second semiconductor processing station.
Clark discloses a cleaning module capable of removing photoresists layers in which the semiconductor is processed from the plating module ([0098]).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to have used a clean module as a third semiconductor processing station as taught by Clark in the apparatus of Stevens, as modified by Han and Reiss, in order to provide a unit to clean the workpiece before deposition of any subsequent layers (Clark [0098]).
Claim 11, 12, and 15-18 are rejected under 35 U.S.C. 103 as being unpatentable over Stevens, as modified by Han and Reiss, as applied to claim 1 above, and further in view of Wilson et al (US 2005/0183959 A1).
As to claims 11 and 12, Stevens, as modified by Han and Reiss, fails to explicitly discloses wherein the output that adjusts the operating parameter of the first semiconductor processing station comprises a current or a process time for a step to be applied to and an anode of the first semiconductor processing station.
Wilson discloses optimization of process parameters based on the metrology of as formed substrates (Abstract) which include both current a process time steps (See Table 9, Fig. 7 with respect to current adjustments, [0071], Table 2, [0084]).
Thus, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to have optimized the current and time as taught by Wilson in the apparatus of Stevens, as modified by Han and Reiss, because they allow for the achievement of a high level of uniformity ([0015] Wilson, [0020])
As to claims 15-18, Stevens, as modified by Han and Reiss, fails to explicitly disclose the use of error calculations as claimed.
Wilson discloses an optimizer that wherein the input based on the measurements comprises an error calculation that is generated using a measured value from the first semiconductor wafer and a target value for the first semiconductor wafer and providing the error calculation to an optimizer that is configured to use one or more sensitivity curves that relate the error calculation to a change in the operating parameter of the first semiconductor processing station ([0052] as required by instant claims 15 and 16 via the input parameters which include the thickness of the plated film and thus “a measured value” – [0051] and the second set of input parameters includes target thicknesses – [0051]), providing the change and the error calculation to the trained model to generate the output that adjusts the operating parameter of the first semiconductor processing station (as required by instant claim 17 – [0052] “In step 80, the optimizer derives a new electrical parameter set.”) and determining whether the error calculation violates a threshold; and training the model using the input based on the measurements as labeled data that does not require an adjustment by the trained model. (as required by instant claim 18 [0052] “In step 406, the optimizer compares the characteristics measured in step 404 with a set of target characteristics to generate a set of process error values. The set of target characteristics may be the same set of target characteristics as used in step 74, or may be a different set of target characteristics. In step 408, if the error values generated in step 406 are within a predetermined range, then the optimizer continues in step 410” where the range is deemed to be a threshold).
Thus, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to have used an optimizer with error calculations as taught by Wilson with the apparatus of Stevens, as modified by Han and Reiss, in order provide excellent uniformity results via current adjustments ([0081] Wilson) and quickly achieve the target plating profile (Wilson [0114]).
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-9, 11-13, and 15-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
In response to Applicant’s argument that tank 250 is a part of tool platform 152 and thus not a separate station as recited in the amended claim language, this argument is not persuasive because the cited processing station identified and cited above was #220 which is the specific processing unit performing the actual deposition. Because units 250 and 220 are separate, the are deemed to be physically separate from each other.
In response to Applicant’s argument regarding the integration of the sensor into the tank, this argument is no persuasive as the recitation “integrated” is non-specific as to the specific mode of integration. The Examiner believes Applicant intended meaning to be that the sensor is actually in the tank in some manner. The Examiner as expressly addressed the amended limitation above and maintains integrating the sensor into the tank would be prima facie obvious.
In response to applicant’s argument that there is no teaching, suggestion, or motivation to combine the references, the examiner recognizes that obviousness may be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988), In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992), and KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007).
In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986).
In response to applicant's argument that the dosing data and recipe adjustment solve different problems than those addressed by Han or Reiss, the test for obviousness is not whether the features of a secondary reference may be bodily incorporated into the structure of the primary reference; nor is it that the claimed invention must be expressly suggested in any one or all of the references. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981). In the instant case, it is clear the make up of the bath and the plating parameters affects the outcome of the plating process. Reiss uses the explicit information to modify recipe parameters and Han discloses measuring the sensors from chemical tanks. Thus, the combination makes use of both the prior art measurements with respect to the specific baths of Stevens using the processing and optimization methods of Han and Reiss to provide an obvious combination of refining the electroplating process.
No further arguments are presented.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LOUIS J RUFO whose telephone number is (571)270-7716. The examiner can normally be reached Monday to Friday, 9 am to 5 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Luan Van can be reached at 571-272-8521. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/LOUIS J RUFO/ Primary Examiner, Art Unit 1795
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