DETAILED ACTION
This Office Action is sent in response to Applicant’s Communication received 21 Nov 2025 for application number 17/763,142. The Office hereby acknowledges receipt of the following and placed of record in file: Applicant Arguments/Remarks, and Claims.
Claims 1-3, 5-12, and 14-18 are presented for examination. Examiner notes that claims 7-9 and 16-18 have been withdrawn.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) have been considered but are moot because of new grounds of rejection necessitated by amendment; see the Rejection below for prior art mappings and explanations.
On page 7 of Applicant Arguments/Remarks filed 21 Nov 2025, Applicant contends that the prior art does not teach, “a BPD-TED conversion rate of more than 95%”; Examiner respectfully disagrees. Examiner notes that Nishio teaches wherein the dislocation conversion layer [first intermediate region 11; Fig . 1A, para 0063] is a single layer [11 is a single layer]. Applicant’s arguments are predicated on the fact that Ohno’s invention has multiple layers; these arguments are moot, as Nishio teaches a dislocation conversion layer as a single layer, as well as a conversion rate from the basal plane dislocation to the threading edge dislocation of more than 95% [para 0063 discloses the conversion rate from basal plane dislocation into threading edge dislocation may be 98% or more].
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-3, 5-6, 10-12, and 14-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ohno et la. [hereinafter as Ohno] (US 2009/0302328 A1) in view of Aigo et al. [hereinafter as Aigo] (US 2016/0251775 A1) further in view of Nishio et al. [hereinafter as Nishio] (US 2020/0127083 A1) further in view of Balachandran et al. [hereinafter as Balachandran] (US 2020/0056302 A1).
In reference to claim 1, Ohno teaches A SiC substrate [base substrate 51 and dislocation conversion layer 53; Fig. 5E, paras 0070-0072] comprising a base substrate [base substrate 51; Fig. 5E, paras 0070-0072] and a dislocation conversion layer [dislocation conversion layer 53; Fig. 5E, paras 0070-0072] having a doping concentration of 1 x 1015 cm-3 or more [paras 0070-0072 disclose the concentrations of the silicon carbide layers 531, 532, and 533 (together as dislocation conversion layer 53) may be 1x1018, 1x1017, and 2x1016 cm-3].
However, Ohno does not explicitly teach wherein, in the base substrate, at least a subsurface damaged layer is removed.
Aigo teaches wherein, in the base substrate, at least a subsurface damaged layer is removed [para 0054 discloses that damaged surface layer of a SiC substrate may be removed using CMP].
It would have been obvious to one of ordinary skill in art, absent unexpected results, having the teachings of Ohno and Aigo before the effective filing date of the claimed invention, to include the damaged layer removal as disclosed by Aigo into the SiC substrate of Ohno in order to obtain a SiC substrate in which a damaged layer is removed.
One of ordinary skill in the art would be motivated to obtain a SiC substrate in which a damaged layer is removed to provide the predictable result of providing a damage-free surface thereby improving reliability and efficiency and providing improved device performance.
However, while Ohno teaches the dislocation conversion layer [53], Ohno and Aigo do not explicitly teach wherein the dislocation conversion layer is a single layer formed directly above the base substrate and has a conversion rate from the basal plane dislocation to the threading edge dislocation of more than 95%.
Nishio teaches wherein the dislocation conversion layer [first intermediate region 11; Fig . 1A, para 0063] is a single layer [11 is a single layer] formed directly above the base substrate [base body 10s; Fig. 1A, para 0021] and has a conversion rate from the basal plane dislocation to the threading edge dislocation of more than 95% [para 0063 discloses the conversion rate from basal plane dislocation into threading edge dislocation may be 98% or more].
It would have been obvious to one of ordinary skill in art, absent unexpected results, having the teachings of Ohno, Aigo, and Nishio before the effective filing date of the claimed invention, to include the conversion rate as disclosed by Nishio into the dislocation conversion layer of Ohno and Aigo in order to obtain dislocation conversion layer with a conversion rate of more than 95%.
One of ordinary skill in the art would be motivated to obtain dislocation conversion layer with a conversion rate of more than 95% to provide the predictable result of preventing the propagation of stacking faults and impedance of current flow, thereby improving overall device reliability.
However, while Ohno teaches the base substrate [51], Ohno, Aigo, and Nishio do not explicitly teach:
the base substrate has a main surface having steps of one unit cell height.
Balachandran teaches the base substrate has a main surface having steps of one unit cell height [para 0083 discloses a cell height of 4H-SiC of around ~1 nm].
It would have been obvious to one of ordinary skill in art, absent unexpected results, having the teachings of Ohno, Aigo, Nishio, and Balachandran before the effective filing date of the claimed invention, to include the substrate as disclosed by Balachandran before into the dislocation conversion layer of Ohno, Aigo, and Nishio in order to obtain a base substrate with a main surface having one unit cell step height.
One of ordinary skill in the art would be motivated to obtain a base substrate with a main surface having one unit cell step height to provide the predictable result of forming a SiC substrate using known methods.
In reference to claim 2, Ohno, Aigo, Nishio, and Balachandran teach the invention of claim 1.
Ohno teaches The SiC substrate according to claim 1, comprising a dislocation conversion layer [53] having a doping concentration of 1 x 1017 cm-3 or more [paras 0070-0072 disclose the concentrations of the silicon carbide layers 531, 532, and 533 (together as dislocation conversion layer 53) may be 1x1018, 1x1017, and 2x1016 cm-3].
In reference to claim 3, Ohno, Aigo, Nishio, and Balachandran teach the invention of claim 1.
Ohno teaches The SiC substrate according to claim 1, wherein the dislocation conversion layer [53] has a thickness of 1 µm or more [paras 0070-0072 disclose 53 is 1.5 µm].
In reference to claim 5, Ohno, Aigo, Nishio, and Balachandran teach the invention of claim 1.
Nishio teaches the layer has a conversion rate from the basal plane dislocation to the threading edge dislocation of 100% [para 0063 discloses the conversion rate from basal plane dislocation into threading edge dislocation may be 98% or more].
In reference to claim 6, Ohno, Aigo, Nishio, and Balachandran teach the invention of claim 1.
Ohno teaches The SiC substrate according to claim 1, further comprising an epitaxial growth layer [drift layer 52; Fig. 5E, para 00073] formed directly above the dislocation conversion layer [53],
wherein the doping concentration of the dislocation conversion layer [53] is higher than [para 0075 discloses the concentration of 52 is 5x1015 cm-3, which is less than that of 53] the doping concentration of the epitaxial growth layer [52].
In reference to claim 10, Ohno teaches A SiC semiconductor device comprising a base substrate [base substrate 51; Fig. 5E, paras 0070-0072] and a dislocation conversion layer [dislocation conversion layer 53; Fig. 5E, paras 0070-0072] having a doping concentration of 1 x 1015 cm-3 or more [paras 0070-0072 disclose the concentrations of the silicon carbide layers 531, 532, and 533 (together as dislocation conversion layer 53) may be 1x1018, 1x1017, and 2x1016 cm-3].
However, Ohno does not explicitly teach wherein, in the base substrate, at least a subsurface damaged layer is removed.
Aigo teaches wherein, in the base substrate, at least a subsurface damaged layer is removed [para 0054 discloses that damaged surface layer of a SiC substrate may be removed using CMP].
It would have been obvious to one of ordinary skill in art, absent unexpected results, having the teachings of Ohno and Aigo before the effective filing date of the claimed invention, to include the damaged layer removal as disclosed by Aigo into the SiC substrate of Ohno in order to obtain a SiC substrate in which a damaged layer is removed.
One of ordinary skill in the art would be motivated to obtain a SiC substrate in which a damaged layer is removed to provide the predictable result of providing a damage-free surface thereby improving reliability and efficiency and providing improved device performance.
However, while Ohno teaches the dislocation conversion layer [53], Ohno and Aigo do not explicitly teach wherein the dislocation conversion layer is a single layer formed directly above the base substrate and has a conversion rate from the basal plane dislocation to the threading edge dislocation of more than 95%.
Nishio teaches wherein the dislocation conversion layer [first intermediate region 11; Fig . 1A, para 0063] is a single layer [11 is a single layer] formed directly above the base substrate [base body 10s; Fig. 1A, para 0021] and has a conversion rate from the basal plane dislocation to the threading edge dislocation of more than 95% [para 0063 discloses the conversion rate from basal plane dislocation into threading edge dislocation may be 98% or more].
It would have been obvious to one of ordinary skill in art, absent unexpected results, having the teachings of Ohno, Aigo, and Nishio before the effective filing date of the claimed invention, to include the conversion rate as disclosed by Nishio into the dislocation conversion layer of Ohno and Aigo in order to obtain dislocation conversion layer with a conversion rate of more than 95%.
One of ordinary skill in the art would be motivated to obtain dislocation conversion layer with a conversion rate of more than 95% to provide the predictable result of preventing the propagation of stacking faults and impedance of current flow, thereby improving overall device reliability.
However, while Ohno the base substrate [51], Ohno, Aigo, and Nishio do not explicitly teach:
the base substrate has a main surface having steps of one unit cell height.
Balachandran teaches the base substrate has a main surface having steps of one unit cell height [para 0083 discloses a cell height of 4H-SiC of around ~1 nm].
It would have been obvious to one of ordinary skill in art, absent unexpected results, having the teachings of Ohno, Aigo, Nishio, and Balachandran before the effective filing date of the claimed invention, to include the substrate as disclosed by Balachandran before into the dislocation conversion layer of Ohno, Aigo, and Nishio in order to obtain a base substrate with a main surface having one unit cell step height.
One of ordinary skill in the art would be motivated to obtain a base substrate with a main surface having one unit cell step height to provide the predictable result of forming a SiC substrate using known methods.
In reference to claim 11, Ohno, Aigo, Nishio, and Balachandran teach the invention of claim 10.
Ohno teaches The SiC semiconductor device according to claim 10, comprising a dislocation conversion layer [53] having a doping concentration of 1 x 1017 cm-3 or more [paras 0070-0072 disclose the concentrations of the silicon carbide layers 531, 532, and 533 (together as dislocation conversion layer 53) may be 1x1018, 1x1017, and 2x1016 cm-3].
In reference to claim 12, Ohno, Aigo, Nishio, and Balachandran teach the invention of claim 10.
Ohno teaches The SiC semiconductor device according to claim 10, wherein the dislocation conversion layer [53] has a thickness of 1 µm or more [paras 0070-0072 disclose 53 is 1.5 µm].
In reference to claim 14, Ohno, Aigo, Nishio, and Balachandran teach the invention of claim 10.
Nishio teaches the layer has a conversion rate from the basal plane dislocation to the threading edge dislocation of 100% [para 0063 discloses the conversion rate from basal plane dislocation into threading edge dislocation may be 98% or more].
In reference to claim 15, Ohno, Aigo, Nishio, and Balachandran teach the invention of claim 10.
Ohno teaches The SiC semiconductor device according to claim 10, further comprising an epitaxial growth layer [drift layer 52; Fig. 5E, para 00073] formed directly above the dislocation conversion layer [53],
wherein the doping concentration of the dislocation conversion layer [53] is higher than [para 0075 discloses the concentration of 52 is 5x1015 cm-3, which is less than that of 53] the doping concentration of the epitaxial growth layer [52].
Conclusion
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/ANDREW CHUNG/
Examiner, Art Unit 2898