Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
New corrected drawings in compliance with 37 CFR 1.121(d) are required in this application because the drawing of FIG. 29 of the present Applicant does not show any CAVITY OR RECESS. Applicant is advised to employ the services of a competent patent draftsperson outside the Office, as the U.S. Patent and Trademark Office no longer prepares new drawings. The corrected drawings are required in reply to the Office action to avoid abandonment of the application. The requirement for corrected drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-6, 8-9 and 12-13 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by NAKAMURA (Pub. No.: US 2020/0411990).
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Re claim 1, NAKAMURA, FIGS. 14, 18 and 20 [as shown above] teaches a display device comprising:
a display area [DR] and a non-display area [NDR];
a substrate (802/47/48/49/96);
a pixel circuit layer (47/48/49/[PCL]) including a plurality of transistors (68/[TS], FIGS. 18 and 20 [as shown above], ¶ [0228], note that 68 is including [55/56/57/54]) disposed on and above the substrate (802/47/48/49/96);
a first electrode and a second electrode (left/right 89, [0260]) disposed on a same layer (48/49) on the pixel circuit layer;
a light emitting element (CHIP, [0261]) disposed between the first electrode and the second electrode (left/right 89) in the display area [DR]; and
a first contact electrode (97, FIG. 20, [0263]) electrically connecting one end of the light emitting element (CHIP) to the first electrode (left 89) in the display area [DR];
an antenna pattern (550, FIG. 18, [0215]) disposed on and above the light emitting element (CHIP) in the display area [DR] and including an opening [O], wherein
the antenna pattern (550, note that 550 is formed AT the layer [38/39] of [38/39/108/109/76/95]) is formed AT the same layer (38/39/108//109/76/95) as the first contact electrode (97, note that 97 is formed AT the layer 95 of [38/39/108/109/76/95]) and the first contact electrode (97) is positioned in the opening [O].
Re claim 2, NAKAMURA, FIGS. 14, 18 and 20 [as shown above] teaches the display device according to claim 1, further comprising:
a first partition wall (the wall created by left 89/[FPW]) formed on the pixel circuit layer;
a second partition wall [SPW] formed on the pixel circuit layer and separated from the first partition wall, wherein
the first electrode (left 89) is disposed directly on a top surface of the first partition wall ([FPW] on top of 96),
the second electrode (right 89) is disposed directly on a top surface of second partition wall ([SPW] on top of 96),
the light emitting element (CHIP) is disposed directly between the first partition wall [FPW] and the second partition wall (of the third CHIP that is not shown on FIG. 20).
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Re claim 3, NAKAMURA, FIGS. 14, 18 and 20 [as shown above] teaches the display device according to claim 2, further comprising
a first bank (801) formed on the pixel circuit layer and between pixels;
a second bank (802) formed on the pixel circuit layer and between pixels, and separated from the first bank,
wherein the first partition wall (right 89), the second electrode (right 89), the light emitting element (CHIP), and the antenna pattern (550) are disposed directly between the first bank and the second bank, and
the light emitting element (CHIP) is disposed directly between the first bank and the second bank.
Re claim 4, NAKAMURA, FIGS. 18 and 20 teaches the display device according to claim 3, wherein the antenna pattern (550) and the first contact electrode (left 97) are electrically separated from each other.
Re claim 5, NAKAMURA, FIGS. 18 and 20 teaches the display device according to claim 3, further comprising: a second contact electrode (right 97) electrically connecting another end of the light emitting element (right CHIP) to the second electrode (right 89), and
an insulating layer (38/39/108//109/76/95) disposed directly on the second contact electrode (right 97) and making direct contact with the antenna pattern (550).
Re claim 6, NAKAMURA, FIGS. 18 and 20 teaches the display device according to claim 5, wherein the first contact electrode (left 97) is disposed on the second contact electrode (right 97).
Re claim 8, NAKAMURA, FIGS. 18 and 20 teaches the display device according to claim 5, further comprising: a first bridge pattern (the pattern formed on the contact hole 93), wherein the first bridge pattern and the second contact electrode (right 97) are disposed on a same layer (96/95), and the antenna pattern (550) is electrically connected to the first bridge pattern through a first contact hole (93) in the insulating layer (96/95).
Re claim 9, NAKAMURA, FIGS. 18 and 20 teaches the display device according to claim 5, wherein
the first contact electrode (left 97), the second contact electrode (right 97), and the antenna pattern (550) are disposed on a same layer (96/95), and
the first contact electrode (left 97), the second contact electrode (right 97), and the antenna pattern (550) are electrically separated from each other.
Re claim 12, NAKAMURA, FIGS. 18 and 20 teaches the display device according to claim 1, wherein a transmit/receive frequency of the antenna pattern is in a range of about 28 GHz to about 39 GHz [0150].
Re claim 13, NAKAMURA, FIGS. 18 and 20 teaches the display device according to claim 1, wherein the antenna pattern includes a transparent conductive material [0087].
Response to Arguments
Applicant's arguments filed 02/04/2025 have been fully considered but they are not persuasive.
In response to Applicant’s argument:
“For example, as shown in the cited FIGS. 18-20 of Nakamura, the alleged antenna 550 appears to be at a layer above, and not at the same layer as, the alleged first contact electrode 97. Accordingly, Applicant respectfully submits that the cited portions of Nakamura do not appear to disclose at least "an antenna pattern disposed on and above the light emitting element in the display area and including an opening, wherein the antenna pattern is formed at the same layer as the first contact electrode, and the first contact electrode is disposed in the opening" the above-emphasized features of amended claim 1. (Emphasis added).”
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The Examiner respectfully submits that NAKAMURA, FIGS. 18 and 19 [as shown above] still reads on:
the antenna pattern (550, note that 550 is formed AT the layer [38/39] of [38/39/108/109/76/95]) is formed AT the same layer (38/39/108/109/76/95) as the first contact electrode (97, note that 97 is formed AT the layer 95 of [38/39/108/109/76/95]) and the first contact electrode (97) is positioned in the opening [O].
For the above reasons, it is believed that the rejections should be sustained.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TONY TRAN whose telephone number is (571)270-1749. The examiner can normally be reached Monday-Friday, 8AM-5PM, EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached on 571-270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/TONY TRAN/Primary Examiner, Art Unit 2893
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