Prosecution Insights
Last updated: July 17, 2026
Application No. 17/805,034

Metal Pillars Preventing Wetting on Sidewalls and Method Forming Same

Non-Final OA §102§103§112
Filed
Jun 02, 2022
Examiner
HRNJIC, ADIN
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
3 (Non-Final)
66%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
73%
With Interview

Examiner Intelligence

Grants 66% — above average
66%
Career Allowance Rate
38 granted / 58 resolved
-2.5% vs TC avg
Moderate +8% lift
Without
With
+7.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
27 currently pending
Career history
102
Total Applications
across all art units

Statute-Specific Performance

§103
93.3%
+53.3% vs TC avg
§102
3.5%
-36.5% vs TC avg
§112
3.2%
-36.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 58 resolved cases

Office Action

§102 §103 §112
Detailed Action This office action is in response to the request for continued examination filed on January 16th, 2026. Claims 1-9, 21-22, and 24-32 are pending. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on January 16th, 2026, has been entered. Response to Arguments Applicant's arguments filed January 16th, 2026, have been fully considered but they are not persuasive. Applicant argues (pgs. 10-11, “Remarks”) that Hu fails to teach the limitations presented in Claim 26. Hu discloses that “another portion” 124 is formed similar to the process flow in figures 3-14. In figures 3-14, however, Hu discloses that the underlying portions 1526 and 122 of the asserted metal pillar 120 are formed in separate processes. For example, figures 7 and 8 of Hu illustrate that the formation of the portion 122 of the asserted metal pillar in a first level of photoresist 602 is formed in a first formation process. The first level of photoresist 602 is then removed. A second level of photoresist 902 is then formed, and another portion 124 of the asserted metal pillar is formed in a second formation process, which is totally separated from the first formation process. Examiner states that Hu teaches that a second level of photoresist material 902 is dispensed without stripping the first level of photoresist material 602 ([0060]). The first level of photoresist material 602 is applied by spin coating ([0057]) as is the second level of photoresist 902 ([0060]). Similarly, the metal used for forming the first portion 122 is deposited by electroplating ([0060]) as is the second portion 124 ([0062]). Examiner notes that while two separate photoresists may be applied by spin coating and two separate metals may be disposed by electroplating, both the first portion and the second portion are formed using this process. As currently written, the process of forming the first portion and second portion as outlined above, may be interpreted to be “a same process”. Applicant argues (pgs. 11-12, “Remarks”) that Hu fails to teach the limitations presented in Claim 1. Hu illustrates that photoresists 602 and 902 are separate photoresists that have never co-existed at the same time. Accordingly, it is not reasonable to interpret the photoresists 602 and 902 of Hu as “a” plating mask. Furthermore, when the asserted second opening 702 and 1002 are formed, the asserted first opening 210 has been fully filled. Therefore, the second opening 702 and 1002 cannot possibly join the non-existent first opening 210, which does not exist when the asserted second opening 702 and 1002 are formed. In addition, the bottoms of the asserted second opening 702 and 1002 are higher than and spaced apart from the top end of the asserted first opening 210. Accordingly, Hu also fails to discloses the claim element “wherein the first opening is joined to the second opening”. Also, it is unreasonable to assert openings 702 and 1002, which have never co-existed at the same time, as “a second opening”. Examiner states that Hu teaches that a second level of photoresist material 902 is dispensed without stripping the first level of photoresist material 602 ([0060]). Therefore, it is reasonable to interpret the photoresists 602 and 902 as “a plating mask”. While examiner agrees that the asserted first opening 210 is filled with material from 502 and 504 (see figs. 6-7), the first opening is defined to be an opening in the dielectric layer 208. When additional openings 702 and 1002 are formed (see figs. 7 and 10) they are formed in a location that overlaps and “joins” the first opening 210 through the materials 502 and 504. As currently written, the term “opening” is understood to be a gap in the dielectric layer 208, while material 502 and 504 may fill the area, the gap in the dielectric layer 208 itself is still present. This is similar to applicant’s own first opening 57 being filled with a material 58 (see fig. 6) wherein access to the conductive feature 26 below is blocked by material 58. Additionally, as a result of the discussion above, the bottoms of the asserted second opening are positioned above the asserted first opening, but are still considered to be “joined” with the first opening 210 through the materials 502 and 504. Again, similarly to applicant’s claimed invention, the bottom of the second opening 69 (see fig. 9) does not extend through material 58 and is positioned above the first opening 57 (see fig. 6). Lastly, the examiner notes that the claim does not require the second opening to be formed consecutively and may read on a second opening that is formed and filled in parts. As a result, the openings 702 and 1002 may be defined to be “a second opening” without existing simultaneously. Therefore, applicant’s arguments are not persuasive. Applicant argues (pgs. 12-13, “Remarks”) that Hu and the other cited references fail to teach the limitations presented in amended Claim 21. However, as seen in the rejection below, Claim 21 is rejected by a new interpretation of the combination of Yu and Yu-830. Therefore, applicant’s arguments are not persuasive and are moot in view of the new grounds of rejection. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claim 28 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. In this instance, Claim 28 recites “a third portion under the second portion over the first portion” in line 2. Applicant has already defined in Claim 26 that “a first portion lower than a bottom surface of the bottom dielectric layer; and a second portion underlying and joining to the first portion”. As a result, applicant is seemingly claiming that the third portion may be positioned under the second portion which is positioned under the first portion while also being positioned over the first portion. While applicant’s filed specification states ([0055], see fig. 22A) that numerous steps and portions may be used in the formation of a metal pillar, the applicant does not have support for the impossible structure as claimed. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 28 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 28 recites the limitation "a third portion under the second portion over the first portion" in line 2. For context, Claim 26 defines that “a first portion lower than a bottom surface of the bottom dielectric layer; and a second portion underlying and joining to the first portion”. It is unclear as to how the third portion may be positioned under the second portion which is positioned under the first portion while also having the third portion being positioned over the first portion. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 26, 29, and 32 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Hu et al. (2023/0154878 A1; hereinafter Hu). Regarding Claim 26, Hu (fig. 15) teaches a method comprising: forming a package component ([0066], 1500) comprising: forming a bottom dielectric layer ([0048], 208); and forming a metal pillar ([0044], 1520) comprising: a first portion ([0066], 1526) lower than a bottom surface (note that fig. 15 is rotated 180 degrees when compared to the claimed invention and therefore a bottom surface may be interpreted as a top surface) of the bottom dielectric layer (top surface of 208); and a second portion ([0044], 124) underlying (note that fig. 15 is rotated 180 degrees when compared to the claimed invention and therefore underlying may be interpreted as overlying) and joining to the first portion (1526), wherein the first portion (1526) and the second portion (124) are formed in a same formation process ([0067], both 124 and 1526 are both formed using a photoresist material filled with conductive material) , wherein the second portion (124) is wider (224 is wider than 1528, see fig. 15) than the first portion (1526), and wherein a first sidewall (sidewall of 1526) of the first portion (1526) and a second sidewall (sidewall of 124) of the second portion (124) form a first step (step where 1526 and 124 meet, see fig. 15). Regarding Claim 29, Hu (fig. 15) teaches the method of claim 26, wherein the first sidewall (sidewall of 1526) and the second sidewall (sidewall of 124) are discontinuous from each other (see fig. 15). Regarding Claim 32, Hu (fig. 15) teaches the method of claim 26, wherein the first portion (1526) of the metal pillar (120) and the second portion (124) of the metal pillar (120) are portions of a same continuous region and have no distinguishable interface in between ([0059], [0062], different portions of the pillar are formed with the same metal and become joined or integrated with each other, for example, see fig. 12). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Rejection Note: Italicized claim limitations indicate that the corresponding limitations are addressed with a secondary reference/embodiment in an obviousness analysis. Claims 1-2, 4-7, and 30 are rejected under 35 U.S.C. 103 as being unpatentable over Hu in view of Yu et al. (2013/0277830 A1; hereinafter Yu-830) Regarding Claim 1, Hu (figs. 3-14) teaches a method comprising: forming a first package component ([0042], 100) comprising a conductive feature ([0043], 102), and a dielectric layer ([0048], 208) covering the conductive feature (102); forming a first opening ([0048], 210, see fig. 4) in the dielectric layer (208), wherein the conductive feature (102) is exposed to the first opening (210); forming a metal seed layer ([0056], 502, 504) on the dielectric layer (208), wherein the metal seed layer (502, 504) extends into the first opening (210) to contact the conductive feature (102); forming a plating mask ([0057], 602, see fig. 6, [0060], 902, see fig. 9) over the metal seed layer (502, 504), with a second opening ([0058], 702, see fig. 7, [0061], 1002, see fig. 10) formed in the plating mask (602, 902), wherein the first opening (210) is joined to the second opening (702, 1002); plating a conductive material ([0044], 122, 124) into the first opening (210) and the second opening (702, 1002); removing (see fig. 12) the plating mask (602, 902) to expose portions of the metal seed layer (502, 504); and etching ([0064], see fig. 13) the portions of the metal seed layer (502, 504), wherein the conductive material (122, 124) and a remaining portion of the metal seed layer (502, 504) collectively form a metal pillar ([0044], 120) over the dielectric layer (208), and wherein the metal pillar has a top width and a bottom width smaller than the top width, with the bottom width being measured at a surface level of the dielectric layer, and wherein the top width is measured from a first exposed sidewall of the metal pillar to a second exposed sidewall opposing the first exposed sidewall, and the bottom width is measured from a third exposed sidewall of the metal pillar to a fourth exposed sidewall opposing the first exposed sidewall. Hu doesn’t teach the metal pillar has a top width and a bottom width smaller than the top width, with the bottom width being measured at a surface level of the dielectric layer, and wherein the top width is measured from a first exposed sidewall of the metal pillar to a second exposed sidewall opposing the first exposed sidewall, and the bottom width is measured from a third exposed sidewall of the metal pillar to a fourth exposed sidewall opposing the first exposed sidewall. However, Yu-830 (fig. 5B) teaches the metal pillar ([0036], 122) has a top width ([0036], 312) and a bottom width ([0036], 410) smaller than the top width (312), with the bottom width (410) being measured at a surface level of the dielectric layer ([0017], surface level of 112, see fig. 2 for labeled features), and wherein the top width (312) is measured from a first exposed sidewall (left sidewall at width 312, see fig. 5B) of the metal pillar (122) to a second exposed sidewall (right sidewall at width 312, see fig. 5B) opposing the first exposed sidewall, and the bottom width (410) is measured from a third exposed sidewall (left sidewall at width 410, see fig. 5B) of the metal pillar (122) to a fourth exposed sidewall (right sidewall at width 312, see fig. 5B) opposing the first exposed sidewall. Yu-830 also teaches that this shape allows the solder to wet the sidewalls of the pillar and further strengthen the attachment of the solder ([0036]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of Hu to include the pillar of Yu-830 to strengthen attachment of solder. Regarding Claim 2, Hu (figs. 3-14) teaches the method of claim 1 further comprising bonding a second package component ([0077], 2102, see fig. 21) to the first package component (100), with the second package component (2102) being underlying the first package component (100) when the first package component (100) is viewed upside down, wherein a solder region ([0044], 126) joins the metal pillar (120) to the second package component (2102), and wherein an entirety of the solder region (126) is underlying the metal pillar (all of 126 is below 120, see fig. 21). Regarding Claim 4, Hu (figs. 3-14) teaches the method of claim 1, wherein the forming the plating mask (602, 902) comprises: performing a first light-exposure process ([0057], 606) on the plating mask (602) using a first lithography mask ([0057], 604), wherein a first portion ([0058], 602’) of the plating mask (602) is light-exposed (see fig. 6); and performing a second light-exposure process ([0060], 906) on the plating mask (902) using a second lithography mask ([0060], 904), wherein a second portion ([0061], 902’) of the plating mask (902) is light-exposed (see fig. 9); and performing a development process ([0058], [0061]) on the plating mask (602, 902). Regarding Claim 5, Hu (figs. 3-14) teaches method of claim 4, wherein the first portion (602’) and the second portion (902’) of the plating mask (602, 902) have different widths (see figs. 6 and 9). Regarding Claim 6, Hu (figs. 3-14) teaches method of claim 5, wherein the first portion (602’) is wider (see figs. 6 and 9) than the second portion (902’), and wherein the second portion (902’) is deeper (see figs. 6 and 9) than the first portion (602’). Regarding Claim 7, Hu (figs. 3-14) teaches method of claim 4, wherein the first portion (602’) and the second portion (902’) of the plating mask (602’, 902’) have different depths (see figs. 6 and 9). Regarding Claim 30, the combination of Hu (fig. 15) and Yu-830 (fig. 5B) teaches the method of claim 1 further comprising forming an underfill (Hu, [0078], 2110) physically contacting the first exposed sidewall (Yu-830, left sidewall at width 312), the second exposed sidewall (Yu-830, right sidewall at width 312), the third exposed sidewall (Yu-830, left sidewall at width 410), and the fourth exposed sidewall (Yu-830, right sidewall at width 410). Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Hu and Yu-830 as applied to Claim 1, and further in view of Yu et al. (2018/0033771 A1; hereinafter Yu). Regarding Claim 3, Hu doesn’t teach forming a micro-bump on the first package component, wherein the micro-bump has a first height smaller than a second height of the metal pillar; and bonding a passive device die to the first package component through the micro-bump. However, Yu (fig. 20B) teaches the method of claim 1 further comprising: forming a micro-bump ([0047], 176) on the first package component ([0027], 160), wherein the micro-bump (176) has a first height (height of 176) smaller (see fig. 20B) than a second height (height of 162) of the metal pillar ([0038], 162); and bonding a passive device die ([0041], 170) to the first package component (160) through the micro-bump (176). Yu also teaches an integrated passive device (IPD) may boost system performance ([0011]) while the use of micro bumps enables high-density connections ([0048]) and enlarges the process window for package structures to include an IPD component ([0045]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of Hu to include passive device die and micro-bumps of Yu to enable high-density connections and boost system performance. Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Hu and Yu-830 as applied to Claim 4, and further in view of Yeo (2005/0224991 A1; hereinafter Yeo). Regarding Claim 8, Hu doesn’t teach the first portion and the second portion of the plating mask include a common portion of the plating mask. However, Yeo (annotated fig. 5D) teaches the method of claim 4, wherein the first portion (first portion, this is the portion above 210 and wherein an opening is later formed, see fig. 5E) and the second portion (second portion, this is the portion exposed through MK1) of the plating mask ([0059], PR1, [0060], PR2) include a common portion (see annotated fig. 5D) of the plating mask (PR1, PR2). Yeo then performs a single development process ([0061]) to form the opening for the metal pillar ([0062]). Yeo simplifies the process of manufacture by reducing the number of development processes required to form a metal pillar with two different widths. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of Hu to utilize the single development process of Yeo to simplify the manufacturing process. PNG media_image1.png 594 810 media_image1.png Greyscale Annotated Figure 5D Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Hu and Yu-830 as applied to Claim 4, and further in view of a second embodiment of Hu and Yeo. Regarding Claim 9, Hu doesn’t teach the method of claim 4, wherein the second opening comprises an upper portion and a lower portion, wherein the lower portion is narrower than the upper portion, and wherein the upper portion and the lower portion form a step. In a second embodiment, Hu (fig. 15) teaches wherein the lower portion (opening where 1526 is formed) is narrower ([0066]) than the upper portion (opening where 124 is formed) while still maintaining the function of a conductive pillar. One of ordinary skill in the art could have substituted the conductive pillar of Hu for the alternative conductive pillar of Hu’s second embodiment and yielded the predictable results of electrical connection through a conductive pillar. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the conductive pillar of Hu for the alternative conductive pillar of Hu’s second embodiment, since simple substitution of conductive pillars for another is an appropriate rationale to support a rejection under 35 U.S.C. 103. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007). Furthermore, Yeo (fig. 5E) teaches the second opening (openings in PR2 and PR1, see fig. 5E) comprises an upper portion ([0061], opening positioned between portions of PR2) and a lower portion ([0061], opening positioned between portions of PR1), wherein the upper portion and the lower portion form a step (see fig. 5E). Yeo then performs a single development process ([0061]) to form the opening for the metal pillar ([0062]). Yeo simplifies the process of manufacture by reducing the number of development processes required to form a metal pillar with two different widths. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of Hu to utilize the single development process of Yeo to simplify the manufacturing process. Claims 21-22 and 25 are rejected under 35 U.S.C. 103 as being unpatentable over Yu in view of Yu-830. Regarding Claim 21, Yu (fig. 26) teaches a method comprising: forming a first package component ([0027], 160) comprising: forming a bottom dielectric layer ([0027], 156); forming a micro-bump ([0047], 176, see fig. 22C) protruding below the bottom dielectric layer (156); and forming a metal pillar ([0038], 162) protruding below the bottom dielectric layer (156), wherein the metal pillar (162) has an upper portion (upper portion, see annotated fig. 20B) having a top width (width of upper portion) and a lower portion (lower portion, see annotated fig. 20B) having a bottom width (width of lower portion) greater than the top width (see annotated fig. 20B), and wherein both of the top width and the bottom width are measured at levels lower than a bottom surface of the bottom dielectric layer, wherein portions of the metal pillar (162) having the top width and the bottom width are formed in a same plating process ([0040], 162 may be formed through plating), and wherein a first sidewall (first sidewall, see annotated fig. 20B) of the upper portion (upper portion) forms a step (see annotated fig. 20B) with a top surface (top surface, see annotated fig. 20B) and a second sidewall (second sidewall, see annotated fig. 20B) of the lower portion (lower portion), and the upper portion and the lower portion are formed of a same material ([0040], the conductive material) and are free from distinguishable interface in between (see fig. 26); bonding a die ([0041], 170) to the micro-bump (176), wherein the die (170) is underlying the micro-bump (176); bonding a second package component ([0045], 400) to the first package component (160), wherein the second package component (400) is underlying the first package component (160), and the second package component (400) comprises a conductive feature ([0075], 402) bonding to the metal pillar (162) through a solder region ([0050], 166) in between. Yu doesn’t teach both of the top width and the bottom width are measured at levels lower than a bottom surface of the bottom dielectric layer. However, Yu-830 (fig. 5B) teaches forming a metal pillar ([0036], 122) protruding below the bottom dielectric layer ([0017], 112), wherein the metal pillar (122) has a top width ([0036], 410) and a bottom width ([0036], 312) greater than the top width (410) and wherein both of the top width (410) and the bottom width (312) are measured at levels lower than a bottom surface of the bottom dielectric layer (bottom of 112, see fig. 2). Yu-830 also teaches that this shape allows the solder to wet the sidewalls of the pillar and further strengthen the attachment of the solder ([0036]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of Yu to include the pillar of Yu-830 to strengthen attachment of solder. PNG media_image2.png 305 670 media_image2.png Greyscale Annotated Figure 20B Regarding Claim 22, Yu (fig. 26) teaches the method of claim 21, wherein a topmost end of the solder region (top of 166) is at substantially a same level as a bottom surface of the metal pillar (bottom of 162). Regarding Claim 25, Yu (fig. 26) teaches the method of claim 21, wherein the solder region (166) is spaced apart from the first sidewall of the upper portion (sidewall of 162 in contact with sidewall 156). Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Yu and Yu-830 as applied to Claim 21, and further in view of Seo et al. (2017/0084561 A1; hereinafter Seo). Regarding Claim 24, Yu doesn’t teach the solder region extends to a topmost end of the second sidewall of the lower portion. However, Seo (fig. 2) teaches the method of claim 21, wherein the solder region ([0036], 160) extends to a topmost end of the second sidewall ([0048], bottommost end of 156S) of the lower portion ([0042], 156). Seo also teaches that this increases the contact area and allows for a larger amount of solder to be disposed without collapsing ([0049]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of Yu to include the solder placement of Seo to increase the contact area of the solder. Claim 27 is rejected under 35 U.S.C. 103 as being unpatentable over Hu as applied to Claim 26, and further in view of Seo. Regarding Claim 27, Hu (fig. 15) teaches the method of claim 26, wherein forming a solder region ([0044], 126), wherein the solder region (126) is underlying and joining to an additional bottom surface of the metal pillar (top surface of 120), and wherein the solder region extends to a top end of the second portion of the metal pillar. Hu doesn’t teach wherein the solder region extends to a top end of the second portion of the metal pillar. However, Seo (fig. 2) teaches the solder region ([0036], 160) extends to a top end of the second portion ([0048], bottommost end of 156S) of the metal pillar ([0036], 150). Seo also teaches that this increases the contact area and allows for a larger amount of solder to be disposed without collapsing ([0049]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of Hu to include the solder placement of Seo to increase the contact area of the solder. Claim 31 is rejected under 35 U.S.C. 103 as being unpatentable over Hu as applied to Claim 26, and further in view of a second embodiment of Hu. Regarding Claim 31, Hu doesn’t explicitly teach the method of claim 26, wherein the first sidewall is joined to the bottom surface of the bottom dielectric layer. However, Hu (fig. 17) teaches the first sidewall ([0070], sidewall of 124) is joined to the bottom surface of the bottom dielectric layer ([0070], the top surface of 1708/208 contacts the sidewall of 124) (note that fig. 17 is rotated 180 degrees when compared to the claimed invention and therefore bottom may be interpreted as top). One of ordinary skill in the art could have substituted the dielectric layer of the second embodiment of Hu for the dielectric layer of the first embodiment of Hu and yielded the predictable results of electrically insulating features in a stepped conductive pillar. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the dielectric layer of the second embodiment of Hu for the dielectric layer of the first embodiment of Hu, since simple substitution of dielectric layers for another is an appropriate rationale to support a rejection under 35 U.S.C. 103. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADIN HRNJIC whose telephone number is (571)270-1794. The examiner can normally be reached Monday-Friday 8:00 AM - 4:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /A.H./Examiner, Art Unit 2817 /Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817 April 10, 2026
Read full office action

Prosecution Timeline

Jun 02, 2022
Application Filed
Jan 28, 2025
Non-Final Rejection mailed — §102, §103, §112
May 28, 2025
Response Filed
Sep 17, 2025
Final Rejection mailed — §102, §103, §112
Nov 17, 2025
Response after Non-Final Action
Jan 16, 2026
Request for Continued Examination
Jan 27, 2026
Response after Non-Final Action
Apr 14, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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ORGANIC LIGHT EMITTING DISPLAY DEVICE
4y 10m to grant Granted Jan 20, 2026
Patent 12514095
DISPLAY SUBSTRATES AND MANUFACTURING METHODS THEREOF, AND DISPLAY DEVICES
4y 2m to grant Granted Dec 30, 2025
Patent 12514029
PART INCLUDING SILICON CARBIDE LAYER AND MANUFACTURING METHOD THEREOF
3y 5m to grant Granted Dec 30, 2025
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
66%
Grant Probability
73%
With Interview (+7.8%)
3y 4m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 58 resolved cases by this examiner. Grant probability derived from career allowance rate.

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