DETAILED ACTION
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 9-12 are rejected under 35 U.S.C. 103 as being unpatentable over Ha et al. (US Pub. 2020/0168552).
Regarding independent claim 9, Ha teaches a method (Fig. 6-8; para. 044+), comprising:
forming a cavity (openings O1, O2, or O3) within a first surface of an interposer (100) having interspersed layers of electrically-conductive traces (Fig. 6; para. 0054);
attaching an integrated circuit device (310) to the interposer within the cavity, wherein an entirety of the integrated circuit device resides above the interposer (Fig. 8; para. 0055-0056); and
attaching a substrate (320 or 330 – please note that “substrate” is considered broad enough to read on semiconductor chips) to the surface of the interposer (para. 0075).
While Ha is silent with respect to the claimed order of attaching the substrate after attaching the integrated circuit device, please note that the selection of any order of performing process steps is prima facie obvious in the absence of new or unexpected results (MPEP 2144.04, IV, C). That is, any order of placing the semiconductor chips 310, 320, and 330 is considered obvious including the claimed order because there is an absence of evidence to new or unexpected results specific to the claimed order.
Re claim 10, Ha teaches wherein attaching the integrated circuit device to the interposer within the cavity comprises: attaching the integrated circuit device to the interposer within the cavity using connection structures (380) between the integrated circuit device and a layer of electrically-conductive traces, of the interspersed layers of electrically-conductive traces, that are exposed at a bottom surface of the cavity (Fig. 8; para. 0057).
Re claim 11, Ha teaches wherein attaching the integrated circuit device to the interposer within the cavity comprises: attaching the integrated circuit device to the interposer within the cavity using connection structures (380) between the integrated circuit device and land structures (152P) extending through a bottom surface to a layer of electrically-conductive traces, of the interspersed layers of electrically- conductive traces, below the bottom surface (para. 0054).
Re claim 12, Ha is silent with respect to attaching a second integrated circuit device to the interposer within the cavity and adjacent to the first integrated circuit device.
Ha teaches wherein the integrated circuit device may be a memory die (para. 0055).
It would have been obvious to one of ordinary skill in the art at the time of filing to provide a second integrated circuit device as claimed for the purpose of providing additional memory. Attaching a second integrated circuit device to the interposer within the cavity and adjacent to the first integrated circuit device amounts to a mere duplication of parts which is not considered to have patentable significance unless a new and unexpected result is produced (MPEP 2144.04, VI, B).
Claim(s) 13 is rejected under 35 U.S.C. 103 as being unpatentable over Ha et al. (US Pub. 2020/0168552) in view of Tsai et al. (US Pub. 2011/0254160).
Re claim 13, Ha is silent with respect to wherein forming the cavity within the surface of the interposer comprises: forming the cavity using a patterning and etching process.
Tsai teaches wherein forming a cavity within the surface of the interposer comprises: forming the cavity using a patterning and etching process (Fig. 1C; para. 0018).
It would have been obvious to one of ordinary skill in the art at the time of filing to look to Tsai to provide that which was missing from Ha; that is, a cavity forming method, to arrive at the claimed invention.
Claim(s) 14 is rejected under 35 U.S.C. 103 as being unpatentable over Ha et al. (US Pub. 2020/0168552) in view of Shin et al. (US Pub. 2019/01026604).
Re claim 14, Ha is silent with respect to wherein forming the cavity within the surface of the interposer comprises: forming the cavity using a laser ablation process.
Shin teaches wherein forming a cavity within a surface of an interposer comprises: forming the cavity using a laser ablation process (para. 0071).
It would have been obvious to one of ordinary skill in the art at the time of filing to look to Shin to provide that which was missing from Ha; that is, a cavity forming method, to arrive at the claimed invention.
Allowable Subject Matter
Claims 21-34 are allowed.
The following is a statement of reasons for the indication of allowable subject matter: there is no teaching, suggestion or motivation from the prior art of record, nor does the prior art of record otherwise make obvious the limitations of…
Re claims 21-28, “…attaching an integrated circuit die to a first surface of an interposer; forming, after attaching the integrated circuit die, a cavity in a second surface of the interposer to expose one or more lands or traces of the interposer, wherein the second surface is opposite from the first surface…and attaching…an integrated circuit device…wherein an entirety of the integrated circuit device resides above the interposer…
Re claims 29-34, …attaching an integrated circuit die to a first surface of an interposer; forming, after attaching the integrated circuit die, a cavity in a second surface of the interposer, wherein the second surface is opposite from the first surface; attaching an integrated circuit device to the interposer within the cavity, wherein an entirety of the integrated circuit device resides above the interposer…
…in combination with the other limitations.
Response to Arguments
Applicant’s arguments with respect to claim(s) 9-14 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Applicant’s arguments with respect to claims 21-28 and 29-34 have been fully considered and are persuasive. Claims 21-28 and 29-34 have been indicated as allowable in light of the amendments to the claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOLLY KAY REIDA whose telephone number is (571)272-4237. The examiner can normally be reached M-F 8:30-5:00PM.
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/MOLLY K REIDA/ Examiner, Art Unit 2899