Prosecution Insights
Last updated: July 17, 2026
Application No. 17/808,175

ANISOTROPIC WET ETCHING IN PATTERNING

Non-Final OA §103
Filed
Jun 22, 2022
Examiner
MELLINGER, CORBYN DAVID
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
3 (Non-Final)
73%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
22 granted / 30 resolved
+5.3% vs TC avg
Strong +44% interview lift
Without
With
+44.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
13 currently pending
Career history
58
Total Applications
across all art units

Statute-Specific Performance

§103
80.9%
+40.9% vs TC avg
§102
9.6%
-30.4% vs TC avg
§112
8.8%
-31.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 30 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 13 January 2026 has been entered. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-4, 6-16, and 21-25 are rejected under 35 U.S.C. 103 as being unpatentable over US 20210013110 (Mun et al), US 20210104616 (Su et al), and US 20110147341 (Sato et al). Examiner notes that although Su has a common assignee to the instant application, Su is being used as prior art under 35 USC §102(a)(1). As to Claim 1, Mun teaches a method of forming a semiconductor device having at least two different semiconductor structures (Mun Fig 17, structure in R1 is NMOS and structure in R2 is PMOS [0019]), the method comprising: forming a metal layer (metal layer Wp [0069]) over a first semiconductor structure (structure CH2) and a second semiconductor structure (structure CH1); forming a patterned photolithographic layer over the metal layer over the first semiconductor structure (as shown in Fig 19) by: forming a photolithographic layer (comprising layers OM1, ML, and PR in Fig 18) over the metal layer (photolithographic layer over metal layer Wp); and removing the photolithographic layer that is over the metal layer that is the over the second semiconductor structure (OM1, ML, and PR removed over second structure in R1 as shown in steps from Fig 18 to Fig 20); removing the metal layer from the second semiconductor (Wp over structure CH1) structure via wet etch operations (removal of Wp shown in Fig 21; performed by wet etching [0081]) using a chemical etchant that is tuned to resist penetration into the photolithographic layer (MP used as etching mask during operation [0081]; layer OM1 left substantially unchanged between Figs 20 and 21); and achieving, after the wet etch operations using the chemical etchant, a remaining metal ratio of a distance X (shown on annotated Fig 21) over a distance Y (shown on annotated Fig 21) that is greater than 1 (X > Y; X longer than Y by amount “RE” shown on Fig 21), wherein X is a first distance from a first line extending from an edge of the remaining metal layer over the first semiconductor structure to a second line extending from an edge of a channel region in the second semiconductor structure, and Y is a second distance from the first line to a third line extending from an edge of the metal layer formed over [[the]] a channel region in the first semiconductor structure (X, Y satisfying all these definitional components). PNG media_image1.png 895 1086 media_image1.png Greyscale While Mun discloses these distances X, Y which satisfy the requirement (X/Y) > 1, Mun does not disclose enough detail to explicitly teach that (X/Y) < 179. Mun discloses that distance RE may be, for example, on the scale of 3-5 nm ([0083]). Examiner additionally notes that the diagram of Fig 21 in Mun could be reasonably interpreted to show the device satisfying 1 < (X/Y) < 179. Su teaches a semiconductor device similar to that of Mun, having two semiconductor regions (Su Fig 4, adjacent patterned stacks of semiconductor layers 402) where the two regions are separated by a distance of between 14 and 40 nm (P1 between 14 and 40 nm [0065]). Mun, when combined with the teaching from Su that adjacent semiconductor patterns may be separated by, for example, 30 nm, then the distance “X” disclosed by Mun is reasonably interpreted to be (30+4)=34 nm, and consequently the distance “Y” disclosed by Mun is reasonably interpreted to be (30-4)=26 nm, giving a ratio of X/Y of approximately 1.3, satisfying the limitation 1 < (X/Y) < 179 in claim 1. It would have been obvious to one of ordinary skill in the art at the time of filing to combine the method taught by Mun with the scale of similar devices known to those in the art to teach all limitations of claim 1, as Su simply provides reasonable distance scales to the disclosure of Mun. Mun and Su fail to explicitly teach wherein the chemical etchant comprises an organic acid which has a molecular weight of at least 14 g/mol. Sato discloses an etching solution suited for etching titanium-based metals and their nitrides. Sato explicitly teaches that the etching is done by a solution comprising an organic acid, an oxidant, and water (organic acid salt, hydrogen peroxide being an oxidant, and water [0022] wherein the salt can be citric acid having molecular weight of 192 g/mol [0025]). It would have been obvious to one of ordinary skill in the art at the time of filing to combine the etching solution taught by Sato with the method of forming a semiconductor device involving etching of TiN (etched metal layer Wp can be TiN; see Mun [0069]) taught by the combination of Mun and Su in order to etch the TiN layer in a predictable and controlled manner, so that the wet etching can be stopped as quickly as possible, in turn reducing unintended etching of other features. As to Claim 2, the combination Mun, Su and Sato teaches the method of claim 1. The wet etchant disclosed by this combination is sufficient to satisfy all limitations of the final device produced, and is therefore being reasonably interpreted to have been appropriately selected based on, as possible examples, molecular weight, steric effect, and polarity. As to Claim 3, the combination of Mun, Su, and Sato teaches the method of claim 2. Sato, as applied to claim 1, teaches the chemical etchant is a solution comprising the organic acid, an oxidant, and water (organic acid salt, hydrogen peroxide being an oxidant, and water [0022]). As to Claim 4, the combination of Mun, Su, and Sato teaches the method of claim 3. Sato, as applied to claim 3, further teaches that the organic acid: has a molecular weight from 14 to 104 g/mol (e.g., citric acid disclosed by Sato [0025]; has molecular weight of about 192 g/mol); has a concentration ranging from 0.001 to 100wt% (solution disclosed by Sato is between 0.1 and 15 wt% organic acid salt [0022]). As to Claim 6, the combination of Mun, Su, and Sato teaches the method of claim 3. Sato, as applied to claim 1, further teaches the oxidant in the solution has a concentration ranging from 0.1 to 107 ppm (hydrogen peroxide acting as oxidant, comprising 10-40 wt% of solution [0022]. In an example solution of 30 wt% hydrogen peroxide, 10 wt% citric acid, and 60 wt% water, the concentration of hydrogen peroxide is approximately 2 x 105 ppm, within the range claimed). As to Claim 7, the combination of Mun, Su, and Sato teaches the method of claim 1. Mun further teaches that the metal layer (Wp) comprises a work function metal layer for setting a threshold voltage of a transistor (Mun discloses TiN as an exemplary work function metal layer material [0036], and later that Wp may include TiN [0069]). As to Claim 8, the combination of Mun, Su, and Sato teaches the method of claim 1. Mun further teaches that the metal layer (Wp) comprises a transition metal (Wp may include TiN [0069], where Ti is a transition metal). As to Claim 9, the combination of Mun, Su, and Sato teaches the method of claim 1. Mun further teaches the metal layer (Wp) has a thickness from 0.5 to 20 nm (Wp thickness substantially same thickness as region RE removed, 3-5 nm [0083]). Examiner also notes that Su teaches the metal layer may also range between 2-15 nm (Su, [0040]) providing additional range to layer Wp reasonably considered. As to Claim 10, the combination of Mun, Su, and Sato teaches the method of claim 1. Mun further teaches that the photolithographic layer (comprising layers OM1, ML, and PR in Fig 18 of Mun) comprises an organic hard mask (OM1; [0071]). As to Claim 11, the combination of Mun, Su, and Sato teaches the device of claim 1. Mun further teaches that the photolithographic layer (comprising layers OM1, ML, and PR in Fig 18 of Mun) comprises an inorganic hard mask (ML may include an inorganic oxide [0077]). As to Claim 12, Mun teaches a method of forming a semiconductor device having at least two different types of semiconductor structures (Mun Fig 17, structure in R1 is NMOS and structure in R2 is PMOS [0019]), the method comprising: forming a metal layer (Mun Fig 17, metal layer Wp [0069]) over a first semiconductor structure (structure CH2) and a second semiconductor structure (structure CH1); forming a patterned photolithographic layer over the metal layer over the first semiconductor structure (as shown in Fig 19) by: forming a photolithographic layer (comprising layers OM1, ML, and PR in Fig 18) over the metal layer (photolithographic layer over metal layer Wp); and removing the photolithographic layer that is over the metal layer that is the over the second semiconductor structure (OM1, ML, and PR removed over second structure in R1 as shown in steps from Fig 18 to Fig 20); removing the metal layer from the second semiconductor including above and between first vertically stacked channel regions of the second semiconductor structure (Wp over structure CH1) structure via wet etch operations (removal of Wp shown in Fig 21 performed by wet etching [0081]. Removal of the remainder Ws may then be performed later again using wet etch operations; see Fig 25 and [0089]) using a chemical etchant (MP used as etching mask during operation [0081]; layer OM1 left substantially unchanged between Figs 20 and 21), and achieving, via the wet etch operations using the chemical etchant solution, a remaining metal ratio of a distance X (shown on annotated Fig 21) over a distance Y (shown on annotated Fig 21) that is greater than 1 (X > Y; X longer than Y by amount “RE” shown on Fig 21), wherein X is a first distance from a first line extending from an edge of the remaining metal layer over the first semiconductor structure to a second line extending from an edge of the first vertically stacked channel regions in the second semiconductor structure, and Y is a second distance from the first line to a third line extending from an edge of the metal layer formed over second vertically stacked channel regions in the first semiconductor structure (X, Y satisfying all these definitional components. Note that the definitions of X, Y on the annotated Fig 21 also apply to Mun Fig 25 which shows removal of all portions of the metal layer as claimed). While Mun discloses these distances X, Y which satisfy the requirement (X/Y) > 1, Mun does not disclose enough detail to explicitly teach that (X/Y) < 179. Mun discloses that distance RE may be, for example, on the scale of 3-5 nm ([0083]). Examiner additionally notes that the diagram of Fig 21 in Mun could be reasonably interpreted to show the device satisfying 1 < (X/Y) < 179. Additionally, Mun does not explicitly teach that the chemical etchant comprises an organic acid, an oxidant, and water. Su teaches a semiconductor device similar to that of Mun, having two semiconductor regions (Su Fig 4, adjacent patterned stacks of semiconductor layers 402) where the two regions are separated by a distance of between 14 and 40 nm (P1 between 14 and 40 nm [0065]). Mun, when combined with the teaching from Su that adjacent semiconductor patterns may be separated by, for example, 30 nm, then the distance “X” disclosed by Mun is reasonably interpreted to be (30+4)=34 nm, and consequently the distance “Y” disclosed by Mun is reasonably interpreted to be (30-4)=26 nm, giving a ratio of X/Y of approximately 1.3, satisfying the limitation 1 < (X/Y) < 179 in claim 12. It would have been obvious to one of ordinary skill in the art at the time of filing to combine the method taught by Mun with the scale of similar devices known to those in the art to teach all limitations of claim 12, as Su simply provides reasonable distance scales to the disclosure of Mun. Still, the combination of Mun and Su does not explicitly teach that the chemical etchant is a solution comprising an organic acid, an oxidant, and water or that the organic acid has a molecular weight of at least 14 g/mol. Sato discloses an etching solution suited for etching titanium-based metals and their nitrides. Sato explicitly teaches that the etching is done by a solution comprising an organic acid, an oxidant, and water (organic acid salt, hydrogen peroxide as an oxidant, and water [0022]. Also discloses wherein the salt can be citric acid having molecular weight of 192 g/mol [0025]). It would have been obvious to one of ordinary skill in the art at the time of filing to combine the etching solution taught by Sato with the method of forming a semiconductor device involving etching of TiN (etched metal layer Wp can be TiN; see Mun [0069]) taught by the combination of Mun and Su in order to etch the TiN layer in a predictable and controlled manner, so that the wet etching can be stopped as quickly as possible, in turn reducing unintended etching of other features. As to Claim 13, the combination of Mun, Su, and Sato teaches the method of claim 12. Sato, as applied to claim 12, further teaches that the organic acid: has a molecular weight from 14 to 104 g/mol (e.g., citric acid disclosed by Sato [0025]; has molecular weight of about 192 g/mol); has a concentration in the chemical etchant solution ranging from 0.001 to 100wt% (solution disclosed by Sato is between 0.1 and 15 wt% organic acid salt [0022]). As to Claim 14, the combination of Mun, Su, and Sato teaches the method of claim 12. Mun further teaches that the metal layer comprises a transition metal (Wp may include TiN [0069], where Ti is a transition metal) and has a thickness from 0.5 to 20nm (Wp thickness substantially same thickness as region RE removed, 3-5 nm [0083]). Examiner also notes that Su teaches the metal layer may also range between 2-15 nm (Su, [0040]) providing additional range to layer Wp reasonably considered. As to Claim 15, the combination of Mun, Su, and Sato teaches the method of claim 12. Mun further teaches that the photolithographic layer (comprising layers OM1, ML, and PR in Fig 18 of Mun) comprises an organic hard mask (OM1; [0071]). As to Claim 16, the combination of Mun, Su, and Sato teaches the method of claim 12. Mun further teaches that the photolithographic layer (comprising layers OM1, ML, and PR in Fig 18 of Mun) comprises an inorganic hard mask (ML may include an inorganic oxide [0077]). As to Claim 21, Mun teaches a method of forming a semiconductor device comprising a first semiconductor structure of a first polarity type and a second semiconductor structure of a second polarity type (Mun Fig 17, structure in R1 is NMOS and structure in R2 is PMOS [0019]), the method comprising: forming a metal layer (Mun Fig 17, metal layer Wp [0069]) over the first semiconductor structure (structure CH2) and the second semiconductor structure (structure CH1); forming a patterned photolithographic layer over the metal layer over the first semiconductor structure (as shown in Fig 19) by: forming a photolithographic layer (comprising layers OM1, ML, and PR in Fig 18) over the metal layer (photolithographic layer over metal layer Wp); and removing the photolithographic layer that is over the second semiconductor structure (OM1, ML, and PR removed over second structure in R1 as shown in steps from Fig 18 to Fig 20); completely removing the metal layer from the second semiconductor (Wp over structure CH1) structure via wet etch operations (removal of Wp shown in Fig 21; performed by wet etching [0081]. Removal of the remainder Ws may then be performed later again using wet etch operations; see Fig 25 and [0089]) using a chemical etchant solution configured to resist penetration (wet etchant disclosed is sufficient to satisfy all limitations of the final device produced, and is therefore being reasonably interpreted to have been appropriately selected based on, as possible examples, molecular weight, steric effect, and polarity) into the photolithographic layer (MP used as etching mask during operation [0081]; layer OM1 left substantially unchanged between Figs 20 and 21), and achieving, after the wet etch operations using the chemical etchant, a remaining metal comprising a distance X (shown on annotated Fig 21) and a distance Y (shown on annotated Fig 21), wherein X is a first distance from a first line extending from an edge of the remaining metal layer over the first semiconductor structure to a second line extending from an edge of a channel region in the second semiconductor structure, and Y is a second distance from the first line to a third line extending from an edge of the metal layer formed over [[the]] a channel region in the first semiconductor structure (X, Y satisfying all these definitional components). Mun does not explicitly teach that the chemical etchant comprises an organic acid, an oxidant, and water, nor does it explicitly teach the distance X plus distance Y being less than 90 nm and greater than 15 nm. Su teaches a semiconductor device similar to that of Mun, having two semiconductor regions (Su Fig 4, adjacent patterned stacks of semiconductor layers 402) where the two regions are separated by a distance of between 14 and 40 nm (P1 between 14 and 40 nm [0065]). Mun, when combined with the teaching from Su that adjacent semiconductor patterns may be separated by, for example, 30 nm, then the distance X plus the distance Y as disclosed by Mun, is equal to 30 nm, which is less than 90 nm and greater than 15 nm, satisfying this limitation in claim 21. It would have been obvious to one of ordinary skill in the art at the time of filing to combine the method taught by Mun with the scale of similar devices known to those in the art to teach distance scales taught by Su, as Su simply provides reasonable distance scales to the disclosure of Mun. Still, the combination of Mun and Su fails to explicitly teach that the chemical etchant comprises an organic acid, an oxidant, and water or that the organic acid has a molecular weight of at least 14 g/mol. Sato discloses an etching solution suited for etching titanium-based metals and their nitrides. Sato explicitly teaches that the etching is done by a solution comprising an organic acid, an oxidant, and water (organic acid salt, hydrogen peroxide as an oxidant, and water [0022]. Also discloses wherein the salt can be citric acid having molecular weight of 192 g/mol [0025]). It would have been obvious to one of ordinary skill in the art at the time of filing to combine the etching solution taught by Sato with the method of forming a semiconductor device involving etching of TiN (etched metal layer Wp can be TiN; see Mun [0069]) taught by the combination of Mun and Su in order to etch the TiN layer in a predictable and controlled manner, so that the wet etching can be stopped as quickly as possible, in turn reducing unintended etching of other features. As to Claim 22, the combination of Mun, Su, and Sato teaches the method of claim 21. Sato, as applied to claim 21, further teaches the organic acid has a molecular weight from 14 to 104 g/mol (call with attorney on 26 March 2025 confirmed upper limit is to read 104 g/mol, in line with other similar claims and the specification. e.g., citric acid disclosed by Sato [0025]; has molecular weight of about 192 g/mol) As to Claim 23, the combination of Mun, Su, and Sato teaches the method of claim 21. Mun further teaches that the metal layer (Wp) comprises a work function metal layer for setting a threshold voltage of a transistor (Mun discloses TiN as an exemplary work function metal layer material [0036], and later that Wp may include TiN [0069]). As to Claim 24, the combination of Mun, Su, and Sato teaches the method of claim 21. Sato, as applied to claim 21, further teaches the organic acid has a concentration in the chemical etchant solution ranging from 0.001 to 100wt% (solution disclosed by Sato is between 0.1 and 15 wt% organic acid salt [0022]). As to Claim 25, the combination of Mun, Su, and Sato teaches the method of claim 21. Su, as applied to claim 21, further teaches that the thickness of a work function metal layer may be between 2 and 15 nm (Su, [0040]). When combined with the teaching of Mun that the length of recess region RE can be approximately equal to the thickness of the metal layer, using a layer thickness of 10 nm as example, the difference between distances X and Y then equates to (2 x RE) = 20nm, which is less than 89.5 nm and greater than 14.5 nm, thereby satisfying the limitation of claim 25. Response to Arguments Applicant's arguments filed 13 January 2026 have been fully considered but they are not persuasive. While the removal of limitations from claims 1, 12, and 21 overcome the previous rejection under 35 USC §112(a), all pending claims are still rejected under 35 USC §103 as presented above. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Corbyn D Mellinger whose telephone number is (703)756-5683. The examiner can normally be reached M-F 9-6 Eastern. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached on 571-272-2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Corbyn D Mellinger/Examiner, Art Unit 2899 /ZANDRA V SMITH/Supervisory Patent Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Show 3 earlier events
Jul 09, 2025
Examiner Interview Summary
Jul 09, 2025
Response Filed
Jul 09, 2025
Applicant Interview (Telephonic)
Aug 13, 2025
Final Rejection mailed — §103
Nov 12, 2025
Interview Requested
Jan 13, 2026
Request for Continued Examination
Jan 24, 2026
Response after Non-Final Action
Jun 15, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
73%
Grant Probability
99%
With Interview (+44.4%)
3y 2m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 30 resolved cases by this examiner. Grant probability derived from career allowance rate.

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