Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2, 8 are rejected under 35 U.S.C. 103 as being unpatentable over Kobayashi (JP 2013069886 A) in view of Gaynes (US 8008122 B1).
Re: Independent Claim 1 (Currently amended), Kobayashi discloses a method of processing a wafer (Kobayashi, Fig 1, #10) having
a plurality of devices (Kobayashi, Description of embodiments 1st paragraph, Fig 1, #102) formed in respective areas on a face side of the wafer (Kobayashi, Fig 1, #10a), the areas (Kobayashi, areas on front side of the wafer where #101 are present) being demarcated by a plurality of intersecting projected dicing lines (Kobayashi, Fig 1, #101),
the method comprising:
a resin applying step (Kobayashi, Fig 5a) of coating the face side of the wafer with a liquid resin (Kobayashi, Fig 5a, #60) to cover an area of the wafer (Kobayashi, area on front side of the wafer 10 where #102 are present) where the plurality of devices are present;
a resin curing step (Kobayashi, Fig 5b) of curing the liquid resin into a protective film (Kobayashi, Fig 5b, #600);
and a planarizing step of planarizing the protective film (Kobayashi, Description of embodiments, Fig 9, protective film flattening step is performed);
and a step of removing the protective film from the wafer (Kobayashi, after processing the wafer, dissolving and removing protective film 600 from wafer 10 using a cleaning liquid in a protective-film removing device).
Kobayashi is silent regarding,
devices, each having a plurality of bumps thereon, and such that the liquid resin fully engulfs the bumps on the devices, thereby covering the face side of the wafer without leaving clearances thereon.
However, Gaynes teaches devices, each having a plurality of bumps thereon, and such that the liquid resin fully engulfs the bumps on the devices, thereby covering the face side of the wafer without leaving clearances thereon (Gaynes teaches, in Fig. 2A and column 7, lines 40-55, bump structures (C4 balls 300) and further teaches applying a resin (310) over bump structure such that the resin thickness is greater than the height of the bump array, thereby covering/engulfing the bumps).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to apply Kobayashi’s protective film coating/curing and planarizing method to a wafer having bump structures as taught by Gaynes, and to apply the resin in an amount sufficient to fully cover the bumps, in order to provide a continuous protective film over the face side surface features (including bumps).
Re: Claim 2 (Original), Kobayashi and Gaynes disclose all the limitations of claim 1 on which this claim depends. Kobayashi further discloses,
wherein the planarizing step includes the steps of holding a reverse side of the wafer on a chuck table (Kobayashi, Description of embodiments, wafer #10 with side #10b down is held on the chuck table #52), exposing the face side of the wafer (Kobayashi, side #10a is on the upper side), and cutting the protective film to planarize the protective film with a cutting unit (Kobayashi, Fig 3, cutting tool body #331) having a single-point cutting tool (Kobayashi, Fig 3, Cutting tool #33 is a single point cutting tool since it is formed of tool steel such as cemented carbide, and diamond or the like provided at the tip of the cutting tool body).
Re: Claim 8 (Previously presented), Kobayashi and Gaynes disclose all the limitations of claim 1 on which this claim depends. Gaynes further discloses,
wherein, in the planarizing step, the protective film is planarized such that the bumps are not exposed (Gaynes teaches, in Fig. 2A and column 7, lines 40-55, applying a fill material (e.g., over-bump applied resin OBAR) over an array of bumps (C4 balls 300), where the thickness of the fill material is greater than the height of the array of bumps by an additional thickness (e.g., 5 microns to 50 microns), such that the bumps not exposed).
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Kobayashi (JP 2013069886 A) in the view of Gaynes (US 8008122 B1) further in view of Sugitani (JP 2018029097 A).
Re: Claim 3 (Original), Kobayashi and Gaynes disclose all the limitations of claim 1 on which this claim depends.
Kobayashi and Gaynes are silent regarding:
further comprising: a modified layer forming step of forming modified layers in the wafer along the respective projected dicing lines by applying a laser beam having a wavelength transmittable through the wafer to the wafer from a reverse side of the wafer along the projected dicing lines while positioning a focused spot of the laser beam within the wafer; and a dividing step of grinding the reverse side of the wafer with grindstones to finish the wafer to a predetermined thickness and dividing the wafer into individual device chips along the modified layers.
However, Sugitani in same wafer dicing art teaches a modified layer forming step of forming modified layers in the wafer (Sugitani, Fig 3A Step of forming modified layer 19) along the respective projected dicing lines by applying a laser beam (Sugitani, Fig 3A, laser beam from laser apparatus 12) having a wavelength transmittable through the wafer to the wafer from a reverse side of the wafer (Sugitani, back surface side 11b of the device wafer 11) along the projected dicing lines (Sugitani, division lines 15) while positioning a focused spot of the laser beam (Sugitani, Fig 3A, laser beam is focused to predetermined depth of the wafer 11) within the wafer; and a dividing step of grinding the reverse side of the wafer with grindstones (Sugitani, Fig 5B, grinding apparatus 2 grinds and thins the back surface 11b) to finish the wafer to a predetermined thickness and dividing the wafer into individual device chips along the modified layers (the grinding apparatus 2 not only grinds and thins the back surface 11b of the device wafer 11, but also divides the device wafer 11 into individual device chips 1 by the thinning along modified layer 19).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include modified layer forming step and dividing step of grinding the reverse side of the wafer with grindstones of Sugitani in the wafer processing method of Kobayashi in view of Gaynes in order to simplify the process since thinning and division can be performed simultaneously (Sugitani, Description of embodiments, ¶ 71).
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Kobayashi (JP 2013069886 A) in the view of Gaynes (US 8008122 B1) further in view of Harikai (US 20190157100 A1).
Re: Claim 7 (Previously Presented), Kobayashi and Gaynes disclose all the limitations of claim 1 on which this claim depends.
Kobayashi and Gaynes are silent regarding,
wherein, in the resin applying step, the liquid resin is supplied in multiple applications.
However, Harikai teaches wherein, in the resin applying step, the liquid resin is supplied in multiple applications (Harikai teaches, in its claim 5, in protective film forming step, a sub-step for applying the first mixture to form the coated film and sub-step for drying the coated film are repeated two or more times).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Kobayashi’s resin applying step such that the liquid resin is supplied in multiple applications, as taught by Harikai, in order to improve coating coverage and thickness uniformity over the surface (Harikai, ¶ [0040]).
Claims 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Kobayashi (JP 2013069886 A) in the view of Namiki (US 20200023487 A1).
Re: Independent Claim 9 (Previously Presented), Kobayashi discloses a method of processing a wafer
having a plurality of devices (Kobayashi, Description of embodiments 1st paragraph, Fig 1, #102) formed in respective areas on a face side of the wafer (Kobayashi, Fig 1, #10a), the areas (Kobayashi, areas on front side of the wafer where #101 are present) being demarcated by a plurality of intersecting projected dicing lines (Kobayashi, Fig 1, #101), the method comprising:
a resin applying step (Kobayashi, Fig 5a) of coating the face side of the wafer with a liquid resin (Kobayashi, Fig 5a, #60) to cover an area of the wafer (Kobayashi, area on front side of the wafer 10 where #102 are present) where the plurality of devices are present;
a resin curing step (Kobayashi, Fig 5b) of curing the liquid resin into a protective film (Kobayashi, Fig 5b, #600); and
a planarizing step of planarizing the protective film (Kobayashi, Description of embodiments, Fig 9, protective film flattening step is performed).
Kobayashi is silent regarding the planarizing step by using a polishing apparatus.
However, Namiki teaches planarizing step by using a polishing apparatus (Namiki teaches, in Fig 1 and ¶ [0036], planarizing/polishing wafer W by a polishing apparatus).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Kobayashi’s planarizing step of the protective film to be performed using a polishing apparatus as taught by Namiki, because a polishing apparatus is a known and predictable planarization tool for producing a fattened uniform surface, and would have achieved the same intended result of Kobayashi’s planarization.
Re: Claim 10 (Previously Presented), Kobayashi and Namiki disclose all the limitations of claim 9 on which this claim depends.
Kobayashi further teaches wherein the planarizing step includes the steps of holding a reverse side of the wafer on a chuck table (Kobayashi, Description of embodiments, wafer #10 with side #10b down is held on the chuck table #52), exposing the face side of the wafer (Kobayashi, side #10a is on the upper side).
Namiki further teaches planarizing the protective film with the polishing apparatus (Namiki teaches, in Fig 1 and ¶ [0036], planarizing/polishing wafer W by a polishing apparatus (also explained in claim 9 rejection above)).
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Kobayashi (JP 2013069886 A) in the view of Namiki (US 20200023487 A1) further in view of Sugitani (JP 2018029097 A).
Re: Claim 11 (Previously Presented), Kobayashi and Namiki disclose all the limitations of claim 9 on which this claim depends.
Kobayashi and Namiki are silent regarding
further comprising: a modified layer forming step of forming modified layers in the wafer along the respective projected dicing lines by applying a laser beam having a wavelength transmittable through the wafer to the wafer from a reverse side of the wafer along the projected dicing lines while positioning a focused spot of the laser beam within the wafer; and a dividing step of grinding the reverse side of the wafer with grindstones to finish the wafer to a predetermined thickness and dividing the wafer into individual device chips along the modified layers.
However, Sugitani in same wafer dicing art teaches
a modified layer forming step of forming modified layers in the wafer (Sugitani, Fig 3A Step of forming modified layer 19) along the respective projected dicing lines by applying a laser beam (Sugitani, Fig 3A, laser beam from laser apparatus 12) having a wavelength transmittable through the wafer to the wafer from a reverse side of the wafer (Sugitani, back surface side 11b of the device wafer 11) along the projected dicing lines (Sugitani, division lines 15) while positioning a focused spot of the laser beam (Sugitani, Fig 3A, laser beam is focused to predetermined depth of the wafer 11) within the wafer; and a dividing step of grinding the reverse side of the wafer with grindstones (Sugitani, Fig 5B, grinding apparatus 2 grinds and thins the back surface 11b) to finish the wafer to a predetermined thickness and dividing the wafer into individual device chips along the modified layers (the grinding apparatus 2 not only grinds and thins the back surface 11b of the device wafer 11, but also divides the device wafer 11 into individual device chips 1 by the thinning along modified layer 19).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include modified layer forming step and dividing step of grinding the reverse side of the wafer with grindstones of Sugitani in the wafer processing method of Kobayashi in view of Namiki in order to simplify the process since thinning and division can be performed simultaneously (Sugitani, Description of embodiments, ¶ 71).
Response to Arguments
Applicant's arguments filed 03/25/2026 have been fully considered but they are not persuasive.
Applicant argues that Gaynes’s resin 310 is a permanent underfill, whereas Kobayashi’s protective film is temporary and removed. However, the rejection does not propose replacing Kobayashi’s removable protective film with Gaynes’ permanent underfill. Kobayashi is relied upon for applying liquid resin 60 over the face side of wafer 10, curing the resin into protective film 600, planarizing the protective film, and subsequently removing the protective film. Gaynes is relied upon only for teaching devices having plurality of bumps 300 and applying resin 310 in a thickness greater than the height of bumps, thereby surrounding and extending above the bumps. It would have been obvious to apply Kobayashi’s removable resin in an amount sufficient to cover bumped devices, as taught by Gaynes, so that the resin fully engulfs the bumps and forms a continuous protective film than can be planarized. The modification retains Kobayashi’s temporary protective film and removal step. The fact that Haynes retains its underfill does not teach away from the combination because Gyanes does not discourage the use of removable resin over bumps. Further, the test for obviousness is not whether the features of a secondary reference may be bodily incorporating Gaynes’ entire structure into Kobayashi. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art.
Applicant’s argument that the bumps remain covered after planarization is also not persuasive because claim 1 does not require that the bumps remain unexposed after planarization.
Accordingly, the amendment does not overcome the rejection because Kobayashi expressly teaches that limitation. Hence, the rejection of claim 1 under 35 U.S.C 103 is maintained.
Conclusion
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/BIPANA ADHIKARI DAWADI/ Examiner, Art Unit 2898
/JESSICA S MANNO/SPE, Art Unit 2898