Prosecution Insights
Last updated: April 19, 2026
Application No. 17/810,566

SEMICONDUCTOR WAFER WITH A HIGH DENSITY OF PRIME INTEGRATED CIRCUIT DIES CONTAINED THEREIN

Non-Final OA §103
Filed
Jul 01, 2022
Examiner
CULBERT, CHRISTOPHER A
Art Unit
2815
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Psemi Corporation
OA Round
3 (Non-Final)
41%
Grant Probability
Moderate
3-4
OA Rounds
3y 8m
To Grant
46%
With Interview

Examiner Intelligence

Grants 41% of resolved cases
41%
Career Allow Rate
137 granted / 333 resolved
-26.9% vs TC avg
Minimal +4% lift
Without
With
+4.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
81 currently pending
Career history
414
Total Applications
across all art units

Statute-Specific Performance

§103
55.8%
+15.8% vs TC avg
§102
20.9%
-19.1% vs TC avg
§112
22.1%
-17.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 333 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 9/30/2025 has been entered. Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claim(s) 1-7, 9, 11-16, and 21-25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Applicant’s Admitted Prior Art (using US 2024/0006251 A1 for reference; hereinafter AAPA) in view of Gonzalez-Zalba (US 2024/0127098 A1). Regarding claim 1, AAPA discloses a semiconductor wafer (Fig. 1) comprising: a plurality of prime dies (40), each prime die comprising: a prime integrated circuit (¶ 0025); and at least one hybrid die (“alignment die 65”, which is considered a hybrid die as it is used for “multiple purposes”, ¶ 0031) comprising: a measurement zone (see Fig. 4) comprising a conductor (190); and at least three under bump metallization pads (60) coupled to the conductor. AAPA does not explicitly disclose that each prime die comprises a plurality of under bump metallization pads on the prime integrated circuit. However, AAPA discloses the use of under bump metallization pads (¶ 0028). There was a benefit to using under bump metallization pads in that it enhances electrical connections. It would have been obvious to one having ordinary skill in the art before the Application's effective filing date to use a plurality of under bump metallization pads on the prime integrated circuit for this benefit. AAPA further discloses that a function of the alignment “may include bump placement” (¶ 0030). There was a benefit to forming the testing structures to have the under bump metallization pads of the measurement zone of the hybrid die to be aligned to match positions of at least three under bump metallization pads of the prime dies for the benefit of testing the placement of the under bump metallization pads in the prime die. AAPA does not disclose that the conductor is serpentine shaped. Gonzalez-Zalba discloses forming conductors to have a serpentine shape (¶ 0033). There was a benefit to forming conductors to have a serpentine shape in that the conductor may occupy a smaller area (¶ 0033). It would have been obvious to one having ordinary skill in the art before the Application's effective filing date to form the conductor of AAPA to be serpentine shaped for this benefit. AAPA discloses that the conductor (which will be a serpentine shaped conductor in the wafer of the combination) overlaps the under bump metallization pads of the hybrid die (see Fig. 4). As the under bump metallization pads of the hybrid die will be formed to correspond with the under bump metallization pads of the prime integrated circuit (see discussion, above), the conductor will be sized to correspondingly overlap at least three under bump metallization pads of the plurality of under bump metallization pads that are on the prime integrated circuit of each prime die. With regards to the “reclaimed zone” (i.e., what to do with the space saved from using serpentine shaped conductors), AAPA discloses that the hybrid die may comprise a plurality of electrical test structures (¶ 0029). With regards to the at least three under bump metallization pads being colinearly arranged, increasing the number of metallization pads and arranging three of said pads to be collinearly arranged amounts to duplication and rearrangement of parts which would have been obvious to one having ordinary skill in the art at the time the Application was filed for the benefit of accommodating different circuit layouts (see MPEP 2144.04(VI)). Regarding claim 2, AAPA discloses that the hybrid die may further comprise at least one optical alignment structure (¶ 0031). Regarding claim 3, AAPA further discloses that the semiconductor wafer comprising knockout dies (130, ¶ 0032). Regarding claim 4, AAPA further discloses that the knockout dies comprise a second plurality of electrical test structures (¶ 0032). Regarding claim 5, AAPA further discloses wherein some of the knockout dies further comprise at least optical alignment structure (¶ 0033). Regarding claim 6, AAPA discloses forming the hybrid and knockout dies in corners of the reticle imprint on the semiconductor wafer (see Fig. 1). AAPA does not explicitly disclose forming them to be at the center and four corners of the reticle imprint. However, the duplication and rearrangement of parts is obvious absent new and unexpected results (MPEP 2144.04(VI)(B and C)). Regarding claim 7, AAPA further discloses the use of bumps (“bump placement”, ¶ 0030). There was a benefit to using bumps in that it allows for an electrical connection to be made. It would have been obvious to one having ordinary skill in the art before the Application's effective filing date to include bumps coupled to the at least three under bump metallization pads of the measurement zone for this benefit. Regarding claim 9, AAPA discloses that “there are no limitations imposed on the relative size differences of the various electrical test structures” (¶ 0029). As such, forming the relative sizes such that the reclaimed zone is at least 10 to 100 times larger than the measurement zone would be obvious to one having ordinary skill in the art (see also MPEP 2144.04(IV)(A)). Regarding claim 11, AAPA discloses that the conductor is part of a Kelvin resistance measurement scheme for monitoring resistance (¶ 0030). Regarding claim 12, using monitored resistances to ensure fabrication processing is within quality control limits relates to how the device is intended to be employed. This intended use does not patentably differentiate the claimed device from that of the combination of prior art as “apparatus claims cover what a device is, not what a device does.” Hewlett-Packard Co.v.Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original). A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). Regarding claim 13, AAPA discloses forming the electrical test structures of the first plurality of electrical test structures to not be identical to each other (¶ 0029). Regarding claim 14, AAPA discloses forming the electrical test structures of the second plurality of electrical test structures to not be identical to each other (¶ 0034). Regarding claim 15, AAPA discloses forming the prime dies of the plurality of prime dies to not be identical to each other (¶ 0025). Regarding claim 16, AAPA discloses that the optical alignment structures of the at least one optical alignment structure of each of the knockout dies are not identical to each other (¶ 0033). Regarding claim 21, AAPA discloses a semiconductor wafer (Fig. 1) comprising: a plurality of prime dies (40); at least one hybrid die (“alignment die 65”, which is considered a hybrid die as it is used for “multiple purposes”, ¶ 0031) comprising a measurement zone (see Fig. 4); a conductor (190 in Fig. 4) disposed in the measurement zone; and three hybrid die metallization pads (60) disposed in the measurement zone, each hybrid die metallization pad being coupled to the conductor; wherein the conductor is sized to overlap the three hybrid die metallization pads (see Fig. 4). AAPA does not explicitly disclose that each prime die comprises a plurality of prime die metallization pads. However, AAPA discloses the use of under bump metallization pads (¶ 0028). There was a benefit to using under bump metallization pads in that it enhances electrical connections. It would have been obvious to one having ordinary skill in the art before the Application's effective filing date to use a plurality of under bump metallization pads on the prime die for this benefit. AAPA further discloses that a function of the alignment “may include bump placement” (¶ 0030). There was a benefit to forming the testing structures to have the under bump metallization pads of the measurement zone of the hybrid die to be aligned to match positions of the plurality of metallization pads of the prime dies for the benefit of testing the placement of the metallization pads in the prime die. AAPA does not disclose that the conductor is serpentine shaped. Gonzalez-Zalba discloses forming conductors to have a serpentine shape (¶ 0033). There was a benefit to forming conductors to have a serpentine shape in that the conductor may occupy a smaller area (¶ 0033). It would have been obvious to one having ordinary skill in the art before the Application's effective filing date to form the conductor of AAPA to be serpentine shaped for this benefit. With regards to the “reclaimed zone” (i.e., what to do with the space saved from using serpentine shaped conductors), AAPA discloses that the hybrid die may comprise a plurality of electrical test structures (¶ 0029). With regards to the at least three under bump metallization pads being colinearly arranged, increasing the number of metallization pads and arranging three of said pads to be collinearly arranged amounts to duplication and rearrangement of parts which would have been obvious to one having ordinary skill in the art at the time the Application was filed for the benefit of accommodating different circuit layouts (see MPEP 2144.04(VI)). Regarding claim 22, AAPA further discloses that the semiconductor wafer comprises a plurality of knockout dies (130 in Fig. 1, ¶ 0032), each knockout die comprising a second plurality of electrical test structures (¶ 0032). Regarding claim 23, AAPA further discloses wherein some of the knockout dies further comprise at least optical alignment structure (¶ 0033). Regarding claim 24, AAPA discloses forming the hybrid and knockout dies in corners of the reticle imprint on the semiconductor wafer (see Fig. 1). AAPA does not explicitly disclose forming them to be at the center and four corners of the reticle imprint. However, the duplication and rearrangement of parts is obvious absent new and unexpected results (MPEP 2144.04(VI)(B and C)). Regarding claim 25, AAPA discloses that “there are no limitations imposed on the relative size differences of the various electrical test structures” (¶ 0029). As such, forming the relative sizes such that the reclaimed zone is at least 10 to 100 times larger than the measurement zone would be obvious to one having ordinary skill in the art (see also MPEP 2144.04(IV)(A)). Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Applicant’s Admitted Prior Art (using US 2024/0006251 A1 for reference; hereinafter AAPA) in view of Gonzalez-Zalba (US 2024/0127098 A1) as applied to claim 1, above, and further in view of Cohen et al. (US 10,254,499 B1). Regarding claim 10, Gonzalez-Zalba does not explicitly disclose the shape do the serpentine pattern to determine if it has a shape selected from a square wave shape, a triangular wave shape, a sawtooth wave shape, a sine wave shape, a rectangular shape, or combinations thereof. Cohen discloses that serpentine patterns may be formed to have a shape selected from a square wave shape, a triangular wave shape, a sawtooth wave shape, a sine wave shape, a rectangular shape, or combinations thereof (Col. 72, Lines 17-22). It would have been obvious to one having ordinary skill in the art before the Application's effective filing date to form the serpentine pattern to have a shape selected from a square wave shape, a triangular wave shape, a sawtooth wave shape, a sine wave shape, a rectangular shape, or combinations thereof as changes in shape are a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration of the shape was significant. (MPEP 2144.04(IV)(B)). Response to Arguments Applicant's arguments filed 9/30/2025 have been fully considered but they are not persuasive. Applicant argues that AAPA in view of Gonzalez-Zalba does not disclose the newly added limitation that the pads are colinearly arranged. This argument is not persuasive as arrange three pads to be colinearly arranged is obvious to one having ordinary skill in the art as discussed in the rejections, above. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER A CULBERT whose telephone number is (571)272-4893. The examiner can normally be reached M-F 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Benitez can be reached at (571) 270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHRISTOPHER A CULBERT/ Examiner, Art Unit 2815
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Prosecution Timeline

Jul 01, 2022
Application Filed
Apr 27, 2025
Non-Final Rejection — §103
Jul 29, 2025
Response Filed
Aug 04, 2025
Final Rejection — §103
Sep 25, 2025
Interview Requested
Sep 30, 2025
Response after Non-Final Action
Nov 03, 2025
Request for Continued Examination
Nov 07, 2025
Response after Non-Final Action
Mar 07, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
41%
Grant Probability
46%
With Interview (+4.4%)
3y 8m
Median Time to Grant
High
PTA Risk
Based on 333 resolved cases by this examiner. Grant probability derived from career allow rate.

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