DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement(s)
The Information Disclosure Statement(s) filed on December 17, 2025, January 29, 2026, March 23, 2026, April 14, 2026, and May 15, 2026 were considered by the Examiner.
Election/Restrictions
Applicant's election of Invention I and claims 1, 5-7, 12-13, 28, and 29 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)). As the election was made without traverse, the requirement is deemed proper and is therefore made FINAL.
Response to Arguments
RE: the objection to claim(s) 21, Applicant elected Invention I and withdrew claim 21 from consideration.
RE: the rejection of claim(s) 29 under 35 USC 112(b), Applicant’s amendments and arguments have been considered and resolve the issues of indefiniteness in the claim. Accordingly, the rejection of claim 29 under 35 USC 112(b), is withdrawn.
RE: the rejection of claim(s) 31 under 35 USC 112(b), Applicant elected Invention I and withdrew claim 31 from consideration.
RE: the rejection of claim(s) 30-32 under 35 USC 112(d), Applicant elected Invention I and withdrew claims 30-32 from consideration.
RE: the rejection of claim(s) under 35 USC 103, Applicant’s arguments and/or amendments have been fully considered but are moot in view of the new ground of rejection presented herein.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1 is/are rejected under 35 U.S.C. 103 as being unpatentable over US20200227338A1 (“Gong”) in view of US 20150319881 A1 (“Kusuda”).
RE: Claim 1, Gong discloses A semiconductor device (200 in FIG. 2), comprising:
a first substrate (230);
an electrical component (220) disposed over the first substrate;
a layer (105) disposed in physical contact with a top surface of the electrical component and further disposed entirely within a footprint of the top surface of the electrical component (FIG. 3 shows 105 is in physical contact with the top surface of 220; the footprint of TIM stack 101 is smaller than the footprint of IC die 220, or equal to the footprint of IC die 220, [0033]; TIM stack 101 includes 105 and 110, [0033]; Accordingly, 105 is disposed entirely within a footprint of the top surface of the electrical component 220; TIM is identified as “thermal interface material,” [0002]);
a thermal interface material (110, [0033]; As 110 is included in TIM stack 101, 110 is considered a TIM) disposed in physical contact with the layer and further disposed entirely within the footprint of the top surface of the electrical component (Material 110, has a third surface 211 that is in contact with material 105, [0033]; FIG. 3 shows 110 is in physical contact with 105; the footprint of TIM stack 101 is smaller than the footprint of IC die 220, or equal to the footprint of IC die 220, [0033]; TIM stack 101 includes 105 and 110, [0033]; Accordingly, 110 is disposed entirely within the footprint of the top surface of the electrical component 220); and
a heat sink (240, [0033]; 240 is an integrated heat spreader, [0033]) disposed in physical contact with the thermal interface material (240 is in direct contact with 110, [0034]; FIG. 3 shows 240 is in physical contact with 110).
Gong does not explicitly disclose the layer (105) is a graphene layer.
However, Gong discloses In some embodiments, material 105 is carbon-based or “carbonaceous” as carbon has been found to have good thermal conductivity, stability, and compatibility with IC die, [0025].
In a similar field of endeavor, Kusuda discloses:
thermal interface materials (TIMs) can be used between a PWB and an external support structure. TIMs are often used to fill microscopic voids and to reduce thermal resistances, thereby facilitating heat transfer between two objects or materials in contact with one another, [0050].
Kusuda discloses TIMs can comprise, consist, or consist essentially of diamond powder, carbon fibers, and/or graphene, [0050].
Accordingly, before the effective filing date of the claimed invention, there was a need to select a material for the carbon-based TIM 105 in Gong.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use graphene as the material of the carbon-based layer 105 as this would have been obvious to try since graphene is one solution for a thermal interface material identified by Kusuda, and this would have had a reasonable expectation of success, see MPEP 2143.
Claim(s) 5-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gong in view of Kusuda as applied to claim 1, further in view of US20090115037A1 (“How”).
RE: Claim 5, Gong in view of Kusuda does not explicitly disclose The semiconductor device of claim 1, further including an encapsulant deposited over the first substrate and around the electrical component.
However, in the same field of endeavor, How discloses in FIG. 6C:
an encapsulant (428, [0039]; 120 portions of the dice 202 and lead frame 301 are encapsulated with a molding material or compound 428, [0039]) deposited over a first substrate (309; 309 are leads of a lead frame, [0032]; substrate is a lead frame, [0029]) and around an electrical component (202; FIG. 6C shows encapsulant 428 deposited over 309 and around 202; FIG. 6C shows 428 disposed under a portion of 202).
How further discloses the die and portions of the lead frame are encapsulated with a molding material to protect the delicate electrical components, [0002].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide an encapsulant deposited over Gong’s substrate 230 and around Gong’s electrical component 220 as taught by How in order to protect Gong’s electrical component 220.
RE: Claim 6, Gong in view of Kusuda, How discloses The semiconductor device of claim 5, wherein the heat sink extends over the encapsulant (In How, FIG. 6C shows a heat sink base 418 extending over a portion of the encapsulant 428 that is disposed under the electrical component 202, [0035]; Gong discloses IHS 240 has a bottom surface area 242 larger than the third surface area 211 of 110, [0033]; Gong FIG. 2 shows HIS 240 extending completely over 220, and extending beyond the footprint of 220; Accordingly, as modified, Gong’s heat sink 240 would extend over a portion of How’s encapsulant that is disposed under Gong’s electrical component 220).
Claim(s) 7, 28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gong in view of Kusuda.
RE: Claim 7, Gong discloses A semiconductor device, comprising:
an electrical component (220);
a layer (105) disposed in physical contact with a surface of the electrical component and further disposed entirely within a footprint of the surface of the electrical component (FIG. 3 shows 105 is in physical contact with the top surface of 220; the footprint of TIM stack 101 is smaller than the footprint of IC die 220, or equal to the footprint of IC die 220, [0033]; TIM stack 101 includes 105 and 110, [0033]; Accordingly, 105 is disposed entirely within a footprint of the top surface of the electrical component 220; TIM is identified as “thermal interface material,” [0002]);
a thermal interface material (110, [0033]; As 110 is included in TIM stack 101, 110 is considered a TIM) in physical contact with the layer and further disposed entirely within the footprint of the surface of the electrical component (Material 110, has a third surface 211 that is in contact with material 105, [0033]; FIG. 3 shows 110 is in physical contact with 105; the footprint of TIM stack 101 is smaller than the footprint of IC die 220, or equal to the footprint of IC die 220, [0033]; TIM stack 101 includes 105 and 110, [0033]; Accordingly, 110 is disposed entirely within the footprint of the top surface of the electrical component 220); and
a heat sink (240, [0033]; 240 is an integrated heat spreader, [0033]) disposed over the thermal interface material (FIGs. 2-3 shows 240 disposed over 110).
Gong does not explicitly disclose the layer (105) is a graphene layer.
However, Gong discloses In some embodiments, material 105 is carbon-based or “carbonaceous” as carbon has been found to have good thermal conductivity, stability, and compatibility with IC die, [0025].
In a similar field of endeavor, Kusuda discloses:
thermal interface materials (TIMs) can be used between a PWB and an external support structure. TIMs are often used to fill microscopic voids and to reduce thermal resistances, thereby facilitating heat transfer between two objects or materials in contact with one another, [0050].
Kusuda discloses TIMs can comprise, consist, or consist essentially of diamond powder, carbon fibers, and/or graphene, [0050].
Accordingly, before the effective filing date of the claimed invention, there was a need to select a material for the carbon-based TIM 105 in Gong.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use graphene as the material of the carbon-based layer 105 as this would have been obvious to try since graphene is one solution for a thermal interface material identified by Kusuda, and this would have had a reasonable expectation of success, see MPEP 2143.
RE: Claim 28, Gong in view of Kusuda discloses The semiconductor device of claim 7, wherein the heat sink physically contacts the thermal interface material (Gong discloses 240 is in direct contact with 110, [0034]; FIG. 3 shows 240 is in physical contact with 110).
Claim(s) 12-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gong in view of Kusuda as applied to claim 7, further in view of How.
RE: Claim 12, Gong in view of Kusuda does not explicitly disclose The semiconductor device of claim 7, further including an encapsulant deposited around the electrical component and graphene layer.
However, in the same field of endeavor, How discloses in FIG. 6C:
an encapsulant (428, [0039]; 120 portions of the dice 202 and lead frame 301 are encapsulated with a molding material or compound 428, [0039]) deposited around an electrical component (202; FIG. 6C shows encapsulant 428 deposited over 309 and around 202; FIG. 6C shows 428 disposed under a portion of 202) and a thermal interface material layer (414; The thermal interface material layer 414 may be formed of any suitable material(s). Preferably, the thermal interface material layer 414 is formed of one or more of a wide variety of thermally conductive materials. In some embodiments, the thermal interface material layer 414 may consist of a stack of multiple layers, [0033]; FIG. 6C shows encapsulant 428 deposited around electrical component 202 and TIM stack 414).
How further discloses the die and portions of the lead frame are encapsulated with a molding material to protect the delicate electrical components, [0002].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide an encapsulant deposited around Gong’s electrical component 220 and the modified TIM stack 101 as taught by How in order to protect Gong’s electrical component 220. As a result, the encapsulant would be deposited around the modified graphene layer 105.
RE: Claim 13, Gong in view of Kusuda, How discloses The semiconductor device of claim 12, wherein the heat sink extends over the encapsulant (In How, FIG. 6C shows a heat sink base 418 extending over a portion of the encapsulant 428 that is disposed under the electrical component 202, [0035]; Gong discloses IHS 240 has a bottom surface area 242 larger than the third surface area 211 of 110, [0033]; Gong FIG. 2 shows HIS 240 extending completely over 220, and extending beyond the footprint of 220; Accordingly, as modified, Gong’s heat sink 240 would extend over a portion of How’s encapsulant that is disposed under Gong’s electrical component 220).
Claim(s) 29 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gong in view of Kusuda, further in view of How as applied to claim 12, further in view of US20190206839A1 (“Balakrishnan”).
RE: Claim 29, Gong in view of Kusuda, How discloses The semiconductor device of claim 12, wherein the heat sink extends over the encapsulant beyond the graphene layer (In How, FIG. 6C shows a heat sink base 418 extending over a portion of the encapsulant 428 that is disposed under the electrical component 202, [0035]; Gong discloses IHS 240 has a bottom surface area 242 larger than the third surface area 211 of 110, [0033]; Gong FIG. 2 shows HIS 240 extending completely over 220, and extending beyond the footprint of TIM stack 101; Accordingly, as modified, Gong’s heat sink 240 would extend over a portion of How’s encapsulant that is disposed under Gong’s electrical component 220, and would extend beyond the modified graphene layer 105).
Additionally or alternatively, in the same field of endeavor, Balakrishnan discloses in FIG. 1A:
wherein a heat sink (102, [0029]) extends over an encapsulant (170, [0047]) beyond a graphene layer (130 is constructed of graphene, [0044]).
FIG. 1A shows heat sink 102 extending over a portion of the encapsulant 170 that extends beyond the graphene layer 130.
Balakrishnan discloses thermal headroom for the electronic component 120 can be increased, which can allow the electronic component 120 to operate at higher performance for longer duration using passive heat dissipation techniques, [0040].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Gong’s heat sink 240 to extend over a portion of How’s encapsulant that extends beyond the modified graphene layer 105 as taught by Balakrishnan in order to allow Gong’s electrical component 220 to operate at higher performance for longer duration as further taught by Balakrishnan.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL ANGUIANO whose telephone number is (703)756-1226. The examiner can normally be reached Monday through Friday.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Brent Fairbanks can be reached at (408) 918-7532. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MICHAEL ANGUIANO/Examiner, Art Unit 2899
/Brent A. Fairbanks/Supervisory Patent Examiner, Art Unit 2899
Prosecution Insights