Prosecution Insights
Last updated: August 18, 2026

Stats Chippac Pte. Ltd.

21 pending office actions • 10 art units • 21 examiners • 0 of 21 (0%) have an AI response strategy ready • 55 patents granted in the last 365 days

Portfolio Summary

21
Total Pending OAs
15
Non-Final OAs
5
Final Rejections
1
Advisory / Quayle

Response Deadline Pressure

Based on the USPTO statutory response window for each pending office action. 4 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.

2
Overdue
1
Due this week
0
Due this month
1
Due in next 60 days
0
Due later

Deadline Fire Line

Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 4 of the docket's apps have a known mailing date.

-30dToday30d60d90d120d
Overdue (2)Due ≤ 7 days (1)Due ≤ 60 days (1)

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

9
Hard (43%)
10
Medium (48%)
2
Easy (10%)
0
Unknown (0%)

Rejection Statute Mix

BucketCases
§103 only8 (38%)
§102 only2 (10%)
§112 only1 (5%)
Double-patenting only1 (5%)
Multi-statute (no §101)9 (43%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

1
Life Sciences
5% of docket
0
Information Tech
0% of docket
0
Communications
0% of docket
15
Semiconductors
71% of docket
0
Mechanical / Eng
0% of docket
5
Business / Other
24% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

210 h
Manual time on pending OAs
42 h
Time saved (low, 20%)
74 h
Time saved (mid, 35%)
1.8 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
MAY, ROBERT J 1 75.4% +15.5%
JOHNSON, CHRISTOPHER A 1 84.2% +8.3%
RUCKER, BASEEMAH QADEER 1
ESKRIDGE, CORY W 1 72.4% +7.1%
RIRIE, EVERETT TRAJAN 1 0.0% +0.0%
ONUTA, TIBERIU DAN 1 76.7% +23.8%
BAREFORD, KATHERINE A 1 13.7% +28.6%
AHMED, SHAHED 1 90.8% -0.1%
LEE, WOO KYUNG 1 81.3% +15.9%
PATEL, REEMA 1 88.7% +6.5%

Quick Wins (1)

Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 1 ordered by deadline are shown.

App #TitleExaminerDue in
18405484 Semiconductor Device and Method of Stacking and Interconnecting Semiconductor Assemblies Using Conductive Layer with Graphene Core Shells LEE, WOO KYUNG

Hard Cases (9)

Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 8 ordered by deadline are shown.

App #TitleExaminerDue in
18302503 Semiconductor Device and Method of Forming Stress Relief Vias in Multi-Layer RDL NGUYEN, SOPHIA T 5d overdue
18644515 Semiconductor Device and Method of Coating a Semiconductor Wafer with High Viscosity Liquid Photoresist Using N2 Purge BAREFORD, KATHERINE A 46d
18765338 METHODS FOR FORMING CONDUCTIVE STRUCTURES BETWEEN TWO SUBSTRATES JOHNSON, CHRISTOPHER A
18646867 SENSOR PACKAGE AND METHOD FOR FORMING THE SAME RIRIE, EVERETT TRAJAN
18414500 SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAME AHMED, SHAHED
18395641 METHOD FOR MAKING A SEMICONDUCTOR DEVICE USING A DOUBLE SIDE MOLDING TECHNOLOGY PATEL, REEMA
18503013 Semiconductor Device and Methods of Making and Using Pre-Molded Bridge Die RAHMAN, MOIN M
18315098 Semiconductor Device and Method of Making a Fan-Out Semiconductor Package with Pre-Assembled Passive Modules BOOTH, RICHARD A

Interview Candidates (4)

Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 4 ordered by deadline are shown.

App #TitleExaminerDue in
18644515 Semiconductor Device and Method of Coating a Semiconductor Wafer with High Viscosity Liquid Photoresist Using N2 Purge BAREFORD, KATHERINE A 46d
19421253 Semiconductor Device and Method of Forming Double-Sided Rectifying Antenna on Power Module MAY, ROBERT J
18646853 SEMICONDUCTOR PACKAGE AND METHOD FOR MAKING THE SAME ONUTA, TIBERIU DAN
18405484 Semiconductor Device and Method of Stacking and Interconnecting Semiconductor Assemblies Using Conductive Layer with Graphene Core Shells LEE, WOO KYUNG

Top Art Units

Art UnitApps
2812 3
2893 3
2899 3
2875 1
1718 1
2813 1
2815 1
2898 1
2891 1
2817 1

Pending Office Actions

App #TitleExaminerArt UnitStatutesStatusDue inAIFiled
19421253 Semiconductor Device and Method of Forming Double-Sided Rectifying Antenna on Power Module MAY, ROBERT J 2875 DP Non-Final OA Pending Dec 16, 2025
18765338 METHODS FOR FORMING CONDUCTIVE STRUCTURES BETWEEN TWO SUBSTRATES JOHNSON, CHRISTOPHER A §103§112 Non-Final OA Pending Jul 08, 2024
18673384 SENSOR PACKAGE AND A METHOD FOR FORMING THE SAME RUCKER, BASEEMAH QADEER §103 Non-Final OA Pending May 24, 2024
18650077 SEMICONDUCTOR PACKAGE AND METHOD FOR FORMING THE SAME ESKRIDGE, CORY W §102 Non-Final OA Pending Apr 30, 2024
18646867 SENSOR PACKAGE AND METHOD FOR FORMING THE SAME RIRIE, EVERETT TRAJAN §103§112 Non-Final OA Pending Apr 26, 2024
18646853 SEMICONDUCTOR PACKAGE AND METHOD FOR MAKING THE SAME ONUTA, TIBERIU DAN §103 Non-Final OA Pending Apr 26, 2024
18644515 Semiconductor Device and Method of Coating a Semiconductor Wafer with High Viscosity Liquid Photoresist Using N2 Purge BAREFORD, KATHERINE A 1718 §102§103§112 Final Rejection 46d Pending Apr 24, 2024
18414500 SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAME AHMED, SHAHED 2813 §102§103 Non-Final OA Pending Jan 17, 2024
18405484 Semiconductor Device and Method of Stacking and Interconnecting Semiconductor Assemblies Using Conductive Layer with Graphene Core Shells LEE, WOO KYUNG 2815 §103 Non-Final OA Pending Jan 05, 2024
18395641 METHOD FOR MAKING A SEMICONDUCTOR DEVICE USING A DOUBLE SIDE MOLDING TECHNOLOGY PATEL, REEMA 2812 §102§103 Non-Final OA Pending Dec 25, 2023
18503013 Semiconductor Device and Methods of Making and Using Pre-Molded Bridge Die RAHMAN, MOIN M 2898 §102§103 Final Rejection Pending Nov 06, 2023
18498494 Semiconductor Device and Method of Forming Fan-Out Package Structure with Embedded Overhanging Backside Antenna YEMELYANOV, DMITRIY 2891 §102 Final Rejection Pending Oct 31, 2023
18459014 SENSOR ASSEMBLY AND METHOD FOR FORMING THE SAME KUPP, BENJAMIN MICHAEL 2893 §103 Non-Final OA 7d Pending Aug 30, 2023
18357361 Semiconductor Device and Method of Integrating eWLB with E-bar Structures and RF Antenna Interposer CHOUDHRY, MOHAMMAD M 2899 §103 Non-Final OA Pending Jul 24, 2023
18332777 MODULAR SEMICONDUCTOR DEVICES AND ELECTRONIC DEVICES INCORPORATING THE SAME VALENZUELA, PATRICIA D 2812 §103 Non-Final OA Pending Jun 12, 2023
18328795 METHOD AND APPARATUS FOR FORMING SEMICONDUCTOR DEVICE PARTHASARATHY, ROHIT 2899 §103 Non-Final OA 16d overdue Pending Jun 05, 2023
18315098 Semiconductor Device and Method of Making a Fan-Out Semiconductor Package with Pre-Assembled Passive Modules BOOTH, RICHARD A 2812 §102§103 Non-Final OA Pending May 10, 2023
18302503 Semiconductor Device and Method of Forming Stress Relief Vias in Multi-Layer RDL NGUYEN, SOPHIA T 2893 §103§112 Non-Final OA 5d overdue Pending Apr 18, 2023
18163884 SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAME CHANG, JAY C 2817 §112 Non-Final OA Pending Feb 03, 2023
17810901 Semiconductor Device and Method of Heat Dissipation Using Graphene ANGUIANO, MICHAEL 2899 §103 Final Rejection Pending Jul 06, 2022
17648146 Semiconductor Device and Method of Stabilizing Heat Spreader on Semiconductor Package CHEN, JACK S J 2893 §102§103§112 Final Rejection Pending Jan 17, 2022

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