DETAILED ACTION
This application, 17/813,592, attorney docket 8017-939-DIV, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This application is assigned Samsung Display Co, and claims foreign priority to 10-2019-0003450, filed 01/10/2019. Claims 1, 2 and 4-7 are pending and are considered below. Note that examiner will use numbers in parentheses to indicate numbered elements in prior art figures, and brackets to point to paragraph numbers where quoted material or specific teachings can be found.
Response to Arguments
Applicant, in his response filed 4/21/26, has amended claims 1 and 5 to clarify the language, and correctly argues that the amendment overcomes the §112a, which is withdrawn, and the drawing objection that addressed the same language is withdrawn.
Applicant has amended claims 2 and 7 and correctly argues that the amendments overcome the §112b rejection of those claims for improper antecedent. Applicant has further amended claims 1, 4 ,5 and 7 to address the §112b rejections for indefiniteness which are withdrawn.
Applicant has further amended claims 1 and 5 to include the limitation that the first display area and the second display area are configured to display an image, and correctly argues that the first display area in Ota is a dummy area which does not produce an image, so the §102 rejection of claims 1 and 5 and their dependents based on Ota is withdrawn, and a new rejection is issued below.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 2, 5 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Ota et al. (U.S. 2016/8/0064467) in view of Chen et al. (U.S. 2020/0006448).
As for claim 1,
Ota teaches a display device comprising:
a second display area (16) including a plurality of pixel electrodes (E1, figure 4),
the second display area further including a plurality of second pixels (Pd) in each of which a pixel circuit (lower layers of figure 4 including transistors Tcmp, Tsl Tdr and Tel) and a pixel electrode (E1) of the plurality of pixel electrodes are disposed,
wherein the pixel circuit of each of the second pixels includes a plurality of transistors, wherein the plurality of transistors includes:
a first transistor including ((Tdr)) a channel region (10a), a gate electrode (GDr) overlapping the channel region (inherent for a functional transistor), a first source or drain electrode and a second source or drain electrode at opposing sides of the channel region (above and below the gate figure 8),
a second transistor (Tsl) connected between the first source or drain electrode of the first transistor, and a data line, and a third transistor (Tel) connected to the second source or drain electrode of the first transistor, (connections shown in figure 3),
wherein each of the plurality of pixel electrodes comprises a part overlapping the third transistor within a corresponding pixel circuit of each of the plurality of second pixels, in a plan view (shown in cross section figure 4, plan view, overlay figure 8 with figure 13), and
wherein a conductive layer in which the plurality of pixel electrodes is formed does not include a conductive line other than the plurality of pixel electrodes. (Figure 4 shows the pixel electrodes in a dedicated layer (46).
Ota does not teach a first display area configured to display images, or a second display area with a plurality of first regions adjacent to the second pixels, wherein none of the plurality of pixel electrodes are disposed in the first regions.
However, Chen teaches in figure 5 a first display area (12) configured to display images [0011-0012], and a second display area (11) with a plurality of first regions (30) adjacent to the second pixels, wherein none of the plurality of pixel electrodes are disposed in the first regions. Shown not overlapping in figures 5 and 6.
It would have been obvious to one skilled in the art at the effective filing date of this application add the first regions to the inner portion of the device of Oto to allow the incorporation of a fingerprint sensor. Because fingers are smaller than the display, the sensor does not extend into the first display area. One skilled in the art would have combined these elements with a reasonable expectation of success.
As for claim 2,
Ota in view of Chan makes obvious the display device of claim 1, wherein none of the plurality of pixel electrodes overlap the first regions. (They are offset to not overlap in figure 6 of Chen, which allows a clear viewing region of the finger between the pixels without a shadow).
As for Claim 5,
Ota teaches an electronic device comprising:
a second display area (16) including a plurality of pixel electrodes (E1 fig. 4), the second display area including a plurality of second pixels in each of which a pixel circuit (lower layers of figure 4 including transistors Tcmp, Tsl Tdr and Tel) and a pixel electrode (E1) of the plurality of pixel electrodes are disposed,
the second display area being configured to display images,
wherein the pixel circuit of each of the second pixels includes a plurality of transistors, wherein the plurality of transistors includes:
a first transistor including ((Tdr)) a channel region (10a), a gate electrode (GDr) overlapping the channel region (inherent for a functional transistor), a first source or drain electrode and a second source or drain electrode at opposing sides of the channel region (above and below the gate figure 8),
a second transistor (Tsl) connected between the first source or drain electrode of the first transistor, and a data line, and a third transistor (Tel) connected to the second source or drain electrode of the first transistor, (connections shown in figure 3),
and wherein
and wherein a conductive layer in which the plurality of pixel electrodes is formed does not include a conductive line other than the plurality of pixel electrodes. (Figure 4 shows the pixel electrodes in a dedicated layer (46).
Ota does not teach a first display area including a plurality of first pixels configured to display images, or a second display area with a plurality of first regions adjacent to the second pixels, wherein none of the plurality of pixel electrodes are disposed in the first regions.
However, Chen teaches in figure 5 a first display area (12) configured to display images [0011-0012], and a second display area (11) with a plurality of first regions (30) adjacent to the second pixels, wherein none of the plurality of pixel electrodes are disposed in the first regions. Shown not overlapping in figures 5 and 6.
It would have been obvious to one skilled in the art at the effective filing date of this application add the first regions to the inner portion of the device of Oto to allow the incorporation of a fingerprint sensor. Because fingers are smaller than the display, the sensor does not extend into the first display area. One skilled in the art would have combined these elements with a reasonable expectation of success.
As for claim 6,
Ota in view of Chen makes obvious the electronic device of claim 5, wherein none of the plurality of pixel electrodes overlap the first regions. (They are offset to not overlap in figure 1).
Allowable Subject Matter
Claims 4 and 7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims and if rewritten or amended to overcome the rejection under 35 U.S.C. 112(b) set forth in this Office action.
The following is a statement of reasons for the indication of allowable subject matter:
As for claim 4 and 7,
the prior art does not teach or make obvious the display of the parent claim the further includes a pixel circuit of the second pixel is connected to a first scan line, a second scan line, and a control line, which are disposed side by side in a first direction, the first pixel electrode and the third pixel electrode have a planar shape having a maximum width in the first direction between the first scan line and the control line, and the second pixel electrode has a planar shape having a maximum width in the first direction in a region overlapping the second scan line.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN A BODNAR whose telephone number is (571)272-4660. The examiner can normally be reached M-Th and every other Friday 7:30-5:30 Central time.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara Green can be reached at 571-270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/JOHN A BODNAR/Primary Examiner, Art Unit 2893
Prosecution Insights