DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/19/2025 has been entered.
Status of the Application
Acknowledgement is made of the amendment received on 12/19/2025. Claims 1-15 and 21-25 are pending in this application. Claims 1, 12, and 21 are amended.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-6, 8, and 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Liu (US 2021/0358901) in view of Hensel et al. (US 2017/0358565; hereinafter ‘Hensel’) and Chen et al. (US 2020/0303551; hereinafter ‘Chen’).
Regarding claim 1, Liu teaches a device (100, [0017]), comprising:
a first row of active areas (120AA-120AH, FIG. 1, [0020]; hereinafter ‘AA’) including first active areas (the leftmost part 210A of 120AA-120AH, FIG. 2, [0022]; hereinafter ‘FAA’) that extend in a first direction (FAA extends in the X-direction) and second active areas (the rightmost part 210A of 120AA-120AH; hereinafter ‘SAA’) that extend in the first direction (SAA extends in the X-direction), each of the first active areas has a first width in a second direction (the width of FAA in Y-direction) and each of the second active areas has a second width in the second direction (the width of the SAA in Y-direction);
a second row of active areas (120CA-120CH, FIG. 1, [0020]; hereinafter ‘CA’) situated adjacent the first row of active areas (shown in FIG. 1) and including third active areas (210A of 120CA-120CH; hereinafter ‘TAA’) that extend in the first direction (TAA extends in the X-direction), each of the third active areas has the second width in the second direction (the width of the TAA is the same as the width of SAA in Y-direction), wherein the third active areas are adjacent the first active areas and the second active areas (TAA is adjacent FAA and SAA) and spaced apart from the first active areas and the second active areas (TAA is spaced apart from FAA and SAA); and
a first power via (445 of 120BA, FIGS. 1 and 4, [0029]; hereinafter ‘445-BA’) that extends in a third direction (445-BA extends in the Z-direction) between a transistor level of the device (AL includes transistors) and a backside metal layer of the device (BM1, [0025]) the first power via situated between the third active areas and the first active areas or between the third active areas and the second active areas without overlapping the first active areas, the second active areas, or the third areas (445-BA is located between TAA and FAA and TAA and SAA without overlapping FAA, SAA, and TAA).
Liu does not teach the device comprising: the second width of the second active areas is smaller than the first width of the first active areas.
Hensel teaches a device (100, FIG. 2, [0039]) comprising: the second width of the second active areas is smaller than the first width of the first active areas (the width of 130d is smaller than the width of 130c, FIG. 2, [0035]).
As taught by Hensel, one of ordinary skill in the art would utilize and modify the above teaching into Liu to obtain and achieve the device comprising: the second width of the second active areas is smaller than the first width of the first active areas as claimed, because the width of active areas is known to affect device behavior such as current drive and threshold voltage, as well as influence the overall cell size and layout density, it would depend on the desired functionality, performance targets, and area constraints of the design [0033].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Hensel in combination with Liu due to above reason.
Liu in view of Hensel does not teach the device comprising: without an intervening active area situated between the third active areas and the first active areas or between the third active areas and the second active areas.
Chen teaches a device (600, FIG. 6, [0068]) comprising: without an intervening active area situated between the third active areas and the first active areas or between the third active areas and the second active areas (adjacent fin structures 304 corresponding to active areas with a power connection structure 502 corresponding to a power via disposed therebetween, without another active region interposed between the adjacent active regions, FIG. 6, [0058, 0066]).
As taught by Chen, one of ordinary skill in the art would utilize and modify the above teaching into Liu in view of Hensel to obtain and achieve the device comprising: without an intervening active area situated between the third active areas and the first active areas or between the third active areas and the second active areas as claimed, because it increases the available contact area to the power connection structure, thereby minimizing contact resistance [0072].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Chen in combination with Liu in view of Hence due to above reason.
Regarding claim 2, Liu in view of Hensel and Chen the device of claim 1, comprising a second power via that extends in the third direction (Liu: BV0 of 120BA, FIGS. 1 and 4, [0028]; hereinafter ‘BV0-BA’) between the transistor level and the backside metal layer (BV0-BA is between AL and BM1), the second power via situated between the first row of active areas and the second row of active areas (BV0-BA is located between AA and CA), wherein the first power via is a longer power via (FPV is a longer power via) and the second power via is a shorter power via island (shown in FIG. 4).
Note: “power via island” denotes a relatively shorter power via.
Regarding claim 3, Liu in view of Hensel and Chen the device of claim 1, comprising a gate (Liu: a one gate of 475, FIG. 4, [0029]) that intersects the third active areas at a line of intersection (220A and 220B intersects 210A and 210b, FIG. 2, [0021]), wherein the first power via has a length that extends in the first direction across the line of intersection to on both sides of the line of intersection (445-BA has a length that extends in X-direction across the line of intersection to both sides of the line of intersection, FIG. 4).
Regarding claim 4, Liu in view of Hensel and Chen the device of claim 1, comprising a gate (Liu: one gate of 470, FIG. 4, [0029]) that intersects the third active areas at a line of intersection (220A and 220B intersects 210A and 210b, FIG. 2, [0021]), wherein the first power via is situated next to and on only one side of the line of intersection (445-BA is situated next to and on only one side of the line of intersection).
Regarding claim 5, Liu in view of Hensel and Chen the device of claim 1, comprising a second power via (Liu: BV0, FIG. 4, [0029]) and a first gate (first gate of 475; hereinafter ‘FG475’) that intersects the third active areas at a line of intersection of the first gate (220A and 220B intersects 210A and 210b, FIG. 2, [0021]) and a second gate (second gate of 475; hereinafter ‘SG475’) that intersects the third active areas at a line of intersection of the second gate (220A and 220B intersects 210A and 210b), wherein the first power via has a length that extends across the line of intersection of the first gate to both sides of the line of intersection of the first gate in the first direction (445-BA has a length that extends across the line of intersection of FG475 in X-direction) and the second power via is situated adjacent and on only one side of the line of intersection of the second gate (BV0 is situated adjacent and on only side of the line of intersection of SG475).
Regarding claim 6, Liu in view of Hensel and Chen the device of claim 1, comprising a metal over diffusion layer (Liu: VDB, FIG. 4, [0030]) disposed over at least one of the first active areas and at least one of the third active areas (VDB disposed over FAA and TAA, FIGS. 1 and 4), wherein the first power via is electrically coupled to the metal over diffusion layer (445-BA is electrically coupled to VBD).
Regarding claim 8, Liu in view of Hensel and Chen the device of claim 1, comprising a metal over diffusion layer (Liu: VDB, FIG. 4, [0030]) disposed over at least one of the second active areas and at least one of the third active areas (VDB disposed over SAA and TAA, FIGS. 1 and 4), wherein the first power via is electrically coupled to the metal over diffusion layer (445-BA is electrically coupled to VBD).
Regarding claim 10, Liu in view of Hensel and Chen the device of claim 1, comprising a via over gate layer (Liu: VDB, FIG. 4, [0030]) that is disposed on the first power via (VDE is disposed on 445-BA) and that is electrically coupled to a frontside metal layer (VDB is electrically coupled to 482, [0030]).
Regarding claim 11, Liu in view of Hensel and Chen the device of claim 1, wherein the first power via is electrically connected to the backside metal layer (Liu: 445-BA is electrically connected to BM1, FIG. 4) and to a metal over diffusion layer (VDB, [0030]) that is disposed over at least one of the first active areas (VDB is disposed over FAA, FIGS. 1 and 4).
Claims 7 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Liu (US 2021/0358901) in view of Hensel (US 2017/0358565) and Chen (US 2020/0303551), and further in view of Liu (US 2021/0225830; hereinafter ‘Liu830’).
Regarding claim 7, Liu in view of Hensel and Chen teaches the device of claim 6, but does not teach the device comprising a via over diffusion layer disposed on the metal over diffusion layer and electrically coupled to a frontside metal layer.
Liu830 teaches a device (10, FIGS. 1A and 1B, [0045]) comprising a via over diffusion layer (via0, [0048]) disposed on the metal over diffusion layer (via0 disposed on MD) and electrically coupled to a frontside metal layer (via0 is electrically coupled to M0).
As taught by Liu830, one of ordinary skill in the art would utilize and modify the above teaching into Liu in view of Hensel and Chen to obtain and achieve the device comprising a via over diffusion layer disposed on the metal over diffusion layer and electrically coupled to a frontside metal layer as claimed, because it enables vertical electrical connection between the local interconnect layer and the frontside metal layers, allowing power or signal to be routed efficiently from the device region to broader distribution networks [0069, 0076].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Liu830 in combination with Liu in view of Hensel and Chen due to above reason.
Regarding claim 9, Liu in view of Hensel and Chen teaches the device of claim 8, but does not teach the device comprising a via over diffusion layer disposed on the metal over diffusion layer and electrically coupled to a frontside metal layer.
Liu830 teaches a device (10, FIGS. 1A and 1B, [0045]) comprising a via over diffusion layer (via0, [0048]) disposed on the metal over diffusion layer (via0 disposed on MD) and electrically coupled to a frontside metal layer (via0 is electrically coupled to M0)
As taught by Liu830, one of ordinary skill in the art would utilize and modify the above teaching into Liu in view of Hensel and Chen to obtain and achieve the device comprising a via over diffusion layer disposed on the metal over diffusion layer and electrically coupled to a frontside metal layer as claimed, because it enables vertical electrical connection between the local interconnect layer and the frontside metal layers, allowing power or signal to be routed efficiently from the device region to broader distribution networks [0069, 0076].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Liu830 in combination with Liu in view of Hensel and Chen due to above reason.
Claims 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over Liu830 (US 2021/0225830) in view of Chen (US 2020/0303551).
Regarding claim 12, Liu830 teaches a device (10, FIGS. 1A and 1B, [0045]), comprising:
first active areas (the Nth RX from the top, [0047-0048]; hereinafter referred to as ‘RXN’) that extend in a first direction (RXN extends in the X-direction);
second active areas (the N+2nd RX from the top, [0047-0048]; hereinafter referred to as ‘RXN+2’) that extend in the first direction (RXN+2 extends in the X-direction), the second active areas adjacent the first active area (shown in FIGS. 1A and 1B) and spaced apart from the first active areas in a second direction (RXN and RXN+2 are spaced in the Y-direction);
a metal over diffusion layer (MD, [0048]) that is disposed over (MD is disposed over RXN, FIG. 3C) and electrically coupled to at least one of the first active areas (MD is electrically connected to RXN, FIG. 3C, [0076]);
a backside metal layer (BM0, [0059]); and
a power via (VB of the N+1st RX from the top, FIG. 3C, [0061-0062]; hereinafter ‘VB1’) connected to the backside metal layer and the metal over diffusion to electrically connect the backside metal layer to the metal over diffusion layer and the at least one of the first active areas (VB1 connected to BM0 and VB1 connected MD through RX, and RXN),
wherein the power via is situated in a space between the first active areas and the second active areas without overlapping the first active areas or the second active areas (VB1 is situated in a space between RXN and RXN+2 without overlapping RXN and RXN+2).
Liu830 does not teach the device comprising: without an intervening active area between the second active areas and the first active areas.
Chen teaches a device (600, FIG. 6, [0068]) comprising: without an intervening active area between the second active areas and the first active areas (adjacent fin structures 304 corresponding to active areas with a power connection structure 502 corresponding to a power via disposed therebetween, without another active region interposed between the adjacent active regions, FIG. 6, [0058, 0066]).
As taught by Chen, one of ordinary skill in the art would utilize and modify the above teaching into Liu830 to obtain and achieve the device comprising: without an intervening active area situated between the third active areas and the first active areas or between the third active areas and the second active areas as claimed, because it increases the available contact area to the power connection structure, thereby minimizing contact resistance [0072].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Chen in combination with Liu830 due to above reason.
Regarding claim 13, Liu830 in view of Chen teaches the device of claim 12, comprising a via over diffusion layer (Liu830: via0, FIG. 1A, [0048]) disposed over (via0 disposed over MD) and electrically coupled to the metal over diffusion layer (via0 is electrically coupled to MD), wherein the via over diffusion layer is electrically coupled to a frontside metal layer (via0 is electrically coupled to M0, [0048]).
Regarding claim 14, Liu830 in view of Chen teaches the device of claim 12, wherein the power via is one elongated power via (Liu830: VB1 extends in the Z-direction, FIG. 3C, [0061]) that is electrically coupled to the backside metal layer and the metal over diffusion layer (VB1 is electrically coupled to BM0 and MD).
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Liu830 (US 2021/0225830) in view of Chen (US 2020/0303551), and further in view of Liu (US 2021/0358901).
Regarding claim 15, Liu830 in view of Chen teaches the device claim 12, wherein the at least one power via (VB1, FIG. 3C) is a first power via (left side VB) that is electrically coupled to the backside metal layer and the metal over diffusion layer (left side VB is electrically coupled to BM0 and left side MD) and a second power via (right side VB) that is electrically coupled to the backside metal layer (right side VB is electrically coupled to BM0) and a via over gate layer (right side MD)
Note: “power via island” denotes a relatively shorter power via.
Liu830 in view of Chen does not teach the device, wherein the power via is a first power via island.
Liu teaches a device (100, [0017]), wherein the at least one power via is a first power via island (BV0 is the power via island, FIG. 4, [0029]).
As taught by Liu, one of ordinary skill in the art would utilize and modify the above teaching into Liu830 in view of Chen to obtain and achieve the device, wherein the at least one power via is a first power via island as claimed, because power vias are strategically placed based on their roles and functions, the voltage drop across the power delivery path is reduced, contributing to up to a 20% reduction in power loss [0032, 0034].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Liu in combination with Liu830 in view of Chen due to above reason.
Claims 21-25 are rejected under 35 U.S.C. 103 as being unpatentable over Liu (US 2021/0358901) in view of Chen (US 2020/0303551).
Regarding claim 21, Liu teaches a device (100, [0017]), comprising:
a first row of active areas (120AA-120AH, FIG. 1, [0020]; hereinafter ‘AA’) including first active areas (the leftmost part 210A of 120AA-120AH, FIG. 2, [0022]; hereinafter ‘FAA’) that extend in a first direction (FAA extends in the X-direction, FIG. 2);
a second row of active areas (120CA-120CH, FIG. 1, [0020]; hereinafter ‘CA’) situated adjacent the first row of active areas (shown in FIG 1) and including second active areas (210A of 120CA-120CH; hereinafter ‘SAA’) that extend in the first direction (SAA extends in the X-direction, FIG. 2) and are spaced apart from the first active areas (shown in FIG 1); and
a first power via (445 of 120BA, FIGS. 1 and 4, [0029]; hereinafter ‘445-BA’) that extends in a third direction (445-BA extends in the Z-direction) between a transistor level of the device (AL includes transistors) and a backside metal layer of the device (BM1, [0025]), the first power via situated between the first active areas and the second active areas without overlapping the first active areas or the second active areas (445-BA is located between FAA and SAA without overlapping FAA and SAA).
Liu does not teach the device comprising: without an intervening active area between the second active areas and the first active areas.
Chen teaches a device (600, FIG. 6, [0068]) comprising: without an intervening active area situated between the second active areas and the first active areas (adjacent fin structures 304 corresponding to active areas with a power connection structure 502 corresponding to a power via disposed therebetween, without another active region interposed between the adjacent active regions, FIG. 6, [0058, 0066]).
As taught by Chen, one of ordinary skill in the art would utilize and modify the above teaching into Liu to obtain and achieve the device comprising: without an intervening active area situated between the third active areas and the first active areas or between the third active areas and the second active areas as claimed, because it increases the available contact area to the power connection structure, thereby minimizing contact resistance [0072].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Chen in combination with Liu due to above reason.
Regarding claim 22, Liu in view of Chen teaches the device of claim 21, comprising a second power via (Liu: BV0 of 120BA, FIGS. 1 and 4, [0028]; hereinafter ‘BV0-BA’) that extends in the third direction (BV0-BA extends in the Z-direction) between the transistor level (AL includes transistors) and the backside metal layer (BM1), the second power via situated between the first row of active areas and the second row of active areas (BV0-BA is located between AA and CA), wherein the first power via is a longer power via and the second power via is a shorter power via island (shown in FIG. 4).
Note: “power via island” denotes a relatively shorter power via.
Regarding claim 23, Liu in view of Chen teaches the device of claim 21, comprising a gate (Liu: a one gate of 475, FIG. 4, [0029]) that intersects the second active areas at a line of intersection (220A and 220B intersects 210A and 210b, FIG. 2, [0021]), wherein the first power via has a length that extends in the first direction across the line of intersection to both sides of the line of intersection (445-BA has a length that extends in X-direction across the line of intersection to both sides of the line of intersection, FIG. 4).
Regarding claim 24, Liu in view of Chen teaches the device of claim 21, comprising a metal over diffusion layer (VDB, FIG. 4, [0030]) disposed over at least one of the first active areas(Liu: VDB disposed over FAA, FIGS. 1 and 4) wherein the first power via is electrically coupled to the metal over diffusion layer (445-BA is electrically coupled to VBD).
Regarding claim 25, Liu in view of Chen teaches the device of claim 21, comprising a via over gate layer (Liu: VDB, FIG. 4, [0030]) that is disposed on the first power via (VDE is disposed on 445-BA) and that is electrically coupled to a frontside metal layer (VDB is electrically coupled to 482, [0030]).
Response to Arguments
Applicant's arguments with respect to claims have been considered but are moot in view of the new ground of rejection. Response to arguments on newly added limitations are responded to in the above rejection.
Conclusion
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/JIYOUNG OH/Examiner, Art Unit 2818
/DUY T NGUYEN/Primary Examiner, Art Unit 2818 6/23/26
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