Prosecution Insights
Last updated: April 19, 2026
Application No. 17/825,411

SEMICONDUCTOR DEVICE INCLUDING GRAPHENE BARRIER AND METHOD OF FORMING THE SAME

Non-Final OA §103
Filed
May 26, 2022
Examiner
KHALIFA, MOATAZ
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Ltd.
OA Round
4 (Non-Final)
94%
Grant Probability
Favorable
4-5
OA Rounds
3y 4m
To Grant
88%
With Interview

Examiner Intelligence

Grants 94% — above average
94%
Career Allow Rate
50 granted / 53 resolved
+26.3% vs TC avg
Minimal -6% lift
Without
With
+-6.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
45 currently pending
Career history
98
Total Applications
across all art units

Statute-Specific Performance

§103
70.6%
+30.6% vs TC avg
§102
17.5%
-22.5% vs TC avg
§112
9.4%
-30.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 53 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Remarks The 02/12/2026 amendments of claims 19, 22 and 35 have been noted and entered. Response to Arguments Applicant’s arguments, see Remarks page 9, filed 02/12/2026, with respect to claim objections regarding claim 22 for minor informalities have been fully considered and are persuasive in light of the newly added amendments. The objections of record have been withdrawn. Applicant’s arguments, see Remarks pages 9-14, filed 02/12/2026, with respect to the rejection(s) of claim(s) 19, 21-30, 32-35 and 37-41 under 35 U.S.C. 103 have been fully considered and are persuasive in light of the newly added amendments. However, upon further consideration, a new ground(s) of rejection is made in view McNerny et al, Direct fabrication of graphene on SiO2 enabled by thin film stress engineering, Scientific Reports, 5049 (2014) https://doi.org/10.1038/srep05049 (McNerny), J. Jiang et al, "CMOS-Compatible Doped-Multilayer-Graphene Interconnects for Next-Generation VLSI," 2018 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, USA, 2018, pp. 34.5.1-34.5.4, doi: 10.1109/IEDM.2018.8614535, (Jiang), Tien et al, US 20200365451 A1 (Tien), Yanpeng Yang et al, “Ag/graphene composite based on high-quality graphene with high electrical and mechanical properties”, Progress in Natural Science: Materials International, Volume 29, Issue 4, 2019, Pages 384-389, ISSN 1002-0071, https://doi.org/10.1016/j.pnsc.2019.04.010 (Yang). New Grounds of Rejection New grounds of rejection, art references McNerny et al, Direct fabrication of graphene on SiO2 enabled by thin film stress engineering, Scientific Reports, 5049 (2014) https://doi.org/10.1038/srep05049 (McNerny), J. Jiang et al, "CMOS-Compatible Doped-Multilayer-Graphene Interconnects for Next-Generation VLSI," 2018 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, USA, 2018, pp. 34.5.1-34.5.4, doi: 10.1109/IEDM.2018.8614535, (Jiang), Tien et al, US 20200365451 A1 (Tien), Yanpeng Yang et al, “Ag/graphene composite based on high-quality graphene with high electrical and mechanical properties”, Progress in Natural Science: Materials International, Volume 29, Issue 4, 2019, Pages 384-389, ISSN 1002-0071, https://doi.org/10.1016/j.pnsc.2019.04.010 (Yang) appear below. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 19 and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Guler et al, US 20230317788 A1 (Guler) in view of Tien et al, US 20200365451 A1 (Tien) in further view of Xie et al, US 20230110073 A1 (Xie) in further view McNerny et al, Direct fabrication of graphene on SiO2 enabled by thin film stress engineering, Scientific Reports, 5049 (2014) https://doi.org/10.1038/srep05049 (McNerny) in further view of in view of Yang et al, US 20180350913 A1 (Yang ‘913). Regarding claim 19; Guler teaches a method of forming a semiconductor device (800) comprising: forming a semiconductor structure that includes a substrate (802), a channel portion (806) disposed over the substrate (802), and two epitaxial structures (816) disposed over the substrate (802) such that the channel portion (806) is connected between the two epitaxial structures (816); The above referenced embodiment of Guler does not teach forming a silicide feature on the surface of the one of the two epitaxial structures. However, in a different embodiment (shown in Fig (1C)), Guler teaches forming a silicide feature (122) on the surface of the one of the two epitaxial structures (108). The two different embodiments of Guler are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify the first embodiment of Guler by introducing the silicide layer disclosed in the second embodiment of Guler to improve the conductivity of the contacts of the device leading to a more efficient device. PNG media_image1.png 629 799 media_image1.png Greyscale PNG media_image2.png 641 847 media_image2.png Greyscale Guler does not teach forming a recess in the substrate to expose a surface of one of the two epitaxial structures, and forming a via in the recess; forming a graphene barrier that surrounds the via; and forming a conductive structure that is disposed on the substrate and that is connected to the via, wherein formation of the via and the graphene barrier includes forming a filling conductive layer on the substrate and in the recess, the filling conductive layer having a first surface which is opposite to the substrate and a second surface which is opposite to the first surface, forming a carbon-containing material on the first surface of the filling conductive layer, forcing carbon atoms of the carbon-containing material to diffuse from the first surface of the filling conductive layer through the filling conductive layer to the second surface of the filling conductive layer, so as to form the graphene barrier, and removing a part of the filling conductive layer to form the via. Tien teaches forming a recess ((121)+(125) – see Fig (1K-1) of Tien shared in this OA) in the substrate (114)+(106)+(104) to expose a surface of one of the two epitaxial structures (105) (see paragraph [0024] of the specification of Tien where several of the deposition methods are epitaxial growth methods), and forming a via in the recess (125); and forming a conductive structure (126) that is disposed on the substrate (114)+(106)+(104) and that is connected to the via (125), wherein formation of the via (126V) includes forming a filling conductive layer (126) on the substrate (114)+(106)+(104) and in the recess ((121)+(125) – see Fig (1K-1) of Tien shared in this OA), the filling conductive layer (126) having a first surface (top surface of (126) – see Fig (1L-1) of Tien) which is opposite to the substrate (114)+(106)+(104) and a second surface (bottom surface of (126) which is opposite to the first surface (top surface of (126)), and removing a part (top part of the (126) layer – see Fig (1M-1) of Tien) of the filling conductive layer (126) to form the via (126V). Guler and Tien are considered analogous art. Thus, it would have been obvious, prior to the effective filing date on the instant application, to a person having ordinary skill in the art, to modify Guler by constructing the via disclosed in Tien to facilitate establishing electrical connections between the different part of the device leading to a better performing device. While Tien discloses that the recess exposes only one epitaxial structures and not two, the exposure of a second epitaxial structure requires only the repetition of the same process outlined and thus can be considered a duplication of parts. In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960) (Claims at issue were directed to a water-tight masonry structure wherein a water seal of flexible material fills the joints which form between adjacent pours of concrete. The claimed water seal has a "web" which lies in the joint, and a plurality of "ribs" projecting outwardly from each side of the web into one of the adjacent concrete slabs. The prior art disclosed a flexible water stop for preventing passage of water between masses of concrete in the shape of a plus sign (+). Although the reference did not disclose a plurality of ribs, the court held that mere duplication of parts has no patentable significance unless a new and unexpected result is produced.). PNG media_image3.png 729 537 media_image3.png Greyscale PNG media_image4.png 701 527 media_image4.png Greyscale PNG media_image5.png 735 547 media_image5.png Greyscale Guler in view of Tien does not teach flipping the semiconductor structure upside down so that the substrate faces upwards. Xie teaches flipping the semiconductor structure upside down so that the substrate (206) faces upwards (see paragraph [0059] of the specification of Xie: “[0059] With reference to FIGS. 21 and 22, a bonding wafer 232 is formed on, or bonded to, the BEOL devices 230, and after rotating or flipping the semiconductor structure 200, the first substrate level of silicon 204 is removed via one or more etching process selective to the silicon germanium material of the second substrate level 206”). Guler in view of Tien and Xie are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler in view of Tien by flipping the semiconductor structure such that the substrate faces upwards as disclosed in Xie to facilitate further processing the substrate leading to a more efficient device production process. Guler in view of Tien in further view of Xie does not teach after forming the filling conductive layer, forming a carbon-containing material on the first surface of the filling conductive layer, forcing carbon atoms of the carbon-containing material to diffuse from the first surface of the filling conductive layer through the filling conductive layer to the second surface of the filling conductive layer, so as to form the graphene barrier on the second surface of the filling conductive layer. McNerny teaches after forming the filling conductive layer ((Ni) layer in Fig (1) of McNerny), forming a carbon-containing material ((G) layer in Fig (1) of McNerny) on the first surface of the filling conductive layer ((Ni) layer in Fig (1) of McNerny), forcing carbon atoms of the carbon-containing material ((G) layer in Fig (1) of McNerny) to diffuse from the first surface (top surface of the (Ni) layer) of the filling conductive layer (Ni) through the filling conductive layer (Ni) to the second surface (bottom surface of the (Ni) layer) of the filling conductive layer (Ni), so as to form the graphene barrier ((G) layer on top of the SiO2 substrate in Fig (1) of McNerny) on the second surface (bottom surface of the (Ni) layer) of the filling conductive layer (Ni) (see the section titled “Results” in McNerny: “Via this general CVD method, graphene forms both on the top and bottom (at the Ni/SiO2 interface) of the Ni film. Graphene growth at the interface is promoted by diffusion of carbon through the Ni and along grain boundaries”.). Guler in view of Tien in further view of Xie and McNerny are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler in view of Tien in further view of Xie by constructing a graphene layer as disclosed in McNerny to prevent the diffusion of different metals from one region to the other and to reduce chances of corrosion and oxidation leading to a more reliable device. PNG media_image6.png 891 656 media_image6.png Greyscale Guler in view of Tien in further view of Xie in further view of McNerny does not teach forming a graphene barrier that surrounds the via. Yang ‘913 teaches forming a graphene barrier (506) that surrounds the via (via containing (402)). Guler in view of Tien in further view of Xie in further view of McNerny and Yang ‘913 are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler in view of Tien in further view of Xie in further view of McNerny by making the graphene barrier layer surround the via as discloses in Yang ‘913 to prevent the diffusion of different metals from one region to the other and to reduce chances of corrosion and oxidation leading to a more reliable device (see the Abstract of Yang ‘913’s specification). PNG media_image7.png 482 736 media_image7.png Greyscale Regarding claim 21; Guler in view of Tien in further view of Xie does not teach wherein the graphene barrier includes layers of pure graphene, graphene oxide, graphene nitride, or intercalated graphene, or combinations thereof. McNerny teaches wherein the graphene barrier ((G) layer on the SiO2 substrate in Fig (1) of McNerny) includes layers of pure graphene, graphene oxide, graphene nitride, or intercalated graphene, or combinations thereof (see the section titled “Results” in McNerny: “Via this general CVD method, graphene forms both on the top and bottom (at the Ni/SiO2 interface) of the Ni film. Graphene growth at the interface is promoted by diffusion of carbon through the Ni and along grain boundaries”.). Guler in view of Tien in further view of Xie and McNerny are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art at the time of filing this application to modify Guler in view of Tien in further view of Xie by using the pure graphene disclosed in McNerny to construct the graphene barrier layer to improve the protection of the different components of the device and thus improve the reliability of the device. Claims 22-25, 28, 32-34, and 39 are rejected under 35 U.S.C. 103 as being unpatentable over Guler et al, US 20230317788 A1 (Guler) in view of Tien et al, US 20200365451 A1 (Tien) in further view McNerny et al, Direct fabrication of graphene on SiO2 enabled by thin film stress engineering, Scientific Reports, 5049 (2014) https://doi.org/10.1038/srep05049 (McNerny) in further view of Bao et al, US 20230197721 A1 (Bao) in further view of Yanpeng Yang et al, “Ag/graphene composite based on high-quality graphene with high electrical and mechanical properties”, Progress in Natural Science: Materials International, Volume 29, Issue 4, 2019, Pages 384-389, ISSN 1002-0071, https://doi.org/10.1016/j.pnsc.2019.04.010 (Yang). Regarding claim 22; Guler teaches a method of forming a semiconductor device (800) comprising: forming a semiconductor structure that includes a substrate (802), a channel portion (806) disposed over the substrate (802), two epitaxial structures (816) disposed over the substrate (802) such that the channel portion (806) is connected between the two epitaxial structures (816), a gate structure (808) disposed on the channel portion (806), and two dielectric portions ((216) and (218)) respectively disposed on the two epitaxial structures (210) (see Fig (2A) of Guler). PNG media_image8.png 875 674 media_image8.png Greyscale Guler does not teach forming a recess in the semiconductor structure, the recess being spaced apart from the channel portion; forming a via in the recess; forming a barrier layer between the via and the semiconductor structure (114)+(106)+(104), the barrier layer including a graphene-based material; and forming a conductive structure on the via. Tien teaches forming a recess ((121)+(125)) in the semiconductor structure, forming a via in the recess (125); forming a barrier layer (112) between the via (125) and the semiconductor structure (114)+(106)+(104). Guler and Tien are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler by introducing the recess formation in the substrate as disclosed in Tien to establish the via to make establishing and electrical connection easier in the vertical dimension thus increasing the density of components of the device leading to a better performing device. Guler in view of Tien does not teach the barrier layer including a graphene-based material. McNerny teaches the barrier layer (Graphene layer on the SiO2 substrate (G) – see Figure from Chandler shared in this OA (3) of Jiang) including a graphene-based material. Guler in view of Tien and McNerny are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler in view of Tien by constructing the barrier layer out of graphene as disclosed in McNerny to improve the protection of the different device components against metal atom diffusion and oxidation leading to a more reliable device. Guler in view of Tien in further view of McNerny does not teach the recess being spaced apart from the two channel portions. Bao teaches the recess (220) being spaced apart from the two channel portions (110). Guler in view of Tien in further view of McNerny and Bao are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler in view of Tien in further view of McNerny by spacing the recess apart from the channel portion as disclosed in Bao to improve the isolation between the different components of the device to prevent cross talk and short circuits leading to a more reliable device. Guler in view of Tien in further view of McNerny in further view of Bao does not teach wherein an intercalant is introduced during formation of the barrier layer so that the barrier layer includes intercalated graphene which includes elements in the intercalant, the intercalant including Mo, W, Ag, Au, Ru, Co, metal oxide, or combinations thereof. Yang teaches wherein an intercalant includes intercalated graphene which includes elements in the intercalant, the intercalant including Ag (see the sections titled “Introduction” and “Results” in Yang). Guler in view of Tien in further view of McNerny in further view of Bao and Yang are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler in view of Tien in further view of McNerny in further view of Bao by using an intercalant that includes Ag as disclosed in Yang to improve the conductivity of the formed graphene layer leading to better conductivity in the device and better performance of it. Regarding claim 23; Guler does not teach wherein formation of the via and the barrier layer includes: forming a filling conductive layer on the semiconductor structure to fill the recess; forming a carbon-containing material on the filling conductive layer; performing a drive-in treatment such that carbon atoms of the carbon-containing material are forced to diffuse through the filling conductive layer so as to form the barrier layer which is disposed between the filling conductive layer and the semiconductor structure; and removing a part of the filling conductive layer to form the via. Tien teaches wherein formation of the via (126V) and the barrier layer (112) includes: forming a filling conductive layer (126) on the semiconductor structure (114)+(106)+(104) to fill the recess ((121)+(125)); and removing a part of the filling conductive layer (top part of (126) – see Fig (1M-1) of Tien) to form the via (125). Guler and Tien are considered analogous art. Thus, it would have been obvious, prior to the effective filing date, to a person having ordinary skill in the art, to modify Guler by constructing a via and a barrier layer as disclosed in Tien to make the process of establishing electrical connections between the different layers of the device easier which leads to increased density of components in the device which leads to a better performing device. Guler in view of Tien does not teach forming a carbon-containing material on the filling conductive layer; performing a drive-in treatment such that carbon atoms of the carbon-containing material are forced to diffuse through the filling conductive layer so as to form the barrier layer which is disposed between the filling conductive layer and the semiconductor structure. McNerny teaches forming a carbon-containing material ((G) – see Fig (1) from McNerny shared in this OA) on the filling conductive layer (Ni); performing a drive-in treatment such that carbon atoms of the carbon containing material ((G) – see Fig (1) of McNerny) are forced to diffuse through the filling conductive layer (Ni) so as to form the barrier layer ((G) between (Ni) and (SiO2) in Fig (1) of McNerny) which is disposed between the filling conductive layer (Ni) and the semiconductor structure (SiO2) (see the section titled “Results” in McNerney: “Via this general CVD method, graphene forms both on the top and bottom (at the Ni/SiO2 interface) of the Ni film. Graphene growth at the interface is promoted by diffusion of carbon through the Ni and along grain boundaries”.). Guler in view of Tien and McNerny are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler in view of Tien by introducing the carbon layer and the drive-in method which forces carbon atoms to diffuse through the conductive filling layer to form a graphene layer as disclosed in McNerny to improve the protection of the device against metal atom migration and oxidation within the device leading to a more reliable device. Regarding claim 24; Guler in view of Tien does not teach wherein the drive-in treatment includes a thermal treatment. McNerny teaches wherein the drive-in treatment includes a thermal treatment (see section titled “Results” in McNerny: “Due its low thermal mass, the heated platform reaches the process temperature (800–900°C) in approximately 10 seconds.”). Guler in view of Tien and McNerny are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art application, to modify Guler in view of Tien by introducing the thermal treatment of the carbon layer and substrate as disclosed in McNerny to improve the quality of the formed graphene layer and thus improve the protection of the device against metal atom migration and oxidation within the device leading to a more reliable device. Regarding claim 25; Guler in view of Tien does not teach wherein the thermal treatment is conducted at a temperature ranging from 200°C to 1200°C. McNerny teaches wherein the thermal treatment is conducted at a temperature ranging from 800°C to 900°C (see the section titled “Results” in McNerny: “Due its low thermal mass, the heated platform reaches the process temperature (800–900°C) in approximately 10 seconds.” ). Guler in view of Tien and McNerny are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler in view of Tien by using the temperature used in McNerny to process the carbon layer to form the graphene-based layer to improve the protection of the device against metal atom migrations and oxidation leading to a more reliable device. Regarding claim 28; Guler in view of Tien does not teach wherein the carbon-containing material is in a gas phase. McNerny teaches wherein the carbon-containing material is in a gas phase (see the section titled “Results” in McNerny: “Via this general CVD method, graphene forms both on the top and bottom (at the Ni/SiO2 interface) of the Ni film. Graphene growth at the interface is promoted by diffusion of carbon through the Ni and along grain boundaries”. Guler in view of Tien and McNerny are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler in view of Tien McNerny by using the amorphous carbon layer including its gas phase used in McNerny to be processed to form the graphene-based barrier layer to improve the protection of the device components against metal atom diffusion and oxidation leading to a more reliable device. Regarding claim 32; Guler in view of Tien in further view of McNerny in further view of Bao does not disclose wherein the intercalant includes Fe, Mo, W, Ag, Au, Ru, Co, MoO3, or combinations thereof. Yang teaches wherein the intercalant includes Ag, Au, Ru, Co, MoO3, or combinations thereof (see the sections titled “Introduction” and “Results” in Yang). Guler in view of Tien in further view of McNerny in further view of Bao and Yang are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler in view of Tien in further view of McNerny in further view of Bao by using an intercalant that includes the metal compounds disclosed in Ferris to improve the structure of the formed graphene layer leading to better separation of elements in the device layers, improved conductivity in the device and more reliable operations. Regarding claim 33; Guler does not teach wherein the recess extends through the substrate such that one of the two epitaxial structures is exposed from the recess, and the barrier layer is disposed between the via and the one of the two epitaxial structures. Tien teaches wherein the recess ((121)+(125)) extends through the substrate (114)+(106)+(104) such that one of the two epitaxial structures (105) is exposed from the recess ((121)+(125)), and the barrier layer (112) is disposed between the via (126V) and the one of the two epitaxial structures (105). Guler and Tien are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler by introducing the via structure and the barrier layer as disclosed in Tien to make the process of designing conduction paths between the device layers easier leading to better and more reliable connections. Regarding claim 34; Guler teaches wherein the gate structure (202) includes a gate electrode (206) and a gate dielectric (204) disposed between the gate electrode (206) and the channel portion (see paragraph [0039] of the specifications of Guler: “[0039] Referring to FIG. 2A, a starting structure 200 includes a gate structure 202. The gate structure 202 includes a gate dielectric layer 204, such as a high-k gate dielectric layer, and a gate electrode 206, such as a metal gate electrode.”). Regarding claim 39; Guler teaches wherein the substrate (106A) has a front side and a back side opposite to the front surface (see Fig (1C) of Guler), the two epitaxial structures (108) are disposed on the front side of the substrate (106A), and the recess (the recess filled by the material (104) is recessed from the back side of the substrate (106A). Guler in view of Tien in further view of McNerny does not teach the channel portion is disposed on the front side of the substrate. Bao teaches the channel portion (120) is disposed on the front side of the substrate (218). Guler in view of Tien in further view of McNerny and Bao are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler in view of Tien in further view of McNerny by disposing the channel portion on the front side of the substrate as disclosed in Bao to make the physical connection establishment in the device easier leading to a more efficient production process. Claims 26-27 are rejected under 35 U.S.C. 103 as being unpatentable over Guler et al, US 20230317788 A1 (Guler) in view of Tien et al, US 20200365451 A1 (Tien) in further view McNerny et al, Direct fabrication of graphene on SiO2 enabled by thin film stress engineering, Scientific Reports, 5049 (2014) https://doi.org/10.1038/srep05049 (McNerny) in further view of Bao et al, US 20230197721 A1 (Bao) in further view of Yanpeng Yang et al, “Ag/graphene composite based on high-quality graphene with high electrical and mechanical properties”, Progress in Natural Science: Materials International, Volume 29, Issue 4, 2019, Pages 384-389, ISSN 1002-0071, https://doi.org/10.1016/j.pnsc.2019.04.010 (Yang) in further view of J. Jiang et al, "CMOS-Compatible Doped-Multilayer-Graphene Interconnects for Next-Generation VLSI," 2018 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, USA, 2018, pp. 34.5.1-34.5.4, doi: 10.1109/IEDM.2018.8614535, (Jiang). Regarding claim 26; Guler in view of Tien in further view of McNerny in further view of Bao in further view of Yang does not teach wherein during the drive-in treatment, the carbon atoms of the carbon-containing material are pressurized to diffuse through the filling conductive layer so as to form the barrier layer. Jiang teaches wherein during the drive-in treatment, the carbon atoms of the carbon-containing material (Graphite – see Fig (3) of Jiang shared in this OA) are pressurized to diffuse through the filling conductive layer (Ni) so as to form the barrier layer (see section titled “Growth Mechanism” in Jiang). Guler in view of Tien in further view of McNerny in further view of Bao in further view of Yang and Jiang are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler in view of Tien in further view of McNerny in further view of Bao in further view of Yang and Jiang by using the pressurization of the carbon atoms used in Jiang to process the carbon layer to form the graphene-based layer to improve the quality of the graphene-based layer. PNG media_image9.png 762 1628 media_image9.png Greyscale Regarding claim 27; Guler in view of Tien in further view of McNerny in further view of Bao in further view of Yang does not teach wherein the carbon-containing material includes graphite, amorphous carbon, or a combination thereof. Jiang teaches wherein the carbon-containing material (Graphite - see Fig (3) of Jiang shared in this OA) includes graphite, amorphous carbon, or a combination thereof. Guler in view of Tien in further view of McNerny in further view of Bao in further view of Yang and Jiang are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler in view of Tien in further view of McNerny in further view of Bao in further view of Yang by using the graphite layer used in Jiang to be processed to improve the quality of the graphene layer produced from it leading to a better performing device. Claims 29-30 are rejected under 35 U.S.C. 103 as being unpatentable over Guler et al, US 20230317788 A1 (Guler) in view of Tien et al, US 20200365451 A1 (Tien) in further view McNerny et al, Direct fabrication of graphene on SiO2 enabled by thin film stress engineering, Scientific Reports, 5049 (2014) https://doi.org/10.1038/srep05049 (McNerny) in further view of Bao et al, US 20230197721 A1 (Bao) in further view of Yanpeng Yang et al, “Ag/graphene composite based on high-quality graphene with high electrical and mechanical properties”, Progress in Natural Science: Materials International, Volume 29, Issue 4, 2019, Pages 384-389, ISSN 1002-0071, https://doi.org/10.1016/j.pnsc.2019.04.010 (Yang) in further view of Kim et al, US 20240224565 A1 (Kim). Regarding claim 29; Guler in view of Tien in further view of McNerny in further view of Bao in further view of Yang does not teach wherein a nitrogen-containing gas is introduced during formation of the barrier layer so that the barrier layer includes graphene nitride. Kim teaches wherein a nitrogen-containing gas is introduced during formation of the barrier layer so that the barrier layer includes graphene nitride (see paragraph [0017] of the specifications of Kim: “[0017] In an embodiment, the method may further include injecting gas containing nitrogen into the graphene layer, wherein the graphene layer may include graphene not doped with impurities or graphene doped with nitrogen.”). Guler in view of Tien in further view of McNerny in further view of Bao in further view of Yang and Kim are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler in view of Tien in further view of McNerny in further view of Bao in further view of Yang by introducing the exposure to a nitrogen-containing gas during the formation of the barrier layer as disclosed in Kim to improve the quality of the graphene barrier layer leading to a more reliable device. Regarding claim 30; Guler in view of Tien in further view of McNerny in further view of Bao in further view of Yang does not teach wherein an oxygen-containing gas is introduced during formation of the barrier layer so that the barrier layer includes graphene oxide. Kim teaches wherein an oxygen-containing gas is introduced during formation of the barrier layer so that the barrier layer includes graphene oxide (see paragraph [0007] of the specification of Kim: “[0007] An embodiment of the inventive concept provides a method for manufacturing a graphene light source, the method including forming a graphene layer and electrodes in contact with both sides of the graphene layer, forming a nano-gap of the graphene layer, and forming a graphene oxide layer by bonding ionized oxygen to a portion of the graphene layer adjacent to one side of the nano-gap, wherein the graphene oxide layer emits green light or blue light.”). Guler in view of Tien in further view of McNerny in further view of Bao in further view of Yang and Kim are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler in view of Tien in further view of McNerny in further view of Bao in further view of Yang by introducing the exposure to an oxygen-containing gas during the formation of the barrier layer as disclosed in Kim to improve the quality of the graphene barrier layer which leads to an improved device reliability. Claims 35, 37-38 and 41 are rejected under 35 U.S.C. 103 as being unpatentable over Guler et al, US 20230317788 A1 (Guler) in view of Tien et al, US 20200365451 A1 (Tien) in further view of Bao et al, US 20230197721 A1 (Bao) in further view McNerny et al, Direct fabrication of graphene on SiO2 enabled by thin film stress engineering, Scientific Reports, 5049 (2014) https://doi.org/10.1038/srep05049 (McNerny). Regarding claim 35; Guler teaches a method of forming a semiconductor device (800) comprising: forming a semiconductor structure that includes a substrate (802), two channel portions (806) disposed over the substrate (802), two epitaxial structures (816) disposed over the substrate (802), the two epitaxial structures (816) being respectively connected to the two channel portions (806), a gate structure (202), a dielectric portion (204) which is disposed adjacent to the gate structure (202) and which is disposed on the two epitaxial structures (816); the recess being spaced apart from the two channel portions; Guler does not teach forming a recess in the semiconductor structure, forming a via in the recess; forming a barrier layer between the via and the semiconductor structure; and forming a conductive structure on the via, wherein formation of the via includes forming a filling conductive layer on the substrate and in the recess, the filling conductive layer having a first surface which faces away from the substrate and a second surface which the semiconductor structure, and removing a part of the filling conductive layer to form the via. Tien teaches forming a recess ((121)+(125)) in the semiconductor structure (114)+(106)+(104), forming a via (125) in the recess; forming a barrier layer (112) between the via (126V) and the semiconductor structure (114)+(106)+(104); and forming a conductive structure (126) on the via (125), wherein formation of the via (125) includes: forming a filling conductive layer (126) on the substrate (114)+(106)+(104) and in the recess ((121)+(125)), the filling conductive layer (126) having a first surface (top surface of (126)) which faces away from the semiconductor structure (114)+(106)+(104) and a second surface (bottom surface of (126)) which faces the semiconductor structure (114)+(106)+(104), and removing a part of the filling conductive layer (126) to form the via (126V). Guler and Tien are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler by introducing the recess formation in the substrate to establish the via connection to make establishing an electrical connection easier in the vertical dimension thus increasing the density of components of the device and improving the device performance. Guler in view of Tien does not teach the recess being spaced apart from the two channel portions. Bao teaches the recess (220) being spaced apart from the two channel portions (110). Guler in view of Tien and Bao are considered analogous art. Thus, it would have been obvious, prior to effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler in view of Tien by spacing the recess apart from the channel portion as disclosed in Bao to protect from accidental electrical shorts and thus improving the reliability of the device. PNG media_image10.png 718 465 media_image10.png Greyscale Guler in view of Yang in further view of Bao does not teach forming a carbon-containing material on the first surface of the filling conductive layer, the carbon-containing material not being formed on the second surface of the filling conductive layer, performing a drive-in treatment such that carbon atoms of the carbon containing material are forced to diffuse from the first surface of the filling conductive layer through the filling conductive layer to the second surface of the filling layer, so as to form the barrier layer which is disposed on the second surface of the filling conductive layer and the semiconductor structure, after the drive-in treatment, removing a remaining portion of the carbon-containing material on the first surface of the filling conductive layer. McNerny teaches forming a carbon-containing material ((G) on top of the (Ni) layer – see Fig (1) of McNerny shared in this OA) on the first surface (top surface) of the filling conductive layer (Ni), the carbon-containing material ((G) on top of the (Ni) layer – see Fig (1) of McNerny shared in this OA) not being formed on the second surface of the filling conductive layer (while Fig (1) of McNerny might give the impression that a carbon containing layer is being simultaneously formed on the second surface of the filling conductive layer (Ni), it can be seen in the section titled “ Results” of McNerny that this process is not simultaneous with forming the carbon containing layer on the top surface of (Ni) and that it is a result of the carbon atoms from the top of the (Ni) layer diffusing through the (Ni) layer and making their way to the bottom surface where they form a graphene layer (G) between the (Ni) layer and the (SiO2) substrate. McNerny explicitly states in the “Results” section: “Via this general CVD method, graphene forms both on the top and bottom (at the Ni/SiO2 interface) of the Ni film. Graphene growth at the interface is promoted by diffusion of carbon through the Ni and along grain boundaries”.), performing a drive-in treatment such that carbon atoms of the carbon-containing material ((G) layer on top of (Ni) layer – see Fig (1) of McNerny shared in this OA) are forced to diffuse from the first surface (top surface of (Ni)) of the filling conductive layer (Ni) through the filling conductive layer (Ni) to the second surface (bottom surface of (Ni)) of the filling layer (Ni), so as to form the barrier layer ((G) layer at the bottom of the (Ni) layer – see Fig 1) of McNerny) which is disposed on the second surface (bottom surface of (Ni)) of the filling conductive layer (Ni) and the semiconductor structure (SiO2), after the drive-in treatment, removing a remaining portion of the carbon-containing material ((G) layer on top of the (Ni) layer) on the first surface (top surface of (Ni)) of the filling conductive layer (Ni). Guler in view of Tien in further view of Bao and McNerny are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler in view of Tien in further view of Bao by introducing depositing the carbon-containing material on the first surface of the conductive layer and not the second surface as disclosed in McNerny to produce a graphene barrier layer to protect the device against metal atoms migration and oxidation thus leading to a more reliable device. Regarding claim 37; Guler does not teach wherein the recess penetrates the dielectric portion to terminate at the substrate and is located between the two epitaxial structures. Tien teaches wherein the recess ((121)+(125)) penetrates the dielectric portion (114)+(106)+(104) to terminate at the substrate (103) and is located between the two epitaxial structures (105) (see Fig (1M-1) of Tien shared in this OA). Guler and Tien are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Guler by using the recess disclosed in Tien to make establishing electrical connections in the vertical direction in the device easier leading to higher density of components in the device which in turn leads to a better performing device. Regarding claim 38; Guler teaches further comprising: forming a source/drain contact (108) in the dielectric portion (124), the source/drain contact (108) being connected to the via (144) and at least one of the two epitaxial structures (108). Regarding claim 41; Guler teaches wherein the recess (recess filled with conductive material (104)) is spaced apart from the two epitaxial structures (108). Claim 40 is rejected under 35 U.S.C. 103 as being unpatentable over Guler et al, US 20230317788 A1 (Guler) in view of Tien et al, US 20200365451 A1 (Tien) in further view of Bao et al, US 20230197721 A1 (Bao) in further view McNerny et al, Direct fabrication of graphene on SiO2 enabled by thin film stress engineering, Scientific Reports, 5049 (2014) https://doi.org/10.1038/srep05049 (McNerny) in further view of Xie et al, US 20230110073 A1 (Xie). Regarding claim 40; Guler in view of Tien in further view of Bao in further view of McNerny does not teach wherein the two epitaxial structures include a semiconductor material, and the source/drain contact includes a conductive material. Xie teaches wherein the two epitaxial structures (118) include a semiconductor material, and the source/drain contact (V0) includes a conductive material. Guler in view of Tien in further view of Bao in further view of McNerny and Xie are considered analogous art. Thus, it would have been obvious to one of ordinary skill in the art to modify Guler in view of Tien in further view of Bao in further view of McNerny by using semiconductor material in the epitaxial structures and metal material in the source/drain contacts as disclosed by Xie to improve the conductivity of the device making it a more efficient device. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Moataz Khalifa whose telephone number is (703)756-1770. The examiner can normally be reached Monday - Friday (8:30 am - 5:00). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Benitez can be reached at 571-270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /M.K./Examiner, Art Unit 2815 /JOSHUA BENITEZ ROSARIO/Supervisory Patent Examiner, Art Unit 2815
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Prosecution Timeline

May 26, 2022
Application Filed
Dec 05, 2024
Non-Final Rejection — §103
Mar 17, 2025
Response Filed
Jun 26, 2025
Non-Final Rejection — §103
Oct 03, 2025
Response Filed
Nov 03, 2025
Final Rejection — §103
Jan 12, 2026
Response after Non-Final Action
Feb 12, 2026
Request for Continued Examination
Feb 24, 2026
Response after Non-Final Action
Mar 17, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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4-5
Expected OA Rounds
94%
Grant Probability
88%
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3y 4m
Median Time to Grant
High
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