The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Baek et al. (2009/0310323) in view of Akram et al. (2006/0043599).
Regarding claim 1, Baek et al. teach in figure 17 and related text an embedded component structure, comprising:
a circuit board 100 having a through cavity, and the circuit board comprising:
an insulating core layer 105, having a first surface and a second surface opposite thereto, wherein the through cavity penetrates the insulating core layer; and
a conductive member 102 (see figure 11), extending from a portion of the first surface along a portion of the side wall of the through cavity to a portion of the second surface;
an electronic component 107, including an electrode 108, wherein the electronic component is disposed in the through cavity; and
a dielectric material layer 109a, 109b (comprising silicon oxide), at least filled in the through cavity; and
a connection circuit layer 113 (on the left side), covered and contacted the conductive member and the electrode, wherein:
the conductive member 102 has an inside surface facing the electronic component, the inside surface has two outer portions and an inner portion between the two outer portions; and
the dielectric material layer 109a, 109b filled in the through cavity directly contacts a portion of the conductive member 102.
Baek et al. do not teach that the conductive member includes a seed layer disposed on the insulating core layer and a plating layer disposed on the seed layer and an inner portion entirely consists of a portion of an outer surface of the plating layer, and two outer portion is composed of a portion of an outer surface of the seed layer and a portion of the outer surface of the plating layer and the dielectric material layer directly contacts a portion of the seed layer.
Akram et al. teach in figure 5 and related text conductive member 410 includes a seed layer and a plating layer disposed on the seed layer.
Baek et al. and Akram et al. are analogous art because they are directed to insulating layers and one of ordinary skill in the art would have had a reasonable expectation of success to modify Baek et al. because they are from the same field of endeavor.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form the conductive member includes a seed layer disposed on the insulating core layer and a plating layer disposed on the seed layer, as taught by Akram et al., in Baek et al.’s device in order to improve the conductivity of the device.
Note that substitution of materials is not patentable even when the substitution is new and useful. Safetran Systems Corp. v. Federal Sign & Signal Corp. (DC NIII, 1981) 215 USPQ 979.
See KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007) (“The combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results.”).
In the combined device, the conductive member now includes a seed layer disposed on the insulating core layer and a plating layer disposed on the seed layer and an inner portion entirely consists of a portion of an outer surface of the plating layer, and two outer portion is composed of a portion of an outer surface of the seed layer and a portion of the outer surface of the plating layer and the dielectric material layer directly contacts a portion of the seed layer.
Regarding the claimed limitations of having a through cavity and then forming a conductive member along a portion of the side wall of the through cavity, disposing the electronic component in the through cavity and the dielectric material layer filled in the through cavity, these are process limitations which would not carry patentable weight in this claim drawn to a structure, because distinct structure is not necessarily produced.
The formation of a conductive member along a portion of the side wall of a through cavity, disposing the electronic component in the through cavity and the dielectric material layer filled in the through cavity, does not produce a structure which is different from a structure which is formed without using a through cavity, because the through cavity is not present in the final product.
Note that a “product by process” claim is directed to the product per se, no matter how actually made, In re Hirao, 190 USPQ 15 at 17 (footnote 3). See also In re Brown, 173 USPQ 685; In re Luck, 177 USPQ 523; In re Fessmann, 180 USPQ 324; In re Avery, 186 USPQ 161; In re Wertheim, 191 USPQ 90 (209 USPQ 554 does not deal with this issue); and In re Marosi et al., 218 USPQ 289, all of which make it clear that it is the patentability of the final product per se which must be determined in a “product by process” claim, and not the patentability of the process, and that an old or obvious product produced by a new method is not patentable as a product, whether claimed in “product by process” claims or not. Note that the applicant has the burden of proof in such cases, as the above case law makes clear.
Regarding claim 9, in the combined device, the dielectric material layer filled in the through cavity directly contact the portion of the outer surface of the seed layer located in the two outer portions.
Regarding claim 10, Baek et al. teach in figure 17 and related text substantially the entire claimed structure, as recited in claim 1, including the connection circuit layer covers and contacts the dielectric material layer being filled between the electrode and the conductive member, and in a cross- sectional view, the connection circuit layer on the electrode has a first cross-sectional thickness, the connection circuit layer on the dielectric material layer being filled between the electrode and the conductive member has a second cross-sectional thickness, the connection circuit layer on the conductive member has a third cross-sectional thickness.
Baek et al. do not teach that the first cross-sectional thickness, the second cross-sectional thickness, and the third cross-sectional thickness are substantially the same.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form the first cross-sectional thickness, the second cross-sectional thickness, and the third cross-sectional thickness are substantially the same, in Baek et al.’s device in order to simplify the processing steps of making the device.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Baek et al. (2009/0310323) and Akram et al. (2006/0043599), as applied to claim 1 above, and further in view of Hayashi (2010/0019654).Regarding claim 2, Baek et al. and Akram et al. teach substantially the entire claimed structure, as recited in claim 1, except wherein the Young's modulus of the insulating core layer is greater than the Young's modulus of the dielectric material layer.
Hayashi teaches in figure 1 and related text that insulating layer 19 comprises silicon nitride.
Baek et al., Hayashi and Akram et al. are analogous art because they are directed to insulating layers and one of ordinary skill in the art would have had a reasonable expectation of success to modify Baek et al. because they are from the same field of endeavor.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form the insulating core layer comprising silicon nitride, as taught by Hayashi, in Baek et al.’s device, in order to provide better protection to the device by using conventional insulating material.
Since the combined device comprises an insulating core layer comprising silicon nitride and dielectric material layer comprising silicon oxide, then in the combined device the Young's modulus of the silicon nitride insulating core layer is greater than the Young's modulus of the silicon oxide of the dielectric material layer, as required by the claims.
Hayashi provides the evidence in paragraph [0104] that the Young's modulus of silicon nitride is 300 GPa and the Young's modulus of silicon oxide is 100 GPa.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Baek et al. (2009/0310323) and Akram et al. (2006/0043599), as applied to claim 1 above, and further in view of Itabashi (6,370,768).
Regarding claim 6, Baek et al. and Akram et al. teach substantially the entire claimed structure, as recited in claim 1, except a surface roughness of the inner portion is smaller than a surface roughness of the outer portions.
Itabashi teaches in figure 4 and related text that a surface roughness of a via hole is different from other portions in order to for the via-holes to be identified by visual observation from the top of the circuit board.
Baek et al., Itabashi and Akram et al. are analogous art because they are directed to insulating layers and one of ordinary skill in the art would have had a reasonable expectation of success to modify Baek et al. because they are from the same field of endeavor.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form a surface roughness of the inner portion smaller than a surface roughness of the outer portions, as taught by Itabashi, in Baek et al.’s device in order to be able to identify the via-holes by visual observation from the top of the circuit board.
Response to Arguments
1. Applicants argue that Baek and Akram do not teach the claimed limitation because “Baek’s electrical connection is achieved via a completely different mechanism”, and “Akram teaches depositing these layers into a pre-formed hole. In such a process, the plating layer 410 would entirely cover the seed material, and the seed layer would not be exposed on the inner-facing surface of the via”.
1. Claim 1 is directed towards an embedded component structure. The method in which Baek and Akram use to form said embedded component structure is a process limitation which would not carry patentable weight in this claim drawn to a structure, because distinct structure is not necessarily produced.
Note that a “product by process” claim is directed to the product per se, no matter how actually made, In re Hirao, 190 USPQ 15 at 17 (footnote 3). See also In re Brown, 173 USPQ 685; In re Luck, 177 USPQ 523; In re Fessmann, 180 USPQ 324; In re Avery, 186 USPQ 161; In re Wertheim, 191 USPQ 90 (209 USPQ 554 does not deal with this issue); and In re Marosi et al., 218 USPQ 289, all of which make it clear that it is the patentability of the final product per se which must be determined in a “product by process” claim, and not the patentability of the process, and that an old or obvious product produced by a new method is not patentable as a product, whether claimed in “product by process” claims or not. Note that the applicant has the burden of proof in such cases, as the above case law makes clear.
2. Applicants argue that the office uses hindsight to reject the independent claims.
2. In response to applicant's argument that the examiner's conclusion of obviousness is based upon improper hindsight reasoning, it must be recognized that any judgment on obviousness is in a sense necessarily a reconstruction based upon hindsight reasoning. But so long as it takes into account only knowledge which was within the level of ordinary skill at the time the claimed invention was made, and does not include knowledge gleaned only from the applicant's disclosure, such a reconstruction is proper. See In re McLaughlin, 443 F.2d 1392, 170 USPQ 209 (CCPA 1971).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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O.N. /ORI NADAV/
12/17/2025 PRIMARY EXAMINER
TECHNOLOGY CENTER 2800