Prosecution Insights
Prosecution Insights
Technology area: Semiconductors, Circuits & Optics
6 pending office actions • 5 art units • 6 examiners • 0 of 6 (0%) have an AI response strategy ready • 26 patents granted in the last 365 days
Unimicron Technology Corp. holds a company patent portfolio in the Semiconductors, Circuits & Optics technology area. The portfolio currently includes 5 pending office actions. These matters are distributed across 4 distinct art units. This wide distribution across art units suggests that the company's technical disclosures are diverse and touch upon several different specialized areas within the semiconductor field. The presence of 5 pending office actions indicates an active period of engagement with the patent office.
The prosecution of these cases involves 5 distinct examiners. With 5 pending office actions and 5 distinct examiners, each matter is being reviewed by a different individual. This means there is no overlap in examiners across the 4 distinct art units. The company must navigate five separate prosecution tracks, each with its own set of examiner preferences and art unit norms. Practitioners should be prepared for a variety of procedural approaches.
HARRISON, MICHAEL A is the busiest examiner for the portfolio. This examiner is currently handling 1 busiest examiner pending office action. This accounts for one fifth of the 5 pending office actions currently active for Unimicron Technology Corp. While HARRISON, MICHAEL A is the busiest, the workload is evenly spread, meaning no single examiner has a dominant influence over the portfolio's current trajectory.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §103 only | 2 (33%) |
| Multi-statute (no §101) | 4 (67%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| HARRISON, MICHAEL A | 1 | 88.9% | +2.7% |
| SUN, YU-HSI DAVID | 1 | 77.5% | +8.4% |
| GUSHI, ROSS N | 1 | 83.9% | +2.2% |
| TRAN, TAN N | 1 | 86.9% | +9.9% |
| TRAN, TONY | 1 | 70.5% | +33.5% |
| VU, HUNG K | 1 | 87.6% | +9.4% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 1 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18171672 | CHIP PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF | VU, HUNG K | — |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 4 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 19014039 | LOAD CONTROL PROBE DEVICE AND LOAD CONTROL METHOD | HARRISON, MICHAEL A | — |
| 18605597 | CONNECTOR AND MANUFACTURING METHOD THEREOF | GUSHI, ROSS N | — |
| 18395755 | PACKAGE SUBSTRATE AND MANUFACTURING METHOD THEREOF | TRAN, TAN N | — |
| 18360826 | ELECTRONIC PACKAGE MODULE AND METHOD FOR FABRICATION OF THE SAME | TRAN, TONY | — |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 1 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18360826 | ELECTRONIC PACKAGE MODULE AND METHOD FOR FABRICATION OF THE SAME | TRAN, TONY | — |
| Art Unit | Apps |
|---|---|
| 2852 | 1 |
| 2834 | 1 |
| 2812 | 1 |
| 2893 | 1 |
| 2897 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 19014039 | LOAD CONTROL PROBE DEVICE AND LOAD CONTROL METHOD | HARRISON, MICHAEL A | 2852 | §102§103§112 | Non-Final OA | — | Pending | Jan 08, 2025 |
| 18764163 | SUBSTRATE STRUCTURE AND MANUFACTURING METHOD THEREOF | SUN, YU-HSI DAVID | — | §103 | Non-Final OA | — | Pending | Jul 04, 2024 |
| 18605597 | CONNECTOR AND MANUFACTURING METHOD THEREOF | GUSHI, ROSS N | 2834 | §102§103 | Final Rejection | — | Pending | Mar 14, 2024 |
| 18395755 | PACKAGE SUBSTRATE AND MANUFACTURING METHOD THEREOF | TRAN, TAN N | 2812 | §102§103 | Final Rejection | — | Pending | Dec 26, 2023 |
| 18360826 | ELECTRONIC PACKAGE MODULE AND METHOD FOR FABRICATION OF THE SAME | TRAN, TONY | 2893 | §102§103 | Final Rejection | — | Pending | Jul 28, 2023 |
| 18171672 | CHIP PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF | VU, HUNG K | 2897 | §103 | Final Rejection | — | Pending | Feb 21, 2023 |
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